Commit | Line | Data |
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f577ffd7 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap1/io.c | |
3 | * | |
4 | * OMAP1 I/O mapping code | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
f577ffd7 TL |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
fced80c7 | 14 | #include <linux/io.h> |
f577ffd7 | 15 | |
53d9cc73 | 16 | #include <asm/tlb.h> |
f577ffd7 | 17 | #include <asm/mach/map.h> |
2e3ee9f4 | 18 | |
70c494c3 | 19 | #include <mach/mux.h> |
54b693d4 | 20 | #include <mach/tc.h> |
45c3eb7d | 21 | #include <linux/omap-dma.h> |
f577ffd7 | 22 | |
2e3ee9f4 TL |
23 | #include "iomap.h" |
24 | #include "common.h" | |
52650505 PW |
25 | #include "clock.h" |
26 | ||
f577ffd7 TL |
27 | /* |
28 | * The machine specific code may provide the extra mapping besides the | |
29 | * default mapping provided here. | |
30 | */ | |
31 | static struct map_desc omap_io_desc[] __initdata = { | |
9fe133b1 | 32 | { |
db326be1 TL |
33 | .virtual = OMAP1_IO_VIRT, |
34 | .pfn = __phys_to_pfn(OMAP1_IO_PHYS), | |
35 | .length = OMAP1_IO_SIZE, | |
9fe133b1 DS |
36 | .type = MT_DEVICE |
37 | } | |
f577ffd7 TL |
38 | }; |
39 | ||
ab49df73 | 40 | #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) |
7c006926 | 41 | static struct map_desc omap7xx_io_desc[] __initdata = { |
9fe133b1 | 42 | { |
b51988db AB |
43 | .virtual = OMAP7XX_DSP_BASE, |
44 | .pfn = __phys_to_pfn(OMAP7XX_DSP_START), | |
45 | .length = OMAP7XX_DSP_SIZE, | |
9fe133b1 DS |
46 | .type = MT_DEVICE |
47 | }, { | |
b51988db AB |
48 | .virtual = OMAP7XX_DSPREG_BASE, |
49 | .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START), | |
50 | .length = OMAP7XX_DSPREG_SIZE, | |
9fe133b1 DS |
51 | .type = MT_DEVICE |
52 | } | |
f577ffd7 TL |
53 | }; |
54 | #endif | |
55 | ||
3179a019 | 56 | #ifdef CONFIG_ARCH_OMAP15XX |
f577ffd7 | 57 | static struct map_desc omap1510_io_desc[] __initdata = { |
9fe133b1 DS |
58 | { |
59 | .virtual = OMAP1510_DSP_BASE, | |
60 | .pfn = __phys_to_pfn(OMAP1510_DSP_START), | |
61 | .length = OMAP1510_DSP_SIZE, | |
62 | .type = MT_DEVICE | |
63 | }, { | |
64 | .virtual = OMAP1510_DSPREG_BASE, | |
65 | .pfn = __phys_to_pfn(OMAP1510_DSPREG_START), | |
66 | .length = OMAP1510_DSPREG_SIZE, | |
67 | .type = MT_DEVICE | |
68 | } | |
f577ffd7 TL |
69 | }; |
70 | #endif | |
71 | ||
72 | #if defined(CONFIG_ARCH_OMAP16XX) | |
7c38cf02 | 73 | static struct map_desc omap16xx_io_desc[] __initdata = { |
9fe133b1 DS |
74 | { |
75 | .virtual = OMAP16XX_DSP_BASE, | |
76 | .pfn = __phys_to_pfn(OMAP16XX_DSP_START), | |
77 | .length = OMAP16XX_DSP_SIZE, | |
78 | .type = MT_DEVICE | |
79 | }, { | |
80 | .virtual = OMAP16XX_DSPREG_BASE, | |
81 | .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START), | |
82 | .length = OMAP16XX_DSPREG_SIZE, | |
83 | .type = MT_DEVICE | |
84 | } | |
f577ffd7 TL |
85 | }; |
86 | #endif | |
87 | ||
53d9cc73 | 88 | /* |
7b88e62f | 89 | * Maps common IO regions for omap1 |
53d9cc73 | 90 | */ |
7b88e62f | 91 | static void __init omap1_map_common_io(void) |
f577ffd7 | 92 | { |
f577ffd7 | 93 | iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc)); |
7b88e62f | 94 | } |
f577ffd7 | 95 | |
ab49df73 | 96 | #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) |
7b88e62f TL |
97 | void __init omap7xx_map_io(void) |
98 | { | |
99 | omap1_map_common_io(); | |
100 | iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); | |
101 | } | |
f577ffd7 | 102 | #endif |
7b88e62f | 103 | |
3179a019 | 104 | #ifdef CONFIG_ARCH_OMAP15XX |
7b88e62f TL |
105 | void __init omap15xx_map_io(void) |
106 | { | |
107 | omap1_map_common_io(); | |
108 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); | |
109 | } | |
f577ffd7 TL |
110 | #endif |
111 | ||
7b88e62f TL |
112 | #if defined(CONFIG_ARCH_OMAP16XX) |
113 | void __init omap16xx_map_io(void) | |
114 | { | |
115 | omap1_map_common_io(); | |
116 | iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); | |
53d9cc73 | 117 | } |
7b88e62f | 118 | #endif |
7c38cf02 | 119 | |
53d9cc73 | 120 | /* |
7b88e62f | 121 | * Common low-level hardware init for omap1. |
53d9cc73 | 122 | */ |
8eaa7bb0 | 123 | void __init omap1_init_early(void) |
53d9cc73 | 124 | { |
7b88e62f TL |
125 | omap_check_revision(); |
126 | ||
f577ffd7 TL |
127 | /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort |
128 | * on a Posted Write in the TIPB Bridge". | |
129 | */ | |
130 | omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); | |
131 | omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); | |
132 | ||
133 | /* Must init clocks early to assure that timer interrupt works | |
134 | */ | |
3179a019 | 135 | omap1_clk_init(); |
53d9cc73 | 136 | omap1_mux_init(); |
f577ffd7 | 137 | } |
7c38cf02 | 138 | |
82c3bd03 SG |
139 | void __init omap1_init_late(void) |
140 | { | |
141 | omap_serial_wakeup_init(); | |
142 | } | |
143 | ||
df1e9d1c TL |
144 | /* |
145 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these | |
146 | */ | |
147 | ||
148 | u8 omap_readb(u32 pa) | |
149 | { | |
150 | return __raw_readb(OMAP1_IO_ADDRESS(pa)); | |
151 | } | |
152 | EXPORT_SYMBOL(omap_readb); | |
153 | ||
154 | u16 omap_readw(u32 pa) | |
155 | { | |
156 | return __raw_readw(OMAP1_IO_ADDRESS(pa)); | |
157 | } | |
158 | EXPORT_SYMBOL(omap_readw); | |
159 | ||
160 | u32 omap_readl(u32 pa) | |
161 | { | |
162 | return __raw_readl(OMAP1_IO_ADDRESS(pa)); | |
163 | } | |
164 | EXPORT_SYMBOL(omap_readl); | |
165 | ||
166 | void omap_writeb(u8 v, u32 pa) | |
167 | { | |
168 | __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); | |
169 | } | |
170 | EXPORT_SYMBOL(omap_writeb); | |
171 | ||
172 | void omap_writew(u16 v, u32 pa) | |
173 | { | |
174 | __raw_writew(v, OMAP1_IO_ADDRESS(pa)); | |
175 | } | |
176 | EXPORT_SYMBOL(omap_writew); | |
177 | ||
178 | void omap_writel(u32 v, u32 pa) | |
179 | { | |
180 | __raw_writel(v, OMAP1_IO_ADDRESS(pa)); | |
181 | } | |
182 | EXPORT_SYMBOL(omap_writel); |