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97933d6c TKD |
1 | /** |
2 | * OMAP1 Dual-Mode Timers - platform device registration | |
3 | * | |
4 | * Contains first level initialization routines which internally | |
5 | * generates timer device information and registers with linux | |
6 | * device model. It also has low level function to chnage the timer | |
7 | * input clock source. | |
8 | * | |
9 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
10 | * Tarun Kanti DebBarma <tarun.kanti@ti.com> | |
11 | * Thara Gopinath <thara@ti.com> | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
18 | * kind, whether express or implied; without even the implied warranty | |
19 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | */ | |
22 | ||
23 | #include <linux/clk.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/err.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/platform_device.h> | |
40fc3bb5 | 28 | #include <linux/platform_data/dmtimer-omap.h> |
97933d6c | 29 | |
97933d6c TKD |
30 | #include <plat/dmtimer.h> |
31 | ||
685e2d08 TL |
32 | #include "soc.h" |
33 | ||
97933d6c TKD |
34 | #define OMAP1610_GPTIMER1_BASE 0xfffb1400 |
35 | #define OMAP1610_GPTIMER2_BASE 0xfffb1c00 | |
36 | #define OMAP1610_GPTIMER3_BASE 0xfffb2400 | |
37 | #define OMAP1610_GPTIMER4_BASE 0xfffb2c00 | |
38 | #define OMAP1610_GPTIMER5_BASE 0xfffb3400 | |
39 | #define OMAP1610_GPTIMER6_BASE 0xfffb3c00 | |
40 | #define OMAP1610_GPTIMER7_BASE 0xfffb7400 | |
41 | #define OMAP1610_GPTIMER8_BASE 0xfffbd400 | |
42 | ||
43 | #define OMAP1_DM_TIMER_COUNT 8 | |
44 | ||
45 | static int omap1_dm_timer_set_src(struct platform_device *pdev, | |
46 | int source) | |
47 | { | |
48 | int n = (pdev->id - 1) << 1; | |
49 | u32 l; | |
50 | ||
6aaec67d | 51 | l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); |
97933d6c | 52 | l |= source << n; |
6aaec67d | 53 | omap_writel(l, MOD_CONF_CTRL_1); |
97933d6c TKD |
54 | |
55 | return 0; | |
56 | } | |
57 | ||
8c3d4534 | 58 | static int __init omap1_dm_timer_init(void) |
97933d6c TKD |
59 | { |
60 | int i; | |
61 | int ret; | |
62 | struct dmtimer_platform_data *pdata; | |
63 | struct platform_device *pdev; | |
64 | ||
65 | if (!cpu_is_omap16xx()) | |
66 | return 0; | |
67 | ||
68 | for (i = 1; i <= OMAP1_DM_TIMER_COUNT; i++) { | |
69 | struct resource res[2]; | |
70 | u32 base, irq; | |
71 | ||
72 | switch (i) { | |
73 | case 1: | |
74 | base = OMAP1610_GPTIMER1_BASE; | |
75 | irq = INT_1610_GPTIMER1; | |
76 | break; | |
77 | case 2: | |
78 | base = OMAP1610_GPTIMER2_BASE; | |
79 | irq = INT_1610_GPTIMER2; | |
80 | break; | |
81 | case 3: | |
82 | base = OMAP1610_GPTIMER3_BASE; | |
83 | irq = INT_1610_GPTIMER3; | |
84 | break; | |
85 | case 4: | |
86 | base = OMAP1610_GPTIMER4_BASE; | |
87 | irq = INT_1610_GPTIMER4; | |
88 | break; | |
89 | case 5: | |
90 | base = OMAP1610_GPTIMER5_BASE; | |
91 | irq = INT_1610_GPTIMER5; | |
92 | break; | |
93 | case 6: | |
94 | base = OMAP1610_GPTIMER6_BASE; | |
95 | irq = INT_1610_GPTIMER6; | |
96 | break; | |
97 | case 7: | |
98 | base = OMAP1610_GPTIMER7_BASE; | |
99 | irq = INT_1610_GPTIMER7; | |
100 | break; | |
101 | case 8: | |
102 | base = OMAP1610_GPTIMER8_BASE; | |
103 | irq = INT_1610_GPTIMER8; | |
104 | break; | |
105 | default: | |
106 | /* | |
107 | * not supposed to reach here. | |
108 | * this is to remove warning. | |
109 | */ | |
110 | return -EINVAL; | |
111 | } | |
112 | ||
113 | pdev = platform_device_alloc("omap_timer", i); | |
114 | if (!pdev) { | |
115 | pr_err("%s: Failed to device alloc for dmtimer%d\n", | |
116 | __func__, i); | |
117 | return -ENOMEM; | |
118 | } | |
119 | ||
120 | memset(res, 0, 2 * sizeof(struct resource)); | |
121 | res[0].start = base; | |
122 | res[0].end = base + 0x46; | |
123 | res[0].flags = IORESOURCE_MEM; | |
124 | res[1].start = irq; | |
125 | res[1].end = irq; | |
126 | res[1].flags = IORESOURCE_IRQ; | |
127 | ret = platform_device_add_resources(pdev, res, | |
128 | ARRAY_SIZE(res)); | |
129 | if (ret) { | |
130 | dev_err(&pdev->dev, "%s: Failed to add resources.\n", | |
131 | __func__); | |
132 | goto err_free_pdev; | |
133 | } | |
134 | ||
135 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | |
136 | if (!pdata) { | |
137 | dev_err(&pdev->dev, "%s: Failed to allocate pdata.\n", | |
138 | __func__); | |
139 | ret = -ENOMEM; | |
140 | goto err_free_pdata; | |
141 | } | |
142 | ||
143 | pdata->set_timer_src = omap1_dm_timer_set_src; | |
6615975b | 144 | pdata->timer_capability = OMAP_TIMER_ALWON | |
5c3e4ec4 | 145 | OMAP_TIMER_NEEDS_RESET | OMAP_TIMER_HAS_DSP_IRQ; |
97933d6c TKD |
146 | |
147 | ret = platform_device_add_data(pdev, pdata, sizeof(*pdata)); | |
148 | if (ret) { | |
149 | dev_err(&pdev->dev, "%s: Failed to add platform data.\n", | |
150 | __func__); | |
151 | goto err_free_pdata; | |
152 | } | |
153 | ||
154 | ret = platform_device_add(pdev); | |
155 | if (ret) { | |
156 | dev_err(&pdev->dev, "%s: Failed to add platform device.\n", | |
157 | __func__); | |
158 | goto err_free_pdata; | |
159 | } | |
160 | ||
161 | dev_dbg(&pdev->dev, " Registered.\n"); | |
162 | } | |
163 | ||
164 | return 0; | |
165 | ||
166 | err_free_pdata: | |
167 | kfree(pdata); | |
168 | ||
169 | err_free_pdev: | |
170 | platform_device_unregister(pdev); | |
171 | ||
172 | return ret; | |
173 | } | |
174 | arch_initcall(omap1_dm_timer_init); |