Linux 4.7-rc2
[deliverable/linux.git] / arch / arm / mach-omap2 / Kconfig
CommitLineData
21278aea
RH
1menu "TI OMAP/AM/DM/DRA Family"
2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
3
68ac8f7d 4config ARCH_OMAP2
f558b275 5 bool "TI OMAP2"
4b0ed696 6 depends on ARCH_MULTI_V6
59d92875 7 select ARCH_OMAP2PLUS
68ac8f7d 8 select CPU_V6
ecc46cfd 9 select SOC_HAS_OMAP2_SDRC
68ac8f7d
TL
10
11config ARCH_OMAP3
f558b275 12 bool "TI OMAP3"
4b0ed696 13 depends on ARCH_MULTI_V7
59d92875 14 select ARCH_OMAP2PLUS
15e0d9e3 15 select ARM_CPU_SUSPEND if PM
0ee7261c 16 select OMAP_INTERCONNECT
b1b3f49c 17 select PM_OPP if PM
464ed18e 18 select PM if CPU_IDLE
b1b3f49c 19 select SOC_HAS_OMAP2_SDRC
68ac8f7d
TL
20
21config ARCH_OMAP4
f558b275 22 bool "TI OMAP4"
4b0ed696 23 depends on ARCH_MULTI_V7
59d92875 24 select ARCH_OMAP2PLUS
b1b3f49c
RK
25 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
26 select ARM_CPU_SUSPEND if PM
27 select ARM_ERRATA_720789
28 select ARM_GIC
4c3ffffd 29 select HAVE_ARM_SCU if SMP
a894fcc2 30 select HAVE_ARM_TWD if SMP
b1b3f49c 31 select OMAP_INTERCONNECT
3fa60975 32 select OMAP_INTERCONNECT_BARRIER
a641f3a6
RK
33 select PL310_ERRATA_588369 if CACHE_L2X0
34 select PL310_ERRATA_727915 if CACHE_L2X0
f5a6422d 35 select PM_OPP if PM
464ed18e 36 select PM if CPU_IDLE
7a981995
S
37 select ARM_ERRATA_754322
38 select ARM_ERRATA_775420
68ac8f7d 39
35eb4298
S
40config SOC_OMAP5
41 bool "TI OMAP5"
4b0ed696 42 depends on ARCH_MULTI_V7
59d92875 43 select ARCH_OMAP2PLUS
b1b3f49c 44 select ARM_CPU_SUSPEND if PM
35eb4298 45 select ARM_GIC
896eba3b 46 select HAVE_ARM_SCU if SMP
8a4da6e3 47 select HAVE_ARM_ARCH_TIMER
f82a3133 48 select ARM_ERRATA_798181 if SMP
d8f8004e 49 select OMAP_INTERCONNECT
3fa60975 50 select OMAP_INTERCONNECT_BARRIER
d8f8004e 51 select PM_OPP if PM
6a3b764b 52 select ZONE_DMA if ARM_LPAE
35eb4298 53
59d92875 54config SOC_AM33XX
1085189f 55 bool "TI AM33XX"
59d92875
AB
56 depends on ARCH_MULTI_V7
57 select ARCH_OMAP2PLUS
58 select ARM_CPU_SUSPEND if PM
59d92875
AB
59
60config SOC_AM43XX
61 bool "TI AM43x"
62 depends on ARCH_MULTI_V7
59d92875 63 select ARCH_OMAP2PLUS
59d92875 64 select ARM_GIC
59d92875 65 select MACH_OMAP_GENERIC
d941f86f 66 select MIGHT_HAVE_CACHE_L2X0
f87d089d 67 select HAVE_ARM_SCU
0b3e6fca 68 select GENERIC_CLOCKEVENTS_BROADCAST
54011103 69 select HAVE_ARM_TWD
59d92875 70
68b9f608
TK
71config SOC_DRA7XX
72 bool "TI DRA7XX"
73 depends on ARCH_MULTI_V7
74 select ARCH_OMAP2PLUS
75 select ARM_CPU_SUSPEND if PM
76 select ARM_GIC
d2e104c6 77 select HAVE_ARM_SCU if SMP
68b9f608 78 select HAVE_ARM_ARCH_TIMER
5c61e619 79 select IRQ_CROSSBAR
209431ef 80 select ARM_ERRATA_798181 if SMP
d2e104c6 81 select OMAP_INTERCONNECT
3fa60975 82 select OMAP_INTERCONNECT_BARRIER
d2e104c6 83 select PM_OPP if PM
6a3b764b 84 select ZONE_DMA if ARM_LPAE
68b9f608 85
59d92875
AB
86config ARCH_OMAP2PLUS
87 bool
88 select ARCH_HAS_BANDGAP
59d92875
AB
89 select ARCH_HAS_HOLES_MEMORYMODEL
90 select ARCH_OMAP
91 select ARCH_REQUIRE_GPIOLIB
59d92875 92 select CLKSRC_MMIO
59d92875 93 select GENERIC_IRQ_CHIP
f2acae69 94 select MACH_OMAP_GENERIC
18640193 95 select MEMORY
da4d8145 96 select MFD_SYSCON
59d92875 97 select OMAP_DM_TIMER
18640193 98 select OMAP_GPMC
59d92875 99 select PINCTRL
59d92875 100 select SOC_BUS
8598066c 101 select OMAP_IRQCHIP
429ac200 102 select CLKSRC_TI_32K
59d92875
AB
103 help
104 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
105
3fa60975
RK
106config OMAP_INTERCONNECT_BARRIER
107 bool
108 select ARM_HEAVY_MB
109
59d92875
AB
110
111if ARCH_OMAP2PLUS
112
113menu "TI OMAP2/3/4 Specific Features"
114
115config ARCH_OMAP2PLUS_TYPICAL
116 bool "Typical OMAP configuration"
117 default y
118 select AEABI
119 select HIGHMEM
120 select I2C
121 select I2C_OMAP
122 select MENELAUS if ARCH_OMAP2
8dd21c93 123 select NEON if CPU_V7
464ed18e 124 select PM
59d92875 125 select REGULATOR
fc827928 126 select REGULATOR_FIXED_VOLTAGE
59d92875
AB
127 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
128 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
129 select VFP
130 help
131 Compile a kernel suitable for booting most boards
132
133config SOC_HAS_OMAP2_SDRC
134 bool "OMAP2 SDRAM Controller support"
135
136config SOC_HAS_REALTIME_COUNTER
137 bool "Real time free running counter"
f18153f9 138 depends on SOC_OMAP5 || SOC_DRA7XX
59d92875
AB
139 default y
140
1dbae815 141comment "OMAP Core Type"
f558b275 142 depends on ARCH_OMAP2
1dbae815 143
59b479e0 144config SOC_OMAP2420
1dbae815 145 bool "OMAP2420 support"
f558b275 146 depends on ARCH_OMAP2
ffb63e34 147 default y
77900a2f 148 select OMAP_DM_TIMER
ecc46cfd 149 select SOC_HAS_OMAP2_SDRC
1dbae815 150
59b479e0 151config SOC_OMAP2430
72d0f1c3 152 bool "OMAP2430 support"
f558b275 153 depends on ARCH_OMAP2
ffb63e34 154 default y
ecc46cfd 155 select SOC_HAS_OMAP2_SDRC
72d0f1c3 156
59b479e0 157config SOC_OMAP3430
cc26b3b0 158 bool "OMAP3430 support"
f558b275 159 depends on ARCH_OMAP3
ffb63e34 160 default y
ecc46cfd 161 select SOC_HAS_OMAP2_SDRC
cc26b3b0 162
33959553 163config SOC_TI81XX
a920360f 164 bool "TI81XX support"
f558b275 165 depends on ARCH_OMAP3
4bd7be22
HP
166 default y
167
ddaa912a
TL
168config OMAP_PACKAGE_CBC
169 bool
170
171config OMAP_PACKAGE_CBB
172 bool
173
174config OMAP_PACKAGE_CUS
175 bool
176
662c8b55
TL
177config OMAP_PACKAGE_CBP
178 bool
179
f2acae69 180comment "OMAP Legacy Platform Data Board Type"
f558b275 181 depends on ARCH_OMAP2PLUS
1dbae815
TL
182
183config MACH_OMAP_GENERIC
f2acae69 184 bool
1dbae815 185
1b52d5df
KV
186config MACH_OMAP2_TUSB6010
187 bool
59b479e0 188 depends on ARCH_OMAP2 && SOC_OMAP2420
1b52d5df
KV
189 default y if MACH_NOKIA_N8X0
190
49265651
NK
191config MACH_OMAP_LDP
192 bool "OMAP3 LDP board"
a8eb7ca0 193 depends on ARCH_OMAP3
ffb63e34 194 default y
ca5742bd 195 select OMAP_PACKAGE_CBB
49265651 196
549f95ed
TL
197config MACH_OMAP3517EVM
198 bool "OMAP3517/ AM3517 EVM board"
199 depends on ARCH_OMAP3
200 default y
201
da177247
GI
202config MACH_OMAP3_PANDORA
203 bool "OMAP3 Pandora"
a8eb7ca0 204 depends on ARCH_OMAP3
ffb63e34 205 default y
ca5742bd 206 select OMAP_PACKAGE_CBB
6fdc29e2 207
d2fbf345
TL
208config MACH_NOKIA_N810
209 bool
210
211config MACH_NOKIA_N810_WIMAX
212 bool
213
63138812
KV
214config MACH_NOKIA_N8X0
215 bool "Nokia N800/N810"
59b479e0 216 depends on SOC_OMAP2420
ffb63e34 217 default y
d2fbf345
TL
218 select MACH_NOKIA_N810
219 select MACH_NOKIA_N810_WIMAX
63138812 220
ffe7f95b 221config MACH_NOKIA_RX51
cc067797 222 bool "Nokia N900 (RX-51) phone"
a8eb7ca0 223 depends on ARCH_OMAP3
ffb63e34 224 default y
ca5742bd 225 select OMAP_PACKAGE_CBB
577145f4 226
18862cbe
PW
227config OMAP3_SDRC_AC_TIMING
228 bool "Enable SDRC AC timing register changes"
a8eb7ca0 229 depends on ARCH_OMAP3
18862cbe
PW
230 default n
231 help
232 If you know that none of your system initiators will attempt to
233 access SDRAM during CORE DVFS, select Y here. This should boost
234 SDRAM performance at lower CORE OPPs. There are relatively few
235 users who will wish to say yes at this point - almost everyone will
236 wish to say no. Selecting yes without understanding what is
237 going on could result in system crashes;
238
4a54db61
TL
239endmenu
240
241endif
21278aea
RH
242
243endmenu
This page took 0.58235 seconds and 5 git commands to generate.