[deliverable/linux.git] / arch / arm / mach-omap2 / board-3430sdp.c

/*
 * linux/arch/arm/mach-omap2/board-3430sdp.c
 *
 * Copyright (C) 2007 Texas Instruments
 *
 * Modified from mach-omap2/board-generic.c
 *
 * Initial code: Syed Mohammed Khasim
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/i2c/twl.h>
#include <linux/regulator/machine.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/omap-twl4030.h>
#include <linux/usb/phy.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include "common.h"
#include <linux/omap-dma.h>
#include <video/omapdss.h>
#include <video/omap-panel-data.h>

#include "gpmc.h"
#include "gpmc-smc91x.h"

#include "soc.h"
#include "board-flash.h"
#include "mux.h"
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
#include "control.h"
#include "common-board-devices.h"

#define CONFIG_DISABLE_HFCLK 1

#define SDP3430_TS_GPIO_IRQ_SDPV1	3
#define SDP3430_TS_GPIO_IRQ_SDPV2	2

#define ENABLE_VAUX3_DEDICATED	0x03
#define ENABLE_VAUX3_DEV_GRP	0x20

#define TWL4030_MSECURE_GPIO 22

static uint32_t board_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(0, 1, KEY_RIGHT),
	KEY(0, 2, KEY_A),
	KEY(0, 3, KEY_B),
	KEY(0, 4, KEY_C),
	KEY(1, 0, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(1, 2, KEY_E),
	KEY(1, 3, KEY_F),
	KEY(1, 4, KEY_G),
	KEY(2, 0, KEY_ENTER),
	KEY(2, 1, KEY_I),
	KEY(2, 2, KEY_J),
	KEY(2, 3, KEY_K),
	KEY(2, 4, KEY_3),
	KEY(3, 0, KEY_M),
	KEY(3, 1, KEY_N),
	KEY(3, 2, KEY_O),
	KEY(3, 3, KEY_P),
	KEY(3, 4, KEY_Q),
	KEY(4, 0, KEY_R),
	KEY(4, 1, KEY_4),
	KEY(4, 2, KEY_T),
	KEY(4, 3, KEY_U),
	KEY(4, 4, KEY_D),
	KEY(5, 0, KEY_V),
	KEY(5, 1, KEY_W),
	KEY(5, 2, KEY_L),
	KEY(5, 3, KEY_S),
	KEY(5, 4, KEY_H),
	0
};

static struct matrix_keymap_data board_map_data = {
	.keymap			= board_keymap,
	.keymap_size		= ARRAY_SIZE(board_keymap),
};

static struct twl4030_keypad_data sdp3430_kp_data = {
	.keymap_data	= &board_map_data,
	.rows		= 5,
	.cols		= 6,
	.rep		= 1,
};

#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO	8
#define SDP3430_LCD_PANEL_ENABLE_GPIO		5

static void __init sdp3430_display_init(void)
{
	int r;

	/*
	 * the backlight GPIO doesn't directly go to the panel, it enables
	 * an internal circuit on 3430sdp to create the signal V_BKL_28V,
	 * this is connected to LED+ pin of the sharp panel. This GPIO
	 * is left enabled in the board file, and not passed to the panel
	 * as platform_data.
	 */
	r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO,
				GPIOF_OUT_INIT_HIGH, "LCD Backlight");
	if (r)
		pr_err("failed to get LCD Backlight GPIO\n");

}

static struct panel_sharp_ls037v7dw01_data sdp3430_lcd_data = {
	.resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO,
	.ini_gpio = -1,
	.mo_gpio = -1,
	.lr_gpio = -1,
	.ud_gpio = -1,
};

static struct omap_dss_device sdp3430_lcd_device = {
	.name			= "lcd",
	.driver_name		= "sharp_ls_panel",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.phy.dpi.data_lines	= 16,
	.data			= &sdp3430_lcd_data,
};

static struct tfp410_platform_data dvi_panel = {
	.power_down_gpio	= -1,
	.i2c_bus_num		= -1,
};

static struct omap_dss_device sdp3430_dvi_device = {
	.name			= "dvi",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.driver_name		= "tfp410",
	.data			= &dvi_panel,
	.phy.dpi.data_lines	= 24,
};

static struct omap_dss_device sdp3430_tv_device = {
	.name			= "tv",
	.driver_name		= "venc",
	.type			= OMAP_DISPLAY_TYPE_VENC,
	.phy.venc.type		= OMAP_DSS_VENC_TYPE_SVIDEO,
};


static struct omap_dss_device *sdp3430_dss_devices[] = {
	&sdp3430_lcd_device,
	&sdp3430_dvi_device,
	&sdp3430_tv_device,
};

static struct omap_dss_board_info sdp3430_dss_data = {
	.num_devices	= ARRAY_SIZE(sdp3430_dss_devices),
	.devices	= sdp3430_dss_devices,
	.default_device	= &sdp3430_lcd_device,
};

static struct omap2_hsmmc_info mmc[] = {
	{
		.mmc		= 1,
		/* 8 bits (default) requires S6.3 == ON,
		 * so the SIM card isn't used; else 4 bits.
		 */
		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
		.gpio_wp	= 4,
		.deferred	= true,
	},
	{
		.mmc		= 2,
		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
		.gpio_wp	= 7,
		.deferred	= true,
	},
	{}	/* Terminator */
};

static struct omap_tw4030_pdata omap_twl4030_audio_data = {
	.voice_connected = true,
	.custom_routing	= true,

	.has_hs		= OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
	.has_hf		= OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,

	.has_mainmic	= true,
	.has_submic	= true,
	.has_hsmic	= true,
	.has_linein	= OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
};

static int sdp3430_twl_gpio_setup(struct device *dev,
		unsigned gpio, unsigned ngpio)
{
	/* gpio + 0 is "mmc0_cd" (input/IRQ),
	 * gpio + 1 is "mmc1_cd" (input/IRQ)
	 */
	mmc[0].gpio_cd = gpio + 0;
	mmc[1].gpio_cd = gpio + 1;
	omap_hsmmc_late_init(mmc);

	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");

	/* gpio + 15 is "sub_lcd_nRST" (output) */
	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");

	omap_twl4030_audio_data.jack_detect = gpio + 2;
	omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);

	return 0;
}

static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
	.pulldowns	= BIT(2) | BIT(6) | BIT(8) | BIT(13)
				| BIT(16) | BIT(17),
	.setup		= sdp3430_twl_gpio_setup,
};

/* regulator consumer mappings */

/* ads7846 on SPI */
static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
	REGULATOR_SUPPLY("vcc", "spi1.0"),
};

static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};

static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
};

static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
};

/*
 * Apply all the fixed voltages since most versions of U-Boot
 * don't bother with that initialization.
 */

/* VAUX1 for mainboard (irda and sub-lcd) */
static struct regulator_init_data sdp3430_vaux1 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VAUX2 for camera module */
static struct regulator_init_data sdp3430_vaux2 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VAUX3 for LCD board */
static struct regulator_init_data sdp3430_vaux3 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies		= ARRAY_SIZE(sdp3430_vaux3_supplies),
	.consumer_supplies		= sdp3430_vaux3_supplies,
};

/* VAUX4 for OMAP VDD_CSI2 (camera) */
static struct regulator_init_data sdp3430_vaux4 = {
	.constraints = {
		.min_uV			= 1800000,
		.max_uV			= 1800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
static struct regulator_init_data sdp3430_vmmc1 = {
	.constraints = {
		.min_uV			= 1850000,
		.max_uV			= 3150000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
					| REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc1_supplies),
	.consumer_supplies	= sdp3430_vmmc1_supplies,
};

/* VMMC2 for MMC2 card */
static struct regulator_init_data sdp3430_vmmc2 = {
	.constraints = {
		.min_uV			= 1850000,
		.max_uV			= 1850000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc2_supplies),
	.consumer_supplies	= sdp3430_vmmc2_supplies,
};

/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
static struct regulator_init_data sdp3430_vsim = {
	.constraints = {
		.min_uV			= 1800000,
		.max_uV			= 3000000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
					| REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vsim_supplies),
	.consumer_supplies	= sdp3430_vsim_supplies,
};

static struct twl4030_platform_data sdp3430_twldata = {
	/* platform_data for children goes here */
	.gpio		= &sdp3430_gpio_data,
	.keypad		= &sdp3430_kp_data,

	.vaux1		= &sdp3430_vaux1,
	.vaux2		= &sdp3430_vaux2,
	.vaux3		= &sdp3430_vaux3,
	.vaux4		= &sdp3430_vaux4,
	.vmmc1		= &sdp3430_vmmc1,
	.vmmc2		= &sdp3430_vmmc2,
	.vsim		= &sdp3430_vsim,
};

static int __init omap3430_i2c_init(void)
{
	/* i2c1 for PMIC only */
	omap3_pmic_get_config(&sdp3430_twldata,
			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
			TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
	sdp3430_twldata.vdac->constraints.apply_uV = true;
	sdp3430_twldata.vpll2->constraints.apply_uV = true;
	sdp3430_twldata.vpll2->constraints.name = "VDVI";

	sdp3430_twldata.audio->codec->hs_extmute = 1;
	sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;

	omap3_pmic_init("twl4030", &sdp3430_twldata);

	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
	omap_register_i2c_bus(2, 400, NULL, 0);
	/* i2c3 on display connector (for DVI, tfp410) */
	omap_register_i2c_bus(3, 400, NULL, 0);
	return 0;
}

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)

static struct omap_smc91x_platform_data board_smc91x_data = {
	.cs		= 3,
	.flags		= GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
				IORESOURCE_IRQ_LOWLEVEL,
};

static void __init board_smc91x_init(void)
{
	if (omap_rev() > OMAP3430_REV_ES1_0)
		board_smc91x_data.gpio_irq = 6;
	else
		board_smc91x_data.gpio_irq = 29;

	gpmc_smc91x_init(&board_smc91x_data);
}

#else

static inline void board_smc91x_init(void)
{
}

#endif

static void enable_board_wakeup_source(void)
{
	/* T2 interrupt line (keypad) */
	omap_mux_init_signal("sys_nirq",
		OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
}

static struct usbhs_phy_data phy_data[] __initdata = {
	{
		.port = 1,
		.reset_gpio = 57,
		.vcc_gpio = -EINVAL,
	},
	{
		.port = 2,
		.reset_gpio = 61,
		.vcc_gpio = -EINVAL,
	},
};

static struct usbhs_omap_platform_data usbhs_bdata __initdata = {

	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
};

#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
	{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
#define board_mux	NULL
#endif

/*
 * SDP3430 V2 Board CS organization
 * Different from SDP3430 V1. Now 4 switches used to specify CS
 *
 * See also the Switch S8 settings in the comments.
 */
static char chip_sel_3430[][GPMC_CS_NUM] = {
	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
};

static struct mtd_partition sdp_nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
		.name		= "Bootloader-NOR",
		.offset		= 0,
		.size		= SZ_256K,
		.mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
		.name		= "Params-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_256K,
		.mask_flags	= 0,
	},
	/* kernel */
	{
		.name		= "Kernel-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0
	},
	/* file system */
	{
		.name		= "Filesystem-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0
	}
};

static struct mtd_partition sdp_onenand_partitions[] = {
	{
		.name		= "X-Loader-OneNAND",
		.offset		= 0,
		.size		= 4 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	},
	{
		.name		= "U-Boot-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	},
	{
		.name		= "U-Boot Environment-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 1 * (64 * 2048),
	},
	{
		.name		= "Kernel-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 16 * (64 * 2048),
	},
	{
		.name		= "File System-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
	},
};

static struct mtd_partition sdp_nand_partitions[] = {
	/* All the partition sizes are listed in terms of NAND block size */
	{
		.name		= "X-Loader-NAND",
		.offset		= 0,
		.size		= 4 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "U-Boot-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
		.size		= 10 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "Boot Env-NAND",

		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1c0000 */
		.size		= 6 * (64 * 2048),
	},
	{
		.name		= "Kernel-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x280000 */
		.size		= 40 * (64 * 2048),
	},
	{
		.name		= "File System - NAND",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x780000 */
	},
};

static struct flash_partitions sdp_flash_partitions[] = {
	{
		.parts = sdp_nor_partitions,
		.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
	},
	{
		.parts = sdp_onenand_partitions,
		.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
	},
	{
		.parts = sdp_nand_partitions,
		.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
	},
};

static void __init omap_3430sdp_init(void)
{
	int gpio_pendown;

	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
	omap_hsmmc_init(mmc);
	omap3430_i2c_init();
	omap_display_init(&sdp3430_dss_data);
	if (omap_rev() > OMAP3430_REV_ES1_0)
		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
	else
		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
	omap_ads7846_init(1, gpio_pendown, 310, NULL);
	omap_serial_init();
	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
	usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
	usb_musb_init(NULL);
	board_smc91x_init();
	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
	sdp3430_display_init();
	enable_board_wakeup_source();

	usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
	usbhs_init(&usbhs_bdata);
}

MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
	/* Maintainer: Syed Khasim - Texas Instruments Inc */
	.atag_offset	= 0x100,
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_irq	= omap3_init_irq,
	.handle_irq	= omap3_intc_handle_irq,
	.init_machine	= omap_3430sdp_init,
	.init_late	= omap3430_init_late,
	.init_time	= omap3_sync32k_timer_init,
	.restart	= omap3xxx_restart,
MACHINE_END
Commit	Line	Data
6fdc29e2 SMK	1	/*
	2	* linux/arch/arm/mach-omap2/board-3430sdp.c
	3	*
	4	* Copyright (C) 2007 Texas Instruments
	5	*
	6	* Modified from mach-omap2/board-generic.c
	7	*
	8	* Initial code: Syed Mohammed Khasim
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/delay.h>
	19	#include <linux/input.h>
6135434a	20	#include <linux/input/matrix_keypad.h>
6fdc29e2	21	#include <linux/spi/spi.h>
b07682b6	22	#include <linux/i2c/twl.h>
6fdc29e2 SMK	23	#include <linux/regulator/machine.h>
	24	#include <linux/io.h>
	25	#include <linux/gpio.h>
3a63833e	26	#include <linux/mmc/host.h>
2203747c	27	#include <linux/platform_data/spi-omap2-mcspi.h>
77f86144	28	#include <linux/platform_data/omap-twl4030.h>
51482be9	29	#include <linux/usb/phy.h>
6fdc29e2	30
6fdc29e2 SMK	31	#include <asm/mach-types.h>
	32	#include <asm/mach/arch.h>
	33	#include <asm/mach/map.h>
	34
4e65331c	35	#include "common.h"
45c3eb7d	36	#include <linux/omap-dma.h>
a0b38cc4	37	#include <video/omapdss.h>
a0d8dde9	38	#include <video/omap-panel-data.h>
6fdc29e2	39
99f0b8d6	40	#include "gpmc.h"
60628152	41	#include "gpmc-smc91x.h"
6fdc29e2	42
e4c060db	43	#include "soc.h"
04aeae77	44	#include "board-flash.h"
ca5742bd	45	#include "mux.h"
17a722ca	46	#include "sdram-qimonda-hyb18m512160af-6.h"
d02a900b	47	#include "hsmmc.h"
bb4de3df	48	#include "pm.h"
4814ced5	49	#include "control.h"
96974a24	50	#include "common-board-devices.h"
6fdc29e2 SMK	51
	52	#define CONFIG_DISABLE_HFCLK 1
	53
6fdc29e2 SMK	54	#define SDP3430_TS_GPIO_IRQ_SDPV1 3
	55	#define SDP3430_TS_GPIO_IRQ_SDPV2 2
	56
	57	#define ENABLE_VAUX3_DEDICATED 0x03
	58	#define ENABLE_VAUX3_DEV_GRP 0x20
	59
	60	#define TWL4030_MSECURE_GPIO 22
	61
bead4375	62	static uint32_t board_keymap[] = {
6fdc29e2 SMK	63	KEY(0, 0, KEY_LEFT),
	64	KEY(0, 1, KEY_RIGHT),
	65	KEY(0, 2, KEY_A),
	66	KEY(0, 3, KEY_B),
	67	KEY(0, 4, KEY_C),
	68	KEY(1, 0, KEY_DOWN),
	69	KEY(1, 1, KEY_UP),
	70	KEY(1, 2, KEY_E),
	71	KEY(1, 3, KEY_F),
	72	KEY(1, 4, KEY_G),
	73	KEY(2, 0, KEY_ENTER),
	74	KEY(2, 1, KEY_I),
	75	KEY(2, 2, KEY_J),
	76	KEY(2, 3, KEY_K),
	77	KEY(2, 4, KEY_3),
	78	KEY(3, 0, KEY_M),
	79	KEY(3, 1, KEY_N),
	80	KEY(3, 2, KEY_O),
	81	KEY(3, 3, KEY_P),
	82	KEY(3, 4, KEY_Q),
	83	KEY(4, 0, KEY_R),
	84	KEY(4, 1, KEY_4),
	85	KEY(4, 2, KEY_T),
	86	KEY(4, 3, KEY_U),
	87	KEY(4, 4, KEY_D),
	88	KEY(5, 0, KEY_V),
	89	KEY(5, 1, KEY_W),
	90	KEY(5, 2, KEY_L),
	91	KEY(5, 3, KEY_S),
	92	KEY(5, 4, KEY_H),
	93	0
	94	};
	95
4f543332 TL	96	static struct matrix_keymap_data board_map_data = {
	97	.keymap = board_keymap,
	98	.keymap_size = ARRAY_SIZE(board_keymap),
	99	};
	100
6fdc29e2	101	static struct twl4030_keypad_data sdp3430_kp_data = {
4f543332	102	.keymap_data = &board_map_data,
6fdc29e2 SMK	103	.rows = 5,
6fdc29e2 SMK	104	.cols = 6,
6fdc29e2 SMK	105	.rep = 1,
	106	};
	107
d9056ce2 TV	108	#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
	109	#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
	110
d9056ce2 TV	111	static void __init sdp3430_display_init(void)
	112	{
	113	int r;
	114
a05f92b7 AT	115	/*
	116	* the backlight GPIO doesn't directly go to the panel, it enables
	117	* an internal circuit on 3430sdp to create the signal V_BKL_28V,
	118	* this is connected to LED+ pin of the sharp panel. This GPIO
	119	* is left enabled in the board file, and not passed to the panel
	120	* as platform_data.
	121	*/
	122	r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO,
	123	GPIOF_OUT_INIT_HIGH, "LCD Backlight");
bc593f5d	124	if (r)
a05f92b7	125	pr_err("failed to get LCD Backlight GPIO\n");
d9056ce2	126
d9056ce2 TV	127	}
d9056ce2 TV	128
a05f92b7 AT	129	static struct panel_sharp_ls037v7dw01_data sdp3430_lcd_data = {
	130	.resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO,
	131	.ini_gpio = -1,
	132	.mo_gpio = -1,
	133	.lr_gpio = -1,
	134	.ud_gpio = -1,
	135	};
d9056ce2 TV	136
	137	static struct omap_dss_device sdp3430_lcd_device = {
	138	.name = "lcd",
	139	.driver_name = "sharp_ls_panel",
	140	.type = OMAP_DISPLAY_TYPE_DPI,
	141	.phy.dpi.data_lines = 16,
a05f92b7	142	.data = &sdp3430_lcd_data,
6fdc29e2 SMK	143	};
6fdc29e2 SMK	144
2e6f2ee7	145	static struct tfp410_platform_data dvi_panel = {
e813a55e	146	.power_down_gpio = -1,
ca2e16fa	147	.i2c_bus_num = -1,
89747c91 BW	148	};
89747c91 BW	149
d9056ce2 TV	150	static struct omap_dss_device sdp3430_dvi_device = {
d9056ce2 TV	151	.name = "dvi",
d9056ce2	152	.type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7	153	.driver_name = "tfp410",
89747c91	154	.data = &dvi_panel,
d9056ce2	155	.phy.dpi.data_lines = 24,
6fdc29e2 SMK	156	};
6fdc29e2 SMK	157
d9056ce2 TV	158	static struct omap_dss_device sdp3430_tv_device = {
	159	.name = "tv",
	160	.driver_name = "venc",
	161	.type = OMAP_DISPLAY_TYPE_VENC,
	162	.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
6fdc29e2 SMK	163	};
6fdc29e2 SMK	164
d9056ce2 TV	165
d9056ce2 TV	166	static struct omap_dss_device *sdp3430_dss_devices[] = {
6fdc29e2	167	&sdp3430_lcd_device,
d9056ce2 TV	168	&sdp3430_dvi_device,
d9056ce2 TV	169	&sdp3430_tv_device,
6fdc29e2 SMK	170	};
6fdc29e2 SMK	171
d9056ce2 TV	172	static struct omap_dss_board_info sdp3430_dss_data = {
	173	.num_devices = ARRAY_SIZE(sdp3430_dss_devices),
	174	.devices = sdp3430_dss_devices,
	175	.default_device = &sdp3430_lcd_device,
	176	};
	177
68ff0423	178	static struct omap2_hsmmc_info mmc[] = {
6fdc29e2 SMK	179	{
	180	.mmc = 1,
	181	/* 8 bits (default) requires S6.3 == ON,
	182	* so the SIM card isn't used; else 4 bits.
	183	*/
3a63833e	184	.caps = MMC_CAP_4_BIT_DATA \| MMC_CAP_8_BIT_DATA,
6fdc29e2	185	.gpio_wp = 4,
3b972bf0	186	.deferred = true,
6fdc29e2 SMK	187	},
	188	{
	189	.mmc = 2,
3a63833e	190	.caps = MMC_CAP_4_BIT_DATA \| MMC_CAP_8_BIT_DATA,
6fdc29e2	191	.gpio_wp = 7,
3b972bf0	192	.deferred = true,
6fdc29e2 SMK	193	},
	194	{} /* Terminator */
	195	};
	196
77f86144 PU	197	static struct omap_tw4030_pdata omap_twl4030_audio_data = {
	198	.voice_connected = true,
	199	.custom_routing = true,
	200
	201	.has_hs = OMAP_TWL4030_LEFT \| OMAP_TWL4030_RIGHT,
	202	.has_hf = OMAP_TWL4030_LEFT \| OMAP_TWL4030_RIGHT,
	203
	204	.has_mainmic = true,
	205	.has_submic = true,
	206	.has_hsmic = true,
	207	.has_linein = OMAP_TWL4030_LEFT \| OMAP_TWL4030_RIGHT,
	208	};
	209
6fdc29e2 SMK	210	static int sdp3430_twl_gpio_setup(struct device *dev,
	211	unsigned gpio, unsigned ngpio)
	212	{
	213	/* gpio + 0 is "mmc0_cd" (input/IRQ),
	214	* gpio + 1 is "mmc1_cd" (input/IRQ)
	215	*/
	216	mmc[0].gpio_cd = gpio + 0;
	217	mmc[1].gpio_cd = gpio + 1;
3b972bf0	218	omap_hsmmc_late_init(mmc);
6fdc29e2	219
6fdc29e2	220	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
bc593f5d	221	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
6fdc29e2 SMK	222
6fdc29e2 SMK	223	/* gpio + 15 is "sub_lcd_nRST" (output) */
bc593f5d	224	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
6fdc29e2	225
77f86144 PU	226	omap_twl4030_audio_data.jack_detect = gpio + 2;
	227	omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
	228
6fdc29e2 SMK	229	return 0;
	230	}
	231
	232	static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
6fdc29e2 SMK	233	.pulldowns = BIT(2) \| BIT(6) \| BIT(8) \| BIT(13)
	234	\| BIT(16) \| BIT(17),
	235	.setup = sdp3430_twl_gpio_setup,
	236	};
	237
73a92aa4 RN	238	/* regulator consumer mappings */
73a92aa4 RN	239
4b087ff8 RN	240	/* ads7846 on SPI */
	241	static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
	242	REGULATOR_SUPPLY("vcc", "spi1.0"),
	243	};
	244
73a92aa4	245	static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
0005ae73	246	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
73a92aa4 RN	247	};
	248
	249	static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
0005ae73	250	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
73a92aa4 RN	251	};
	252
	253	static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
0005ae73	254	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
73a92aa4 RN	255	};
73a92aa4 RN	256
6fdc29e2 SMK	257	/*
	258	* Apply all the fixed voltages since most versions of U-Boot
	259	* don't bother with that initialization.
	260	*/
	261
	262	/* VAUX1 for mainboard (irda and sub-lcd) */
	263	static struct regulator_init_data sdp3430_vaux1 = {
	264	.constraints = {
	265	.min_uV = 2800000,
	266	.max_uV = 2800000,
	267	.apply_uV = true,
	268	.valid_modes_mask = REGULATOR_MODE_NORMAL
	269	\| REGULATOR_MODE_STANDBY,
	270	.valid_ops_mask = REGULATOR_CHANGE_MODE
	271	\| REGULATOR_CHANGE_STATUS,
	272	},
	273	};
	274
	275	/* VAUX2 for camera module */
	276	static struct regulator_init_data sdp3430_vaux2 = {
	277	.constraints = {
	278	.min_uV = 2800000,
	279	.max_uV = 2800000,
	280	.apply_uV = true,
	281	.valid_modes_mask = REGULATOR_MODE_NORMAL
	282	\| REGULATOR_MODE_STANDBY,
	283	.valid_ops_mask = REGULATOR_CHANGE_MODE
	284	\| REGULATOR_CHANGE_STATUS,
	285	},
	286	};
	287
	288	/* VAUX3 for LCD board */
	289	static struct regulator_init_data sdp3430_vaux3 = {
	290	.constraints = {
	291	.min_uV = 2800000,
	292	.max_uV = 2800000,
	293	.apply_uV = true,
	294	.valid_modes_mask = REGULATOR_MODE_NORMAL
	295	\| REGULATOR_MODE_STANDBY,
	296	.valid_ops_mask = REGULATOR_CHANGE_MODE
	297	\| REGULATOR_CHANGE_STATUS,
	298	},
4b087ff8 RN	299	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
4b087ff8 RN	300	.consumer_supplies = sdp3430_vaux3_supplies,
6fdc29e2 SMK	301	};
	302
	303	/* VAUX4 for OMAP VDD_CSI2 (camera) */
	304	static struct regulator_init_data sdp3430_vaux4 = {
	305	.constraints = {
	306	.min_uV = 1800000,
	307	.max_uV = 1800000,
	308	.apply_uV = true,
	309	.valid_modes_mask = REGULATOR_MODE_NORMAL
	310	\| REGULATOR_MODE_STANDBY,
	311	.valid_ops_mask = REGULATOR_CHANGE_MODE
	312	\| REGULATOR_CHANGE_STATUS,
	313	},
	314	};
	315
	316	/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
	317	static struct regulator_init_data sdp3430_vmmc1 = {
	318	.constraints = {
	319	.min_uV = 1850000,
	320	.max_uV = 3150000,
	321	.valid_modes_mask = REGULATOR_MODE_NORMAL
	322	\| REGULATOR_MODE_STANDBY,
	323	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
	324	\| REGULATOR_CHANGE_MODE
	325	\| REGULATOR_CHANGE_STATUS,
	326	},
73a92aa4 RN	327	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
73a92aa4 RN	328	.consumer_supplies = sdp3430_vmmc1_supplies,
6fdc29e2 SMK	329	};
	330
	331	/* VMMC2 for MMC2 card */
	332	static struct regulator_init_data sdp3430_vmmc2 = {
	333	.constraints = {
	334	.min_uV = 1850000,
	335	.max_uV = 1850000,
	336	.apply_uV = true,
	337	.valid_modes_mask = REGULATOR_MODE_NORMAL
	338	\| REGULATOR_MODE_STANDBY,
	339	.valid_ops_mask = REGULATOR_CHANGE_MODE
	340	\| REGULATOR_CHANGE_STATUS,
	341	},
73a92aa4 RN	342	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
73a92aa4 RN	343	.consumer_supplies = sdp3430_vmmc2_supplies,
6fdc29e2 SMK	344	};
	345
	346	/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
	347	static struct regulator_init_data sdp3430_vsim = {
	348	.constraints = {
	349	.min_uV = 1800000,
	350	.max_uV = 3000000,
	351	.valid_modes_mask = REGULATOR_MODE_NORMAL
	352	\| REGULATOR_MODE_STANDBY,
	353	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
	354	\| REGULATOR_CHANGE_MODE
	355	\| REGULATOR_CHANGE_STATUS,
	356	},
73a92aa4 RN	357	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
73a92aa4 RN	358	.consumer_supplies = sdp3430_vsim_supplies,
6fdc29e2 SMK	359	};
6fdc29e2 SMK	360
6fdc29e2	361	static struct twl4030_platform_data sdp3430_twldata = {
6fdc29e2	362	/* platform_data for children goes here */
6fdc29e2	363	.gpio = &sdp3430_gpio_data,
6fdc29e2	364	.keypad = &sdp3430_kp_data,
6fdc29e2 SMK	365
	366	.vaux1 = &sdp3430_vaux1,
	367	.vaux2 = &sdp3430_vaux2,
	368	.vaux3 = &sdp3430_vaux3,
	369	.vaux4 = &sdp3430_vaux4,
	370	.vmmc1 = &sdp3430_vmmc1,
	371	.vmmc2 = &sdp3430_vmmc2,
	372	.vsim = &sdp3430_vsim,
6fdc29e2 SMK	373	};
6fdc29e2 SMK	374
6fdc29e2 SMK	375	static int __init omap3430_i2c_init(void)
	376	{
	377	/* i2c1 for PMIC only */
827ed9ae	378	omap3_pmic_get_config(&sdp3430_twldata,
b252b0ef PU	379	TWL_COMMON_PDATA_USB \| TWL_COMMON_PDATA_BCI \|
	380	TWL_COMMON_PDATA_MADC \| TWL_COMMON_PDATA_AUDIO,
	381	TWL_COMMON_REGULATOR_VDAC \| TWL_COMMON_REGULATOR_VPLL2);
	382	sdp3430_twldata.vdac->constraints.apply_uV = true;
	383	sdp3430_twldata.vpll2->constraints.apply_uV = true;
	384	sdp3430_twldata.vpll2->constraints.name = "VDVI";
	385
7b00077a PU	386	sdp3430_twldata.audio->codec->hs_extmute = 1;
	387	sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
	388
fbd8071c	389	omap3_pmic_init("twl4030", &sdp3430_twldata);
827ed9ae	390
6fdc29e2 SMK	391	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
	392	omap_register_i2c_bus(2, 400, NULL, 0);
	393	/* i2c3 on display connector (for DVI, tfp410) */
	394	omap_register_i2c_bus(3, 400, NULL, 0);
	395	return 0;
	396	}
	397
1a48e157 TL	398	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	399
	400	static struct omap_smc91x_platform_data board_smc91x_data = {
	401	.cs = 3,
	402	.flags = GPMC_MUX_ADD_DATA \| GPMC_TIMINGS_SMC91C96 \|
	403	IORESOURCE_IRQ_LOWLEVEL,
	404	};
	405
	406	static void __init board_smc91x_init(void)
	407	{
	408	if (omap_rev() > OMAP3430_REV_ES1_0)
	409	board_smc91x_data.gpio_irq = 6;
	410	else
	411	board_smc91x_data.gpio_irq = 29;
	412
	413	gpmc_smc91x_init(&board_smc91x_data);
	414	}
	415
	416	#else
	417
	418	static inline void board_smc91x_init(void)
	419	{
	420	}
	421
	422	#endif
	423
5110b298 RT	424	static void enable_board_wakeup_source(void)
5110b298 RT	425	{
4896e394 TL	426	/* T2 interrupt line (keypad) */
	427	omap_mux_init_signal("sys_nirq",
	428	OMAP_WAKEUP_EN \| OMAP_PIN_INPUT_PULLUP);
5110b298 RT	429	}
5110b298 RT	430
0047c909 RQ	431	static struct usbhs_phy_data phy_data[] __initdata = {
	432	{
	433	.port = 1,
	434	.reset_gpio = 57,
	435	.vcc_gpio = -EINVAL,
	436	},
	437	{
	438	.port = 2,
	439	.reset_gpio = 61,
	440	.vcc_gpio = -EINVAL,
	441	},
	442	};
	443
42973159	444	static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
58a5491c	445
181b250c KM	446	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
181b250c KM	447	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
58a5491c FB	448	};
58a5491c FB	449
ca5742bd TL	450	#ifdef CONFIG_OMAP_MUX
	451	static struct omap_board_mux board_mux[] __initdata = {
	452	{ .reg_offset = OMAP_MUX_TERMINATOR },
	453	};
626dda8a S	454	#else
626dda8a S	455	#define board_mux NULL
ca5742bd TL	456	#endif
ca5742bd TL	457
13d6b73c SG	458	/*
	459	* SDP3430 V2 Board CS organization
	460	* Different from SDP3430 V1. Now 4 switches used to specify CS
	461	*
	462	* See also the Switch S8 settings in the comments.
	463	*/
	464	static char chip_sel_3430[][GPMC_CS_NUM] = {
	465	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
	466	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
	467	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
	468	};
	469
88c8460a VS	470	static struct mtd_partition sdp_nor_partitions[] = {
	471	/* bootloader (U-Boot, etc) in first sector */
	472	{
	473	.name = "Bootloader-NOR",
	474	.offset = 0,
	475	.size = SZ_256K,
	476	.mask_flags = MTD_WRITEABLE, /* force read-only */
	477	},
	478	/* bootloader params in the next sector */
	479	{
	480	.name = "Params-NOR",
	481	.offset = MTDPART_OFS_APPEND,
	482	.size = SZ_256K,
	483	.mask_flags = 0,
	484	},
	485	/* kernel */
	486	{
	487	.name = "Kernel-NOR",
	488	.offset = MTDPART_OFS_APPEND,
	489	.size = SZ_2M,
	490	.mask_flags = 0
	491	},
	492	/* file system */
	493	{
	494	.name = "Filesystem-NOR",
	495	.offset = MTDPART_OFS_APPEND,
	496	.size = MTDPART_SIZ_FULL,
	497	.mask_flags = 0
	498	}
	499	};
	500
	501	static struct mtd_partition sdp_onenand_partitions[] = {
	502	{
	503	.name = "X-Loader-OneNAND",
	504	.offset = 0,
	505	.size = 4 * (64 * 2048),
	506	.mask_flags = MTD_WRITEABLE /* force read-only */
	507	},
	508	{
	509	.name = "U-Boot-OneNAND",
	510	.offset = MTDPART_OFS_APPEND,
	511	.size = 2 * (64 * 2048),
	512	.mask_flags = MTD_WRITEABLE /* force read-only */
	513	},
	514	{
	515	.name = "U-Boot Environment-OneNAND",
	516	.offset = MTDPART_OFS_APPEND,
	517	.size = 1 * (64 * 2048),
	518	},
	519	{
	520	.name = "Kernel-OneNAND",
	521	.offset = MTDPART_OFS_APPEND,
	522	.size = 16 * (64 * 2048),
	523	},
	524	{
	525	.name = "File System-OneNAND",
	526	.offset = MTDPART_OFS_APPEND,
	527	.size = MTDPART_SIZ_FULL,
	528	},
	529	};
	530
	531	static struct mtd_partition sdp_nand_partitions[] = {
	532	/* All the partition sizes are listed in terms of NAND block size */
	533	{
534	.name = "X-Loader-NAND",
535	.offset = 0,
536	.size = 4 * (64 * 2048),
537	.mask_flags = MTD_WRITEABLE, /* force read-only */
538	},
539	{
540	.name = "U-Boot-NAND",
541	.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
542	.size = 10 * (64 * 2048),
543	.mask_flags = MTD_WRITEABLE, /* force read-only */
544	},
545	{
546	.name = "Boot Env-NAND",
547
548	.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
549	.size = 6 * (64 * 2048),
550	},
551	{
552	.name = "Kernel-NAND",
553	.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
554	.size = 40 * (64 * 2048),
555	},
556	{
557	.name = "File System - NAND",
558	.size = MTDPART_SIZ_FULL,
559	.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
560	},
561	};
562
563	static struct flash_partitions sdp_flash_partitions[] = {
564	{
565	.parts = sdp_nor_partitions,
566	.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
567	},
568	{
569	.parts = sdp_onenand_partitions,
570	.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
571	},
572	{
573	.parts = sdp_nand_partitions,
574	.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
575	},
576	};
577
6fdc29e2 SMK	578	static void __init omap_3430sdp_init(void)
6fdc29e2 SMK	579	{
96974a24 MR	580	int gpio_pendown;
96974a24 MR	581
ca5742bd	582	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
3b972bf0	583	omap_hsmmc_init(mmc);
6fdc29e2	584	omap3430_i2c_init();
d5e13227	585	omap_display_init(&sdp3430_dss_data);
6fdc29e2	586	if (omap_rev() > OMAP3430_REV_ES1_0)
96974a24	587	gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
6fdc29e2	588	else
96974a24 MR	589	gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
96974a24 MR	590	omap_ads7846_init(1, gpio_pendown, 310, NULL);
7496ba30	591	omap_serial_init();
a4ca9dbe	592	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
51482be9	593	usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
9e18630b	594	usb_musb_init(NULL);
1a48e157	595	board_smc91x_init();
d5ce2b65	596	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
d9056ce2	597	sdp3430_display_init();
5110b298	598	enable_board_wakeup_source();
0047c909 RQ	599
0047c909 RQ	600	usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
9e64bb1e	601	usbhs_init(&usbhs_bdata);
6fdc29e2 SMK	602	}
6fdc29e2 SMK	603
6fdc29e2 SMK	604	MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
6fdc29e2 SMK	605	/* Maintainer: Syed Khasim - Texas Instruments Inc */
5e52b435	606	.atag_offset = 0x100,
71ee7dad	607	.reserve = omap_reserve,
3dc3bad6	608	.map_io = omap3_map_io,
8f5b5a41	609	.init_early = omap3430_init_early,
741e3a89	610	.init_irq = omap3_init_irq,
6b2f55d7	611	.handle_irq = omap3_intc_handle_irq,
6fdc29e2	612	.init_machine = omap_3430sdp_init,
bbd707ac	613	.init_late = omap3430_init_late,
6bb27d73	614	.init_time = omap3_sync32k_timer_init,
187e3e06	615	.restart = omap3xxx_restart,
6fdc29e2	616	MACHINE_END