[deliverable/linux.git] / arch / arm / mach-omap2 / board-3430sdp.c

/*
 * linux/arch/arm/mach-omap2/board-3430sdp.c
 *
 * Copyright (C) 2007 Texas Instruments
 *
 * Modified from mach-omap2/board-generic.c
 *
 * Initial code: Syed Mohammed Khasim
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/i2c/twl.h>
#include <linux/regulator/machine.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/mmc/host.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include <plat/mcspi.h>
#include <plat/board.h>
#include <plat/usb.h>
#include "common.h"
#include <plat/dma.h>
#include <plat/gpmc.h>
#include <video/omapdss.h>
#include <video/omap-panel-dvi.h>

#include <plat/gpmc-smc91x.h>

#include "board-flash.h"
#include "mux.h"
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
#include "control.h"
#include "common-board-devices.h"

#define CONFIG_DISABLE_HFCLK 1

#define SDP3430_TS_GPIO_IRQ_SDPV1	3
#define SDP3430_TS_GPIO_IRQ_SDPV2	2

#define ENABLE_VAUX3_DEDICATED	0x03
#define ENABLE_VAUX3_DEV_GRP	0x20

#define TWL4030_MSECURE_GPIO 22

static uint32_t board_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(0, 1, KEY_RIGHT),
	KEY(0, 2, KEY_A),
	KEY(0, 3, KEY_B),
	KEY(0, 4, KEY_C),
	KEY(1, 0, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(1, 2, KEY_E),
	KEY(1, 3, KEY_F),
	KEY(1, 4, KEY_G),
	KEY(2, 0, KEY_ENTER),
	KEY(2, 1, KEY_I),
	KEY(2, 2, KEY_J),
	KEY(2, 3, KEY_K),
	KEY(2, 4, KEY_3),
	KEY(3, 0, KEY_M),
	KEY(3, 1, KEY_N),
	KEY(3, 2, KEY_O),
	KEY(3, 3, KEY_P),
	KEY(3, 4, KEY_Q),
	KEY(4, 0, KEY_R),
	KEY(4, 1, KEY_4),
	KEY(4, 2, KEY_T),
	KEY(4, 3, KEY_U),
	KEY(4, 4, KEY_D),
	KEY(5, 0, KEY_V),
	KEY(5, 1, KEY_W),
	KEY(5, 2, KEY_L),
	KEY(5, 3, KEY_S),
	KEY(5, 4, KEY_H),
	0
};

static struct matrix_keymap_data board_map_data = {
	.keymap			= board_keymap,
	.keymap_size		= ARRAY_SIZE(board_keymap),
};

static struct twl4030_keypad_data sdp3430_kp_data = {
	.keymap_data	= &board_map_data,
	.rows		= 5,
	.cols		= 6,
	.rep		= 1,
};

#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO	8
#define SDP3430_LCD_PANEL_ENABLE_GPIO		5

static struct gpio sdp3430_dss_gpios[] __initdata = {
	{SDP3430_LCD_PANEL_ENABLE_GPIO,    GPIOF_OUT_INIT_LOW, "LCD reset"    },
	{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
};

static void __init sdp3430_display_init(void)
{
	int r;

	r = gpio_request_array(sdp3430_dss_gpios,
			       ARRAY_SIZE(sdp3430_dss_gpios));
	if (r)
		printk(KERN_ERR "failed to get LCD control GPIOs\n");

}

static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
{
	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);

	return 0;
}

static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
{
	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
}

static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
{
	return 0;
}

static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
{
}


static struct omap_dss_device sdp3430_lcd_device = {
	.name			= "lcd",
	.driver_name		= "sharp_ls_panel",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.phy.dpi.data_lines	= 16,
	.platform_enable	= sdp3430_panel_enable_lcd,
	.platform_disable	= sdp3430_panel_disable_lcd,
};

static struct panel_dvi_platform_data dvi_panel = {
	.power_down_gpio	= -1,
};

static struct omap_dss_device sdp3430_dvi_device = {
	.name			= "dvi",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.driver_name		= "dvi",
	.data			= &dvi_panel,
	.phy.dpi.data_lines	= 24,
};

static struct omap_dss_device sdp3430_tv_device = {
	.name			= "tv",
	.driver_name		= "venc",
	.type			= OMAP_DISPLAY_TYPE_VENC,
	.phy.venc.type		= OMAP_DSS_VENC_TYPE_SVIDEO,
	.platform_enable	= sdp3430_panel_enable_tv,
	.platform_disable	= sdp3430_panel_disable_tv,
};


static struct omap_dss_device *sdp3430_dss_devices[] = {
	&sdp3430_lcd_device,
	&sdp3430_dvi_device,
	&sdp3430_tv_device,
};

static struct omap_dss_board_info sdp3430_dss_data = {
	.num_devices	= ARRAY_SIZE(sdp3430_dss_devices),
	.devices	= sdp3430_dss_devices,
	.default_device	= &sdp3430_lcd_device,
};

static struct omap_board_config_kernel sdp3430_config[] __initdata = {
};

static struct omap2_hsmmc_info mmc[] = {
	{
		.mmc		= 1,
		/* 8 bits (default) requires S6.3 == ON,
		 * so the SIM card isn't used; else 4 bits.
		 */
		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
		.gpio_wp	= 4,
		.deferred	= true,
	},
	{
		.mmc		= 2,
		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
		.gpio_wp	= 7,
		.deferred	= true,
	},
	{}	/* Terminator */
};

static int sdp3430_twl_gpio_setup(struct device *dev,
		unsigned gpio, unsigned ngpio)
{
	/* gpio + 0 is "mmc0_cd" (input/IRQ),
	 * gpio + 1 is "mmc1_cd" (input/IRQ)
	 */
	mmc[0].gpio_cd = gpio + 0;
	mmc[1].gpio_cd = gpio + 1;
	omap_hsmmc_late_init(mmc);

	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");

	/* gpio + 15 is "sub_lcd_nRST" (output) */
	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");

	return 0;
}

static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
	.gpio_base	= OMAP_MAX_GPIO_LINES,
	.irq_base	= TWL4030_GPIO_IRQ_BASE,
	.irq_end	= TWL4030_GPIO_IRQ_END,
	.pulldowns	= BIT(2) | BIT(6) | BIT(8) | BIT(13)
				| BIT(16) | BIT(17),
	.setup		= sdp3430_twl_gpio_setup,
};

/* regulator consumer mappings */

/* ads7846 on SPI */
static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
	REGULATOR_SUPPLY("vcc", "spi1.0"),
};

static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};

static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
};

static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
};

/*
 * Apply all the fixed voltages since most versions of U-Boot
 * don't bother with that initialization.
 */

/* VAUX1 for mainboard (irda and sub-lcd) */
static struct regulator_init_data sdp3430_vaux1 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VAUX2 for camera module */
static struct regulator_init_data sdp3430_vaux2 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VAUX3 for LCD board */
static struct regulator_init_data sdp3430_vaux3 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies		= ARRAY_SIZE(sdp3430_vaux3_supplies),
	.consumer_supplies		= sdp3430_vaux3_supplies,
};

/* VAUX4 for OMAP VDD_CSI2 (camera) */
static struct regulator_init_data sdp3430_vaux4 = {
	.constraints = {
		.min_uV			= 1800000,
		.max_uV			= 1800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
static struct regulator_init_data sdp3430_vmmc1 = {
	.constraints = {
		.min_uV			= 1850000,
		.max_uV			= 3150000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
					| REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc1_supplies),
	.consumer_supplies	= sdp3430_vmmc1_supplies,
};

/* VMMC2 for MMC2 card */
static struct regulator_init_data sdp3430_vmmc2 = {
	.constraints = {
		.min_uV			= 1850000,
		.max_uV			= 1850000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc2_supplies),
	.consumer_supplies	= sdp3430_vmmc2_supplies,
};

/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
static struct regulator_init_data sdp3430_vsim = {
	.constraints = {
		.min_uV			= 1800000,
		.max_uV			= 3000000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
					| REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vsim_supplies),
	.consumer_supplies	= sdp3430_vsim_supplies,
};

static struct twl4030_platform_data sdp3430_twldata = {
	/* platform_data for children goes here */
	.gpio		= &sdp3430_gpio_data,
	.keypad		= &sdp3430_kp_data,

	.vaux1		= &sdp3430_vaux1,
	.vaux2		= &sdp3430_vaux2,
	.vaux3		= &sdp3430_vaux3,
	.vaux4		= &sdp3430_vaux4,
	.vmmc1		= &sdp3430_vmmc1,
	.vmmc2		= &sdp3430_vmmc2,
	.vsim		= &sdp3430_vsim,
};

static int __init omap3430_i2c_init(void)
{
	/* i2c1 for PMIC only */
	omap3_pmic_get_config(&sdp3430_twldata,
			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
			TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
	sdp3430_twldata.vdac->constraints.apply_uV = true;
	sdp3430_twldata.vpll2->constraints.apply_uV = true;
	sdp3430_twldata.vpll2->constraints.name = "VDVI";

	omap3_pmic_init("twl4030", &sdp3430_twldata);

	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
	omap_register_i2c_bus(2, 400, NULL, 0);
	/* i2c3 on display connector (for DVI, tfp410) */
	omap_register_i2c_bus(3, 400, NULL, 0);
	return 0;
}

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)

static struct omap_smc91x_platform_data board_smc91x_data = {
	.cs		= 3,
	.flags		= GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
				IORESOURCE_IRQ_LOWLEVEL,
};

static void __init board_smc91x_init(void)
{
	if (omap_rev() > OMAP3430_REV_ES1_0)
		board_smc91x_data.gpio_irq = 6;
	else
		board_smc91x_data.gpio_irq = 29;

	gpmc_smc91x_init(&board_smc91x_data);
}

#else

static inline void board_smc91x_init(void)
{
}

#endif

static void enable_board_wakeup_source(void)
{
	/* T2 interrupt line (keypad) */
	omap_mux_init_signal("sys_nirq",
		OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
}

static const struct usbhs_omap_board_data usbhs_bdata __initconst = {

	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,

	.phy_reset  = true,
	.reset_gpio_port[0]  = 57,
	.reset_gpio_port[1]  = 61,
	.reset_gpio_port[2]  = -EINVAL
};

#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
	{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
#define board_mux	NULL
#endif

/*
 * SDP3430 V2 Board CS organization
 * Different from SDP3430 V1. Now 4 switches used to specify CS
 *
 * See also the Switch S8 settings in the comments.
 */
static char chip_sel_3430[][GPMC_CS_NUM] = {
	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
};

static struct mtd_partition sdp_nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
		.name		= "Bootloader-NOR",
		.offset		= 0,
		.size		= SZ_256K,
		.mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
		.name		= "Params-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_256K,
		.mask_flags	= 0,
	},
	/* kernel */
	{
		.name		= "Kernel-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0
	},
	/* file system */
	{
		.name		= "Filesystem-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0
	}
};

static struct mtd_partition sdp_onenand_partitions[] = {
	{
		.name		= "X-Loader-OneNAND",
		.offset		= 0,
		.size		= 4 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	},
	{
		.name		= "U-Boot-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	},
	{
		.name		= "U-Boot Environment-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 1 * (64 * 2048),
	},
	{
		.name		= "Kernel-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 16 * (64 * 2048),
	},
	{
		.name		= "File System-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
	},
};

static struct mtd_partition sdp_nand_partitions[] = {
	/* All the partition sizes are listed in terms of NAND block size */
	{
		.name		= "X-Loader-NAND",
		.offset		= 0,
		.size		= 4 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "U-Boot-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
		.size		= 10 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "Boot Env-NAND",

		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1c0000 */
		.size		= 6 * (64 * 2048),
	},
	{
		.name		= "Kernel-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x280000 */
		.size		= 40 * (64 * 2048),
	},
	{
		.name		= "File System - NAND",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x780000 */
	},
};

static struct flash_partitions sdp_flash_partitions[] = {
	{
		.parts = sdp_nor_partitions,
		.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
	},
	{
		.parts = sdp_onenand_partitions,
		.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
	},
	{
		.parts = sdp_nand_partitions,
		.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
	},
};

static void __init omap_3430sdp_init(void)
{
	int gpio_pendown;

	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
	omap_board_config = sdp3430_config;
	omap_board_config_size = ARRAY_SIZE(sdp3430_config);
	omap_hsmmc_init(mmc);
	omap3430_i2c_init();
	omap_display_init(&sdp3430_dss_data);
	if (omap_rev() > OMAP3430_REV_ES1_0)
		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
	else
		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
	omap_ads7846_init(1, gpio_pendown, 310, NULL);
	omap_serial_init();
	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
	usb_musb_init(NULL);
	board_smc91x_init();
	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
	sdp3430_display_init();
	enable_board_wakeup_source();
	usbhs_init(&usbhs_bdata);
}

MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
	/* Maintainer: Syed Khasim - Texas Instruments Inc */
	.atag_offset	= 0x100,
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_irq	= omap3_init_irq,
	.handle_irq	= omap3_intc_handle_irq,
	.init_machine	= omap_3430sdp_init,
	.timer		= &omap3_timer,
	.restart	= omap_prcm_restart,
MACHINE_END
Commit	Line	Data
6fdc29e2 SMK	1	/*
	2	* linux/arch/arm/mach-omap2/board-3430sdp.c
	3	*
	4	* Copyright (C) 2007 Texas Instruments
	5	*
	6	* Modified from mach-omap2/board-generic.c
	7	*
	8	* Initial code: Syed Mohammed Khasim
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/delay.h>
	19	#include <linux/input.h>
6135434a	20	#include <linux/input/matrix_keypad.h>
6fdc29e2	21	#include <linux/spi/spi.h>
b07682b6	22	#include <linux/i2c/twl.h>
6fdc29e2 SMK	23	#include <linux/regulator/machine.h>
	24	#include <linux/io.h>
	25	#include <linux/gpio.h>
3a63833e	26	#include <linux/mmc/host.h>
6fdc29e2 SMK	27
	28	#include <mach/hardware.h>
	29	#include <asm/mach-types.h>
	30	#include <asm/mach/arch.h>
	31	#include <asm/mach/map.h>
	32
ce491cf8	33	#include <plat/mcspi.h>
ce491cf8 TL	34	#include <plat/board.h>
ce491cf8 TL	35	#include <plat/usb.h>
4e65331c	36	#include "common.h"
ce491cf8 TL	37	#include <plat/dma.h>
ce491cf8 TL	38	#include <plat/gpmc.h>
a0b38cc4	39	#include <video/omapdss.h>
1d7a8654	40	#include <video/omap-panel-dvi.h>
6fdc29e2	41
ce491cf8	42	#include <plat/gpmc-smc91x.h>
6fdc29e2	43
04aeae77	44	#include "board-flash.h"
ca5742bd	45	#include "mux.h"
17a722ca	46	#include "sdram-qimonda-hyb18m512160af-6.h"
d02a900b	47	#include "hsmmc.h"
bb4de3df	48	#include "pm.h"
4814ced5	49	#include "control.h"
96974a24	50	#include "common-board-devices.h"
6fdc29e2 SMK	51
	52	#define CONFIG_DISABLE_HFCLK 1
	53
6fdc29e2 SMK	54	#define SDP3430_TS_GPIO_IRQ_SDPV1 3
	55	#define SDP3430_TS_GPIO_IRQ_SDPV2 2
	56
	57	#define ENABLE_VAUX3_DEDICATED 0x03
	58	#define ENABLE_VAUX3_DEV_GRP 0x20
	59
	60	#define TWL4030_MSECURE_GPIO 22
	61
bead4375	62	static uint32_t board_keymap[] = {
6fdc29e2 SMK	63	KEY(0, 0, KEY_LEFT),
	64	KEY(0, 1, KEY_RIGHT),
	65	KEY(0, 2, KEY_A),
	66	KEY(0, 3, KEY_B),
	67	KEY(0, 4, KEY_C),
	68	KEY(1, 0, KEY_DOWN),
	69	KEY(1, 1, KEY_UP),
	70	KEY(1, 2, KEY_E),
	71	KEY(1, 3, KEY_F),
	72	KEY(1, 4, KEY_G),
	73	KEY(2, 0, KEY_ENTER),
	74	KEY(2, 1, KEY_I),
	75	KEY(2, 2, KEY_J),
	76	KEY(2, 3, KEY_K),
	77	KEY(2, 4, KEY_3),
	78	KEY(3, 0, KEY_M),
	79	KEY(3, 1, KEY_N),
	80	KEY(3, 2, KEY_O),
	81	KEY(3, 3, KEY_P),
	82	KEY(3, 4, KEY_Q),
	83	KEY(4, 0, KEY_R),
	84	KEY(4, 1, KEY_4),
	85	KEY(4, 2, KEY_T),
	86	KEY(4, 3, KEY_U),
	87	KEY(4, 4, KEY_D),
	88	KEY(5, 0, KEY_V),
	89	KEY(5, 1, KEY_W),
	90	KEY(5, 2, KEY_L),
	91	KEY(5, 3, KEY_S),
	92	KEY(5, 4, KEY_H),
	93	0
	94	};
	95
4f543332 TL	96	static struct matrix_keymap_data board_map_data = {
	97	.keymap = board_keymap,
	98	.keymap_size = ARRAY_SIZE(board_keymap),
	99	};
	100
6fdc29e2	101	static struct twl4030_keypad_data sdp3430_kp_data = {
4f543332	102	.keymap_data = &board_map_data,
6fdc29e2 SMK	103	.rows = 5,
6fdc29e2 SMK	104	.cols = 6,
6fdc29e2 SMK	105	.rep = 1,
	106	};
	107
d9056ce2 TV	108	#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
	109	#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
	110
bc593f5d IG	111	static struct gpio sdp3430_dss_gpios[] __initdata = {
	112	{SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
	113	{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
	114	};
	115
d9056ce2 TV	116	static void __init sdp3430_display_init(void)
	117	{
	118	int r;
	119
bc593f5d IG	120	r = gpio_request_array(sdp3430_dss_gpios,
	121	ARRAY_SIZE(sdp3430_dss_gpios));
	122	if (r)
	123	printk(KERN_ERR "failed to get LCD control GPIOs\n");
d9056ce2	124
d9056ce2 TV	125	}
	126
	127	static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
	128	{
bc593f5d IG	129	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
bc593f5d IG	130	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
d9056ce2	131
d9056ce2 TV	132	return 0;
	133	}
	134
	135	static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
	136	{
bc593f5d IG	137	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
bc593f5d IG	138	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
d9056ce2 TV	139	}
d9056ce2 TV	140
d9056ce2 TV	141	static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
	142	{
	143	return 0;
	144	}
	145
	146	static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
	147	{
	148	}
	149
	150
	151	static struct omap_dss_device sdp3430_lcd_device = {
	152	.name = "lcd",
	153	.driver_name = "sharp_ls_panel",
	154	.type = OMAP_DISPLAY_TYPE_DPI,
	155	.phy.dpi.data_lines = 16,
	156	.platform_enable = sdp3430_panel_enable_lcd,
	157	.platform_disable = sdp3430_panel_disable_lcd,
6fdc29e2 SMK	158	};
6fdc29e2 SMK	159
1d7a8654	160	static struct panel_dvi_platform_data dvi_panel = {
e813a55e	161	.power_down_gpio = -1,
89747c91 BW	162	};
89747c91 BW	163
d9056ce2 TV	164	static struct omap_dss_device sdp3430_dvi_device = {
d9056ce2 TV	165	.name = "dvi",
d9056ce2	166	.type = OMAP_DISPLAY_TYPE_DPI,
1d7a8654	167	.driver_name = "dvi",
89747c91	168	.data = &dvi_panel,
d9056ce2	169	.phy.dpi.data_lines = 24,
6fdc29e2 SMK	170	};
6fdc29e2 SMK	171
d9056ce2 TV	172	static struct omap_dss_device sdp3430_tv_device = {
	173	.name = "tv",
	174	.driver_name = "venc",
	175	.type = OMAP_DISPLAY_TYPE_VENC,
	176	.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
	177	.platform_enable = sdp3430_panel_enable_tv,
	178	.platform_disable = sdp3430_panel_disable_tv,
6fdc29e2 SMK	179	};
6fdc29e2 SMK	180
d9056ce2 TV	181
d9056ce2 TV	182	static struct omap_dss_device *sdp3430_dss_devices[] = {
6fdc29e2	183	&sdp3430_lcd_device,
d9056ce2 TV	184	&sdp3430_dvi_device,
d9056ce2 TV	185	&sdp3430_tv_device,
6fdc29e2 SMK	186	};
6fdc29e2 SMK	187
d9056ce2 TV	188	static struct omap_dss_board_info sdp3430_dss_data = {
	189	.num_devices = ARRAY_SIZE(sdp3430_dss_devices),
	190	.devices = sdp3430_dss_devices,
	191	.default_device = &sdp3430_lcd_device,
	192	};
	193
6fdc29e2	194	static struct omap_board_config_kernel sdp3430_config[] __initdata = {
6fdc29e2 SMK	195	};
6fdc29e2 SMK	196
68ff0423	197	static struct omap2_hsmmc_info mmc[] = {
6fdc29e2 SMK	198	{
	199	.mmc = 1,
	200	/* 8 bits (default) requires S6.3 == ON,
	201	* so the SIM card isn't used; else 4 bits.
	202	*/
3a63833e	203	.caps = MMC_CAP_4_BIT_DATA \| MMC_CAP_8_BIT_DATA,
6fdc29e2	204	.gpio_wp = 4,
3b972bf0	205	.deferred = true,
6fdc29e2 SMK	206	},
	207	{
	208	.mmc = 2,
3a63833e	209	.caps = MMC_CAP_4_BIT_DATA \| MMC_CAP_8_BIT_DATA,
6fdc29e2	210	.gpio_wp = 7,
3b972bf0	211	.deferred = true,
6fdc29e2 SMK	212	},
	213	{} /* Terminator */
	214	};
	215
6fdc29e2 SMK	216	static int sdp3430_twl_gpio_setup(struct device *dev,
	217	unsigned gpio, unsigned ngpio)
	218	{
	219	/* gpio + 0 is "mmc0_cd" (input/IRQ),
	220	* gpio + 1 is "mmc1_cd" (input/IRQ)
	221	*/
	222	mmc[0].gpio_cd = gpio + 0;
	223	mmc[1].gpio_cd = gpio + 1;
3b972bf0	224	omap_hsmmc_late_init(mmc);
6fdc29e2	225
6fdc29e2	226	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
bc593f5d	227	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
6fdc29e2 SMK	228
6fdc29e2 SMK	229	/* gpio + 15 is "sub_lcd_nRST" (output) */
bc593f5d	230	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
6fdc29e2 SMK	231
	232	return 0;
	233	}
	234
	235	static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
	236	.gpio_base = OMAP_MAX_GPIO_LINES,
	237	.irq_base = TWL4030_GPIO_IRQ_BASE,
	238	.irq_end = TWL4030_GPIO_IRQ_END,
	239	.pulldowns = BIT(2) \| BIT(6) \| BIT(8) \| BIT(13)
	240	\| BIT(16) \| BIT(17),
	241	.setup = sdp3430_twl_gpio_setup,
	242	};
	243
73a92aa4 RN	244	/* regulator consumer mappings */
73a92aa4 RN	245
4b087ff8 RN	246	/* ads7846 on SPI */
	247	static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
	248	REGULATOR_SUPPLY("vcc", "spi1.0"),
	249	};
	250
73a92aa4	251	static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
0005ae73	252	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
73a92aa4 RN	253	};
	254
	255	static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
0005ae73	256	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
73a92aa4 RN	257	};
	258
	259	static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
0005ae73	260	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
73a92aa4 RN	261	};
73a92aa4 RN	262
6fdc29e2 SMK	263	/*
	264	* Apply all the fixed voltages since most versions of U-Boot
	265	* don't bother with that initialization.
	266	*/
	267
	268	/* VAUX1 for mainboard (irda and sub-lcd) */
	269	static struct regulator_init_data sdp3430_vaux1 = {
	270	.constraints = {
	271	.min_uV = 2800000,
	272	.max_uV = 2800000,
	273	.apply_uV = true,
	274	.valid_modes_mask = REGULATOR_MODE_NORMAL
	275	\| REGULATOR_MODE_STANDBY,
	276	.valid_ops_mask = REGULATOR_CHANGE_MODE
	277	\| REGULATOR_CHANGE_STATUS,
	278	},
	279	};
	280
	281	/* VAUX2 for camera module */
	282	static struct regulator_init_data sdp3430_vaux2 = {
	283	.constraints = {
	284	.min_uV = 2800000,
	285	.max_uV = 2800000,
	286	.apply_uV = true,
	287	.valid_modes_mask = REGULATOR_MODE_NORMAL
	288	\| REGULATOR_MODE_STANDBY,
	289	.valid_ops_mask = REGULATOR_CHANGE_MODE
	290	\| REGULATOR_CHANGE_STATUS,
	291	},
	292	};
	293
	294	/* VAUX3 for LCD board */
	295	static struct regulator_init_data sdp3430_vaux3 = {
	296	.constraints = {
	297	.min_uV = 2800000,
	298	.max_uV = 2800000,
	299	.apply_uV = true,
	300	.valid_modes_mask = REGULATOR_MODE_NORMAL
	301	\| REGULATOR_MODE_STANDBY,
	302	.valid_ops_mask = REGULATOR_CHANGE_MODE
	303	\| REGULATOR_CHANGE_STATUS,
	304	},
4b087ff8 RN	305	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
4b087ff8 RN	306	.consumer_supplies = sdp3430_vaux3_supplies,
6fdc29e2 SMK	307	};
	308
	309	/* VAUX4 for OMAP VDD_CSI2 (camera) */
	310	static struct regulator_init_data sdp3430_vaux4 = {
	311	.constraints = {
	312	.min_uV = 1800000,
	313	.max_uV = 1800000,
	314	.apply_uV = true,
	315	.valid_modes_mask = REGULATOR_MODE_NORMAL
	316	\| REGULATOR_MODE_STANDBY,
	317	.valid_ops_mask = REGULATOR_CHANGE_MODE
	318	\| REGULATOR_CHANGE_STATUS,
	319	},
	320	};
	321
	322	/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
	323	static struct regulator_init_data sdp3430_vmmc1 = {
	324	.constraints = {
	325	.min_uV = 1850000,
	326	.max_uV = 3150000,
	327	.valid_modes_mask = REGULATOR_MODE_NORMAL
	328	\| REGULATOR_MODE_STANDBY,
	329	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
	330	\| REGULATOR_CHANGE_MODE
	331	\| REGULATOR_CHANGE_STATUS,
	332	},
73a92aa4 RN	333	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
73a92aa4 RN	334	.consumer_supplies = sdp3430_vmmc1_supplies,
6fdc29e2 SMK	335	};
	336
	337	/* VMMC2 for MMC2 card */
	338	static struct regulator_init_data sdp3430_vmmc2 = {
	339	.constraints = {
	340	.min_uV = 1850000,
	341	.max_uV = 1850000,
	342	.apply_uV = true,
	343	.valid_modes_mask = REGULATOR_MODE_NORMAL
	344	\| REGULATOR_MODE_STANDBY,
	345	.valid_ops_mask = REGULATOR_CHANGE_MODE
	346	\| REGULATOR_CHANGE_STATUS,
	347	},
73a92aa4 RN	348	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
73a92aa4 RN	349	.consumer_supplies = sdp3430_vmmc2_supplies,
6fdc29e2 SMK	350	};
	351
	352	/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
	353	static struct regulator_init_data sdp3430_vsim = {
	354	.constraints = {
	355	.min_uV = 1800000,
	356	.max_uV = 3000000,
	357	.valid_modes_mask = REGULATOR_MODE_NORMAL
	358	\| REGULATOR_MODE_STANDBY,
	359	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
	360	\| REGULATOR_CHANGE_MODE
	361	\| REGULATOR_CHANGE_STATUS,
	362	},
73a92aa4 RN	363	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
73a92aa4 RN	364	.consumer_supplies = sdp3430_vsim_supplies,
6fdc29e2 SMK	365	};
6fdc29e2 SMK	366
6fdc29e2	367	static struct twl4030_platform_data sdp3430_twldata = {
6fdc29e2	368	/* platform_data for children goes here */
6fdc29e2	369	.gpio = &sdp3430_gpio_data,
6fdc29e2	370	.keypad = &sdp3430_kp_data,
6fdc29e2 SMK	371
	372	.vaux1 = &sdp3430_vaux1,
	373	.vaux2 = &sdp3430_vaux2,
	374	.vaux3 = &sdp3430_vaux3,
	375	.vaux4 = &sdp3430_vaux4,
	376	.vmmc1 = &sdp3430_vmmc1,
	377	.vmmc2 = &sdp3430_vmmc2,
	378	.vsim = &sdp3430_vsim,
6fdc29e2 SMK	379	};
6fdc29e2 SMK	380
6fdc29e2 SMK	381	static int __init omap3430_i2c_init(void)
	382	{
	383	/* i2c1 for PMIC only */
827ed9ae	384	omap3_pmic_get_config(&sdp3430_twldata,
b252b0ef PU	385	TWL_COMMON_PDATA_USB \| TWL_COMMON_PDATA_BCI \|
	386	TWL_COMMON_PDATA_MADC \| TWL_COMMON_PDATA_AUDIO,
	387	TWL_COMMON_REGULATOR_VDAC \| TWL_COMMON_REGULATOR_VPLL2);
	388	sdp3430_twldata.vdac->constraints.apply_uV = true;
	389	sdp3430_twldata.vpll2->constraints.apply_uV = true;
	390	sdp3430_twldata.vpll2->constraints.name = "VDVI";
	391
fbd8071c	392	omap3_pmic_init("twl4030", &sdp3430_twldata);
827ed9ae	393
6fdc29e2 SMK	394	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
	395	omap_register_i2c_bus(2, 400, NULL, 0);
	396	/* i2c3 on display connector (for DVI, tfp410) */
	397	omap_register_i2c_bus(3, 400, NULL, 0);
	398	return 0;
	399	}
	400
1a48e157 TL	401	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	402
	403	static struct omap_smc91x_platform_data board_smc91x_data = {
	404	.cs = 3,
	405	.flags = GPMC_MUX_ADD_DATA \| GPMC_TIMINGS_SMC91C96 \|
	406	IORESOURCE_IRQ_LOWLEVEL,
	407	};
	408
	409	static void __init board_smc91x_init(void)
	410	{
	411	if (omap_rev() > OMAP3430_REV_ES1_0)
	412	board_smc91x_data.gpio_irq = 6;
	413	else
	414	board_smc91x_data.gpio_irq = 29;
	415
	416	gpmc_smc91x_init(&board_smc91x_data);
	417	}
	418
	419	#else
	420
	421	static inline void board_smc91x_init(void)
	422	{
	423	}
	424
	425	#endif
	426
5110b298 RT	427	static void enable_board_wakeup_source(void)
5110b298 RT	428	{
4896e394 TL	429	/* T2 interrupt line (keypad) */
	430	omap_mux_init_signal("sys_nirq",
	431	OMAP_WAKEUP_EN \| OMAP_PIN_INPUT_PULLUP);
5110b298 RT	432	}
5110b298 RT	433
181b250c	434	static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
58a5491c	435
181b250c KM	436	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	437	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	438	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
58a5491c FB	439
	440	.phy_reset = true,
	441	.reset_gpio_port[0] = 57,
	442	.reset_gpio_port[1] = 61,
	443	.reset_gpio_port[2] = -EINVAL
	444	};
	445
ca5742bd TL	446	#ifdef CONFIG_OMAP_MUX
	447	static struct omap_board_mux board_mux[] __initdata = {
	448	{ .reg_offset = OMAP_MUX_TERMINATOR },
	449	};
626dda8a S	450	#else
626dda8a S	451	#define board_mux NULL
ca5742bd TL	452	#endif
ca5742bd TL	453
13d6b73c SG	454	/*
	455	* SDP3430 V2 Board CS organization
	456	* Different from SDP3430 V1. Now 4 switches used to specify CS
	457	*
	458	* See also the Switch S8 settings in the comments.
	459	*/
	460	static char chip_sel_3430[][GPMC_CS_NUM] = {
	461	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
	462	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
	463	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
	464	};
	465
88c8460a VS	466	static struct mtd_partition sdp_nor_partitions[] = {
	467	/* bootloader (U-Boot, etc) in first sector */
	468	{
	469	.name = "Bootloader-NOR",
	470	.offset = 0,
	471	.size = SZ_256K,
	472	.mask_flags = MTD_WRITEABLE, /* force read-only */
	473	},
	474	/* bootloader params in the next sector */
	475	{
	476	.name = "Params-NOR",
	477	.offset = MTDPART_OFS_APPEND,
	478	.size = SZ_256K,
	479	.mask_flags = 0,
	480	},
	481	/* kernel */
	482	{
	483	.name = "Kernel-NOR",
	484	.offset = MTDPART_OFS_APPEND,
	485	.size = SZ_2M,
	486	.mask_flags = 0
	487	},
	488	/* file system */
	489	{
	490	.name = "Filesystem-NOR",
	491	.offset = MTDPART_OFS_APPEND,
	492	.size = MTDPART_SIZ_FULL,
	493	.mask_flags = 0
	494	}
	495	};
	496
	497	static struct mtd_partition sdp_onenand_partitions[] = {
	498	{
	499	.name = "X-Loader-OneNAND",
	500	.offset = 0,
	501	.size = 4 * (64 * 2048),
	502	.mask_flags = MTD_WRITEABLE /* force read-only */
	503	},
	504	{
	505	.name = "U-Boot-OneNAND",
	506	.offset = MTDPART_OFS_APPEND,
	507	.size = 2 * (64 * 2048),
	508	.mask_flags = MTD_WRITEABLE /* force read-only */
	509	},
	510	{
	511	.name = "U-Boot Environment-OneNAND",
	512	.offset = MTDPART_OFS_APPEND,
	513	.size = 1 * (64 * 2048),
	514	},
	515	{
	516	.name = "Kernel-OneNAND",
	517	.offset = MTDPART_OFS_APPEND,
	518	.size = 16 * (64 * 2048),
	519	},
	520	{
	521	.name = "File System-OneNAND",
	522	.offset = MTDPART_OFS_APPEND,
	523	.size = MTDPART_SIZ_FULL,
	524	},
	525	};
	526
	527	static struct mtd_partition sdp_nand_partitions[] = {
	528	/* All the partition sizes are listed in terms of NAND block size */
	529	{
530	.name = "X-Loader-NAND",
531	.offset = 0,
532	.size = 4 * (64 * 2048),
533	.mask_flags = MTD_WRITEABLE, /* force read-only */
534	},
535	{
536	.name = "U-Boot-NAND",
537	.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
538	.size = 10 * (64 * 2048),
539	.mask_flags = MTD_WRITEABLE, /* force read-only */
540	},
541	{
542	.name = "Boot Env-NAND",
543
544	.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
545	.size = 6 * (64 * 2048),
546	},
547	{
548	.name = "Kernel-NAND",
549	.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
550	.size = 40 * (64 * 2048),
551	},
552	{
553	.name = "File System - NAND",
554	.size = MTDPART_SIZ_FULL,
555	.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
556	},
557	};
558
559	static struct flash_partitions sdp_flash_partitions[] = {
560	{
561	.parts = sdp_nor_partitions,
562	.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
563	},
564	{
565	.parts = sdp_onenand_partitions,
566	.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
567	},
568	{
569	.parts = sdp_nand_partitions,
570	.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
571	},
572	};
573
6fdc29e2 SMK	574	static void __init omap_3430sdp_init(void)
6fdc29e2 SMK	575	{
96974a24 MR	576	int gpio_pendown;
96974a24 MR	577
ca5742bd	578	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
e41cccfe TL	579	omap_board_config = sdp3430_config;
e41cccfe TL	580	omap_board_config_size = ARRAY_SIZE(sdp3430_config);
3b972bf0	581	omap_hsmmc_init(mmc);
6fdc29e2	582	omap3430_i2c_init();
d5e13227	583	omap_display_init(&sdp3430_dss_data);
6fdc29e2	584	if (omap_rev() > OMAP3430_REV_ES1_0)
96974a24	585	gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
6fdc29e2	586	else
96974a24 MR	587	gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
96974a24 MR	588	omap_ads7846_init(1, gpio_pendown, 310, NULL);
7496ba30	589	omap_serial_init();
a4ca9dbe	590	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
9e18630b	591	usb_musb_init(NULL);
1a48e157	592	board_smc91x_init();
d5ce2b65	593	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
d9056ce2	594	sdp3430_display_init();
5110b298	595	enable_board_wakeup_source();
9e64bb1e	596	usbhs_init(&usbhs_bdata);
6fdc29e2 SMK	597	}
6fdc29e2 SMK	598
6fdc29e2 SMK	599	MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
6fdc29e2 SMK	600	/* Maintainer: Syed Khasim - Texas Instruments Inc */
5e52b435	601	.atag_offset = 0x100,
71ee7dad	602	.reserve = omap_reserve,
3dc3bad6	603	.map_io = omap3_map_io,
8f5b5a41	604	.init_early = omap3430_init_early,
741e3a89	605	.init_irq = omap3_init_irq,
6b2f55d7	606	.handle_irq = omap3_intc_handle_irq,
6fdc29e2	607	.init_machine = omap_3430sdp_init,
e74984e4	608	.timer = &omap3_timer,
baa95883	609	.restart = omap_prcm_restart,
6fdc29e2	610	MACHINE_END