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34c9ac23 | 1 | /* |
2 | * Copyright (C) 2009 Texas Instruments Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #include <linux/kernel.h> | |
10 | #include <linux/init.h> | |
11 | #include <linux/platform_device.h> | |
12 | #include <linux/input.h> | |
13 | #include <linux/gpio.h> | |
d5ce2b65 | 14 | #include <linux/mtd/nand.h> |
34c9ac23 | 15 | |
16 | #include <asm/mach-types.h> | |
17 | #include <asm/mach/arch.h> | |
18 | ||
4e65331c | 19 | #include "common.h" |
34c9ac23 | 20 | #include <plat/gpmc-smc91x.h> |
34c9ac23 | 21 | #include <plat/usb.h> |
22 | ||
23 | #include <mach/board-zoom.h> | |
24 | ||
04aeae77 | 25 | #include "board-flash.h" |
4896e394 | 26 | #include "mux.h" |
34c9ac23 | 27 | #include "sdram-hynix-h8mbx00u0mer-0em.h" |
28 | ||
29 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
30 | ||
31 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
32 | .cs = 3, | |
33 | .flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL, | |
34 | }; | |
35 | ||
36 | static void __init board_smc91x_init(void) | |
37 | { | |
38 | board_smc91x_data.gpio_irq = 158; | |
39 | gpmc_smc91x_init(&board_smc91x_data); | |
40 | } | |
41 | ||
42 | #else | |
43 | ||
44 | static inline void board_smc91x_init(void) | |
45 | { | |
46 | } | |
47 | ||
48 | #endif /* defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) */ | |
49 | ||
50 | static void enable_board_wakeup_source(void) | |
51 | { | |
4896e394 TL |
52 | /* T2 interrupt line (keypad) */ |
53 | omap_mux_init_signal("sys_nirq", | |
54 | OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); | |
34c9ac23 | 55 | } |
56 | ||
181b250c | 57 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
34c9ac23 | 58 | |
181b250c KM |
59 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
60 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
61 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
34c9ac23 | 62 | |
63 | .phy_reset = true, | |
64 | .reset_gpio_port[0] = 126, | |
65 | .reset_gpio_port[1] = 61, | |
66 | .reset_gpio_port[2] = -EINVAL | |
67 | }; | |
68 | ||
662c8b55 TL |
69 | #ifdef CONFIG_OMAP_MUX |
70 | static struct omap_board_mux board_mux[] __initdata = { | |
71 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
72 | }; | |
662c8b55 TL |
73 | #endif |
74 | ||
7875eea5 SG |
75 | /* |
76 | * SDP3630 CS organization | |
77 | * See also the Switch S8 settings in the comments. | |
78 | */ | |
79 | static char chip_sel_sdp[][GPMC_CS_NUM] = { | |
80 | {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ | |
81 | {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ | |
82 | {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ | |
83 | }; | |
84 | ||
85 | static struct mtd_partition sdp_nor_partitions[] = { | |
86 | /* bootloader (U-Boot, etc) in first sector */ | |
87 | { | |
88 | .name = "Bootloader-NOR", | |
89 | .offset = 0, | |
90 | .size = SZ_256K, | |
91 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
92 | }, | |
93 | /* bootloader params in the next sector */ | |
94 | { | |
95 | .name = "Params-NOR", | |
96 | .offset = MTDPART_OFS_APPEND, | |
97 | .size = SZ_256K, | |
98 | .mask_flags = 0, | |
99 | }, | |
100 | /* kernel */ | |
101 | { | |
102 | .name = "Kernel-NOR", | |
103 | .offset = MTDPART_OFS_APPEND, | |
104 | .size = SZ_2M, | |
105 | .mask_flags = 0 | |
106 | }, | |
107 | /* file system */ | |
108 | { | |
109 | .name = "Filesystem-NOR", | |
110 | .offset = MTDPART_OFS_APPEND, | |
111 | .size = MTDPART_SIZ_FULL, | |
112 | .mask_flags = 0 | |
113 | } | |
114 | }; | |
115 | ||
116 | static struct mtd_partition sdp_onenand_partitions[] = { | |
117 | { | |
118 | .name = "X-Loader-OneNAND", | |
119 | .offset = 0, | |
120 | .size = 4 * (64 * 2048), | |
121 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
122 | }, | |
123 | { | |
124 | .name = "U-Boot-OneNAND", | |
125 | .offset = MTDPART_OFS_APPEND, | |
126 | .size = 2 * (64 * 2048), | |
127 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
128 | }, | |
129 | { | |
130 | .name = "U-Boot Environment-OneNAND", | |
131 | .offset = MTDPART_OFS_APPEND, | |
132 | .size = 1 * (64 * 2048), | |
133 | }, | |
134 | { | |
135 | .name = "Kernel-OneNAND", | |
136 | .offset = MTDPART_OFS_APPEND, | |
137 | .size = 16 * (64 * 2048), | |
138 | }, | |
139 | { | |
140 | .name = "File System-OneNAND", | |
141 | .offset = MTDPART_OFS_APPEND, | |
142 | .size = MTDPART_SIZ_FULL, | |
143 | }, | |
144 | }; | |
145 | ||
146 | static struct mtd_partition sdp_nand_partitions[] = { | |
147 | /* All the partition sizes are listed in terms of NAND block size */ | |
148 | { | |
149 | .name = "X-Loader-NAND", | |
150 | .offset = 0, | |
151 | .size = 4 * (64 * 2048), | |
152 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
153 | }, | |
154 | { | |
155 | .name = "U-Boot-NAND", | |
156 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
157 | .size = 10 * (64 * 2048), | |
158 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
159 | }, | |
160 | { | |
161 | .name = "Boot Env-NAND", | |
162 | ||
163 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ | |
164 | .size = 6 * (64 * 2048), | |
165 | }, | |
166 | { | |
167 | .name = "Kernel-NAND", | |
168 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | |
169 | .size = 40 * (64 * 2048), | |
170 | }, | |
171 | { | |
172 | .name = "File System - NAND", | |
173 | .size = MTDPART_SIZ_FULL, | |
174 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ | |
175 | }, | |
176 | }; | |
177 | ||
178 | static struct flash_partitions sdp_flash_partitions[] = { | |
179 | { | |
180 | .parts = sdp_nor_partitions, | |
181 | .nr_parts = ARRAY_SIZE(sdp_nor_partitions), | |
182 | }, | |
183 | { | |
184 | .parts = sdp_onenand_partitions, | |
185 | .nr_parts = ARRAY_SIZE(sdp_onenand_partitions), | |
186 | }, | |
187 | { | |
188 | .parts = sdp_nand_partitions, | |
189 | .nr_parts = ARRAY_SIZE(sdp_nand_partitions), | |
190 | }, | |
191 | }; | |
192 | ||
34c9ac23 | 193 | static void __init omap_sdp_init(void) |
194 | { | |
662c8b55 | 195 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); |
34c9ac23 | 196 | zoom_peripherals_init(); |
a4ca9dbe TL |
197 | omap_sdrc_init(h8mbx00u0mer0em_sdrc_params, |
198 | h8mbx00u0mer0em_sdrc_params); | |
ed3f9095 | 199 | zoom_display_init(); |
34c9ac23 | 200 | board_smc91x_init(); |
d5ce2b65 | 201 | board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16); |
34c9ac23 | 202 | enable_board_wakeup_source(); |
9e64bb1e | 203 | usbhs_init(&usbhs_bdata); |
34c9ac23 | 204 | } |
205 | ||
206 | MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") | |
5e52b435 | 207 | .atag_offset = 0x100, |
71ee7dad | 208 | .reserve = omap_reserve, |
3dc3bad6 | 209 | .map_io = omap3_map_io, |
8f5b5a41 | 210 | .init_early = omap3630_init_early, |
741e3a89 | 211 | .init_irq = omap3_init_irq, |
6b2f55d7 | 212 | .handle_irq = omap3_intc_handle_irq, |
34c9ac23 | 213 | .init_machine = omap_sdp_init, |
bbd707ac | 214 | .init_late = omap3630_init_late, |
e74984e4 | 215 | .timer = &omap3_timer, |
baa95883 | 216 | .restart = omap_prcm_restart, |
34c9ac23 | 217 | MACHINE_END |