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Merge tag 'stable/for-linus-3.16-rc7-tag' of git://git.kernel.org/pub/scm/linux/kerne...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
CommitLineData
2886d128 1/*
c3146974 2 * CompuLab CM-T35/CM-T3730 modules support
2886d128 3 *
d12c2e28
IG		 4 * Copyright (C) 2009-2011 CompuLab, Ltd.
5 * Authors: Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
2886d128
MR		 7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
2886d128
MR		 17 */
18
e68084c6
LP		 19#include <linux/clk-provider.h>
20#include <linux/clkdev.h>
2886d128
MR		 21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/input.h>
25#include <linux/input/matrix_keypad.h>
26#include <linux/delay.h>
27#include <linux/gpio.h>
4b25408f 28#include <linux/platform_data/gpio-omap.h>
2886d128 29
25f73ed5 30#include <linux/platform_data/at24.h>
ebeb53e1 31#include <linux/i2c/twl.h>
5b3689f4 32#include <linux/regulator/fixed.h>
2886d128 33#include <linux/regulator/machine.h>
3a63833e 34#include <linux/mmc/host.h>
51482be9 35#include <linux/usb/phy.h>
2886d128 36
7f049ad1
MR		 37#include <linux/spi/spi.h>
38#include <linux/spi/tdo24m.h>
39
2886d128
MR		 40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
43
2203747c 44#include <linux/platform_data/mtd-nand-omap2.h>
a0b38cc4 45#include <video/omapdss.h>
a0d8dde9 46#include <video/omap-panel-data.h>
2203747c 47#include <linux/platform_data/spi-omap2-mcspi.h>
2886d128 48
6d02643d 49#include "common.h"
ca5742bd 50#include "mux.h"
2886d128 51#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 52#include "hsmmc.h"
96974a24 53#include "common-board-devices.h"
6d02643d 54#include "gpmc.h"
bc3668ea 55#include "gpmc-nand.h"
2886d128 56
039401f3
IG		 57#define CM_T35_GPIO_PENDOWN 57
58#define SB_T35_USB_HUB_RESET_GPIO 167
2886d128
MR		 59
60#define CM_T35_SMSC911X_CS 5
61#define CM_T35_SMSC911X_GPIO 163
62#define SB_T35_SMSC911X_CS 4
63#define SB_T35_SMSC911X_GPIO 65
64
2886d128
MR		 65#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
66#include <linux/smsc911x.h>
ac839b3c 67#include "gpmc-smsc911x.h"
2886d128 68
21b42731 69static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
2886d128 70 .id = 0,
21b42731
MR		 71 .cs = CM_T35_SMSC911X_CS,
72 .gpio_irq = CM_T35_SMSC911X_GPIO,
73 .gpio_reset = -EINVAL,
74 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 75};
76
21b42731 77static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
2886d128 78 .id = 1,
21b42731
MR		 79 .cs = SB_T35_SMSC911X_CS,
80 .gpio_irq = SB_T35_SMSC911X_GPIO,
81 .gpio_reset = -EINVAL,
82 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 83};
84
5b3689f4
RD		 85static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
86 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
87 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
88};
89
90static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
91 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
92 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
93};
94
2886d128
MR		 95static void __init cm_t35_init_ethernet(void)
96{
5b3689f4
RD		 97 regulator_register_fixed(0, cm_t35_smsc911x_supplies,
98 ARRAY_SIZE(cm_t35_smsc911x_supplies));
99 regulator_register_fixed(1, sb_t35_smsc911x_supplies,
100 ARRAY_SIZE(sb_t35_smsc911x_supplies));
101
21b42731
MR		 102 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
103 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
2886d128
MR		 104}
105#else
106static inline void __init cm_t35_init_ethernet(void) { return; }
107#endif
108
109#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
110#include <linux/leds.h>
111
112static struct gpio_led cm_t35_leds[] = {
113 [0] = {
114 .gpio = 186,
115 .name = "cm-t35:green",
116 .default_trigger = "heartbeat",
117 .active_low = 0,
118 },
119};
120
121static struct gpio_led_platform_data cm_t35_led_pdata = {
122 .num_leds = ARRAY_SIZE(cm_t35_leds),
123 .leds = cm_t35_leds,
124};
125
126static struct platform_device cm_t35_led_device = {
127 .name = "leds-gpio",
128 .id = -1,
129 .dev = {
130 .platform_data = &cm_t35_led_pdata,
131 },
132};
133
134static void __init cm_t35_init_led(void)
135{
136 platform_device_register(&cm_t35_led_device);
137}
138#else
139static inline void cm_t35_init_led(void) {}
140#endif
141
142#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
143#include <linux/mtd/mtd.h>
144#include <linux/mtd/nand.h>
145#include <linux/mtd/partitions.h>
146
147static struct mtd_partition cm_t35_nand_partitions[] = {
148 {
149 .name = "xloader",
150 .offset = 0, /* Offset = 0x00000 */
151 .size = 4 * NAND_BLOCK_SIZE,
152 .mask_flags = MTD_WRITEABLE
153 },
154 {
155 .name = "uboot",
156 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
157 .size = 15 * NAND_BLOCK_SIZE,
158 },
159 {
160 .name = "uboot environment",
161 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
162 .size = 2 * NAND_BLOCK_SIZE,
163 },
164 {
165 .name = "linux",
d12c2e28 166 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
2886d128
MR		 167 .size = 32 * NAND_BLOCK_SIZE,
168 },
169 {
170 .name = "rootfs",
d12c2e28 171 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
2886d128
MR		 172 .size = MTDPART_SIZ_FULL,
173 },
174};
175
176static struct omap_nand_platform_data cm_t35_nand_data = {
177 .parts = cm_t35_nand_partitions,
178 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
2886d128 179 .cs = 0,
2886d128
MR		 180};
181
2886d128
MR		 182static void __init cm_t35_init_nand(void)
183{
bc3668ea 184 if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
2886d128
MR		 185 pr_err("CM-T35: Unable to register NAND device\n");
186}
187#else
188static inline void cm_t35_init_nand(void) {}
189#endif
190
7f049ad1
MR		 191#define CM_T35_LCD_EN_GPIO 157
192#define CM_T35_LCD_BL_GPIO 58
193#define CM_T35_DVI_EN_GPIO 54
194
fe0cf7d9
TV		 195static const struct display_timing cm_t35_lcd_videomode = {
196 .pixelclock = { 0, 26000000, 0 },
197
198 .hactive = { 0, 480, 0 },
199 .hfront_porch = { 0, 104, 0 },
200 .hback_porch = { 0, 8, 0 },
201 .hsync_len = { 0, 8, 0 },
202
203 .vactive = { 0, 640, 0 },
204 .vfront_porch = { 0, 4, 0 },
205 .vback_porch = { 0, 2, 0 },
206 .vsync_len = { 0, 2, 0 },
207
208 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
209 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE,
210};
211
212static struct panel_dpi_platform_data cm_t35_lcd_pdata = {
213 .name = "lcd",
214 .source = "dpi.0",
215
216 .data_lines = 18,
217
218 .display_timing = &cm_t35_lcd_videomode,
219
220 .enable_gpio = -1,
221 .backlight_gpio = CM_T35_LCD_BL_GPIO,
222};
223
224static struct platform_device cm_t35_lcd_device = {
225 .name = "panel-dpi",
226 .id = 0,
227 .dev.platform_data = &cm_t35_lcd_pdata,
89747c91
BW		 228};
229
fe0cf7d9
TV		 230static struct connector_dvi_platform_data cm_t35_dvi_connector_pdata = {
231 .name = "dvi",
232 .source = "tfp410.0",
233 .i2c_bus_num = -1,
89747c91
BW		 234};
235
fe0cf7d9
TV		 236static struct platform_device cm_t35_dvi_connector_device = {
237 .name = "connector-dvi",
238 .id = 0,
239 .dev.platform_data = &cm_t35_dvi_connector_pdata,
7f049ad1
MR		 240};
241
fe0cf7d9
TV		 242static struct encoder_tfp410_platform_data cm_t35_tfp410_pdata = {
243 .name = "tfp410.0",
244 .source = "dpi.0",
245 .data_lines = 24,
246 .power_down_gpio = CM_T35_DVI_EN_GPIO,
7f049ad1
MR		 247};
248
fe0cf7d9
TV		 249static struct platform_device cm_t35_tfp410_device = {
250 .name = "tfp410",
251 .id = 0,
252 .dev.platform_data = &cm_t35_tfp410_pdata,
7f049ad1
MR		 253};
254
fe0cf7d9
TV		 255static struct connector_atv_platform_data cm_t35_tv_pdata = {
256 .name = "tv",
257 .source = "venc.0",
258 .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
259 .invert_polarity = false,
260};
261
262static struct platform_device cm_t35_tv_connector_device = {
263 .name = "connector-analog-tv",
264 .id = 0,
265 .dev.platform_data = &cm_t35_tv_pdata,
7f049ad1
MR		 266};
267
268static struct omap_dss_board_info cm_t35_dss_data = {
fe0cf7d9 269 .default_display_name = "dvi",
7f049ad1
MR		 270};
271
7f049ad1
MR		 272static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
273 .turbo_mode = 0,
7f049ad1
MR		 274};
275
276static struct tdo24m_platform_data tdo24m_config = {
277 .model = TDO35S,
278};
279
280static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
281 {
282 .modalias = "tdo24m",
283 .bus_num = 4,
284 .chip_select = 0,
285 .max_speed_hz = 1000000,
286 .controller_data = &tdo24m_mcspi_config,
287 .platform_data = &tdo24m_config,
288 },
289};
290
291static void __init cm_t35_init_display(void)
292{
293 int err;
294
7f049ad1
MR		 295 spi_register_board_info(cm_t35_lcd_spi_board_info,
296 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
297
e471e9ad
TV		 298
299 err = gpio_request_one(CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW,
300 "lcd bl enable");
7f049ad1 301 if (err) {
e471e9ad 302 pr_err("CM-T35: failed to request LCD EN GPIO\n");
bc593f5d 303 return;
7f049ad1
MR		 304 }
305
7f049ad1 306 msleep(50);
bc593f5d 307 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
7f049ad1 308
d5e13227 309 err = omap_display_init(&cm_t35_dss_data);
7f049ad1
MR		 310 if (err) {
311 pr_err("CM-T35: failed to register DSS device\n");
e471e9ad 312 gpio_free(CM_T35_LCD_EN_GPIO);
7f049ad1 313 }
fe0cf7d9
TV		 314
315 platform_device_register(&cm_t35_tfp410_device);
316 platform_device_register(&cm_t35_dvi_connector_device);
317 platform_device_register(&cm_t35_lcd_device);
318 platform_device_register(&cm_t35_tv_connector_device);
7f049ad1
MR		 319}
320
786b01a8
OD		 321static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
322 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
2886d128
MR		 323};
324
786b01a8
OD		 325static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
326 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
2886d128
MR		 327};
328
b74f149c
IG		 329static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
330 REGULATOR_SUPPLY("vcc", "spi1.0"),
cd1c683c 331 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
1f92a1a4 332 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),
1738ddbe 333 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
b74f149c
IG		 334};
335
2886d128
MR		 336/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
337static struct regulator_init_data cm_t35_vmmc1 = {
338 .constraints = {
339 .min_uV = 1850000,
340 .max_uV = 3150000,
341 .valid_modes_mask = REGULATOR_MODE_NORMAL
342 | REGULATOR_MODE_STANDBY,
343 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
344 | REGULATOR_CHANGE_MODE
345 | REGULATOR_CHANGE_STATUS,
346 },
786b01a8
OD		 347 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
348 .consumer_supplies = cm_t35_vmmc1_supply,
2886d128
MR		 349};
350
351/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
352static struct regulator_init_data cm_t35_vsim = {
353 .constraints = {
354 .min_uV = 1800000,
355 .max_uV = 3000000,
356 .valid_modes_mask = REGULATOR_MODE_NORMAL
357 | REGULATOR_MODE_STANDBY,
358 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
359 | REGULATOR_CHANGE_MODE
360 | REGULATOR_CHANGE_STATUS,
361 },
786b01a8
OD		 362 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
363 .consumer_supplies = cm_t35_vsim_supply,
2886d128
MR		 364};
365
b74f149c
IG		 366static struct regulator_init_data cm_t35_vio = {
367 .constraints = {
368 .min_uV = 1800000,
369 .max_uV = 1800000,
370 .apply_uV = true,
371 .valid_modes_mask = REGULATOR_MODE_NORMAL
372 | REGULATOR_MODE_STANDBY,
373 .valid_ops_mask = REGULATOR_CHANGE_MODE,
374 },
375 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
376 .consumer_supplies = cm_t35_vio_supplies,
377};
378
bead4375 379static uint32_t cm_t35_keymap[] = {
2886d128
MR		 380 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
381 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
382 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
383};
384
385static struct matrix_keymap_data cm_t35_keymap_data = {
386 .keymap = cm_t35_keymap,
387 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
388};
389
390static struct twl4030_keypad_data cm_t35_kp_data = {
391 .keymap_data = &cm_t35_keymap_data,
392 .rows = 3,
393 .cols = 3,
394 .rep = 1,
395};
396
68ff0423 397static struct omap2_hsmmc_info mmc[] = {
2886d128
MR		 398 {
399 .mmc = 1,
3a63833e 400 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 401 .gpio_cd = -EINVAL,
402 .gpio_wp = -EINVAL,
3b972bf0 403 .deferred = true,
2886d128
MR		 404 },
405 {
406 .mmc = 2,
3a63833e 407 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 408 .transceiver = 1,
409 .gpio_cd = -EINVAL,
410 .gpio_wp = -EINVAL,
411 .ocr_mask = 0x00100000, /* 3.3V */
412 },
413 {} /* Terminator */
414};
415
59b1499a
RQ		 416static struct usbhs_phy_data phy_data[] __initdata = {
417 {
418 .port = 1,
419 .reset_gpio = OMAP_MAX_GPIO_LINES + 6,
420 .vcc_gpio = -EINVAL,
421 },
422 {
423 .port = 2,
424 .reset_gpio = OMAP_MAX_GPIO_LINES + 7,
425 .vcc_gpio = -EINVAL,
426 },
427};
428
42973159 429static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
181b250c
KM		 430 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
431 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
2886d128
MR		 432};
433
36863964 434static void __init cm_t35_init_usbh(void)
039401f3
IG		 435{
436 int err;
437
438 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
439 GPIOF_OUT_INIT_LOW, "usb hub rst");
440 if (err) {
441 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
442 } else {
443 udelay(10);
444 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
445 msleep(1);
446 }
447
59b1499a 448 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
039401f3
IG		 449 usbhs_init(&usbhs_bdata);
450}
451
2886d128
MR		 452static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
453 unsigned ngpio)
454{
455 int wlan_rst = gpio + 2;
456
bc593f5d 457 if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
2886d128 458 gpio_export(wlan_rst, 0);
2886d128 459 udelay(10);
be741de1 460 gpio_set_value_cansleep(wlan_rst, 0);
2886d128 461 udelay(10);
be741de1 462 gpio_set_value_cansleep(wlan_rst, 1);
2886d128
MR		 463 } else {
464 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
465 }
466
467 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
468 mmc[0].gpio_cd = gpio + 0;
3b972bf0 469 omap_hsmmc_late_init(mmc);
2886d128 470
2886d128
MR		 471 return 0;
472}
473
474static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
2886d128
MR		 475 .setup = cm_t35_twl_gpio_setup,
476};
477
d61676b8
IG		 478static struct twl4030_power_data cm_t35_power_data = {
479 .use_poweroff = true,
480};
481
2886d128 482static struct twl4030_platform_data cm_t35_twldata = {
2886d128
MR		 483 /* platform_data for children goes here */
484 .keypad = &cm_t35_kp_data,
2886d128
MR		 485 .gpio = &cm_t35_gpio_data,
486 .vmmc1 = &cm_t35_vmmc1,
487 .vsim = &cm_t35_vsim,
b74f149c 488 .vio = &cm_t35_vio,
d61676b8 489 .power = &cm_t35_power_data,
2886d128
MR		 490};
491
d396be47
DL		 492#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
493#include <media/omap3isp.h>
494#include "devices.h"
495
496static struct i2c_board_info cm_t35_isp_i2c_boardinfo[] = {
497 {
498 I2C_BOARD_INFO("mt9t001", 0x5d),
499 },
3d6bbca9
DL		 500 {
501 I2C_BOARD_INFO("tvp5150", 0x5c),
502 },
d396be47
DL		 503};
504
505static struct isp_subdev_i2c_board_info cm_t35_isp_primary_subdevs[] = {
506 {
507 .board_info = &cm_t35_isp_i2c_boardinfo[0],
508 .i2c_adapter_id = 3,
509 },
510 { NULL, 0, },
511};
512
3d6bbca9
DL		 513static struct isp_subdev_i2c_board_info cm_t35_isp_secondary_subdevs[] = {
514 {
515 .board_info = &cm_t35_isp_i2c_boardinfo[1],
516 .i2c_adapter_id = 3,
517 },
518 { NULL, 0, },
519};
520
d396be47
DL		 521static struct isp_v4l2_subdevs_group cm_t35_isp_subdevs[] = {
522 {
523 .subdevs = cm_t35_isp_primary_subdevs,
524 .interface = ISP_INTERFACE_PARALLEL,
525 .bus = {
526 .parallel = {
527 .clk_pol = 1,
528 },
529 },
530 },
3d6bbca9
DL		 531 {
532 .subdevs = cm_t35_isp_secondary_subdevs,
533 .interface = ISP_INTERFACE_PARALLEL,
534 .bus = {
535 .parallel = {
536 .clk_pol = 0,
537 },
538 },
539 },
d396be47
DL		 540 { NULL, 0, },
541};
542
543static struct isp_platform_data cm_t35_isp_pdata = {
544 .subdevs = cm_t35_isp_subdevs,
545};
546
e68084c6
LP		 547static struct regulator_consumer_supply cm_t35_camera_supplies[] = {
548 REGULATOR_SUPPLY("vaa", "3-005d"),
549 REGULATOR_SUPPLY("vdd", "3-005d"),
550};
551
d396be47
DL		 552static void __init cm_t35_init_camera(void)
553{
e68084c6
LP		 554 struct clk *clk;
555
556 clk = clk_register_fixed_rate(NULL, "mt9t001-clkin", NULL, CLK_IS_ROOT,
557 48000000);
558 clk_register_clkdev(clk, NULL, "3-005d");
559
560 regulator_register_fixed(2, cm_t35_camera_supplies,
561 ARRAY_SIZE(cm_t35_camera_supplies));
562
d396be47
DL		 563 if (omap3_init_camera(&cm_t35_isp_pdata) < 0)
564 pr_warn("CM-T3x: Failed registering camera device!\n");
565}
566
567#else
568static inline void cm_t35_init_camera(void) {}
569#endif /* CONFIG_VIDEO_OMAP3 */
570
2886d128
MR		 571static void __init cm_t35_init_i2c(void)
572{
b252b0ef 573 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
19ce6439
IG		 574 TWL_COMMON_REGULATOR_VDAC |
575 TWL_COMMON_PDATA_AUDIO);
b252b0ef 576
fbd8071c 577 omap3_pmic_init("tps65930", &cm_t35_twldata);
d396be47
DL		 578
579 omap_register_i2c_bus(3, 400, NULL, 0);
2886d128
MR		 580}
581
c7ecea24 582#ifdef CONFIG_OMAP_MUX
ca5742bd 583static struct omap_board_mux board_mux[] __initdata = {
edc961a2
MR		 584 /* nCS and IRQ for CM-T35 ethernet */
585 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
586 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
587
588 /* nCS and IRQ for SB-T35 ethernet */
589 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
590 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
591
592 /* PENDOWN GPIO */
593 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
594
595 /* mUSB */
596 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
597 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
598 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
599 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
600 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
601 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
602 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
603 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
604 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
605 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
606 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
607 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
608
609 /* MMC 2 */
610 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
611 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
612 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
613 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
614
615 /* McSPI 1 */
616 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
617 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
618 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
619 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
620
621 /* McSPI 4 */
622 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
623 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
624 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
625 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
626
627 /* McBSP 2 */
628 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
629 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
630 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
631 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
632
633 /* serial ports */
634 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
635 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
636 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
637 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
638
c3146974 639 /* common DSS */
edc961a2
MR		 640 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
641 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
642 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
643 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2
MR		 644 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
645 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
646 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
647 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
648 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
649 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
650 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
651 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
652 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
653 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
654 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
655 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2 656
d396be47
DL		 657 /* Camera */
658 OMAP3_MUX(CAM_HS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
659 OMAP3_MUX(CAM_VS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
660 OMAP3_MUX(CAM_XCLKA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
661 OMAP3_MUX(CAM_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
662 OMAP3_MUX(CAM_FLD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
663 OMAP3_MUX(CAM_D0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
664 OMAP3_MUX(CAM_D1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
665 OMAP3_MUX(CAM_D2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
666 OMAP3_MUX(CAM_D3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
667 OMAP3_MUX(CAM_D4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
668 OMAP3_MUX(CAM_D5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
669 OMAP3_MUX(CAM_D6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
670 OMAP3_MUX(CAM_D7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
671 OMAP3_MUX(CAM_D8, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
672 OMAP3_MUX(CAM_D9, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
673 OMAP3_MUX(CAM_STROBE, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
674
675 OMAP3_MUX(CAM_D10, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),
676 OMAP3_MUX(CAM_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),
677
7f049ad1
MR		 678 /* display controls */
679 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
680 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
681 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
682
edc961a2
MR		 683 /* TPS IRQ */
684 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
685 OMAP_PIN_INPUT_PULLUP),
686
ca5742bd
TL		 687 { .reg_offset = OMAP_MUX_TERMINATOR },
688};
c3146974
IG		 689
690static void __init cm_t3x_common_dss_mux_init(int mux_mode)
691{
692 omap_mux_init_signal("dss_data18", mux_mode);
693 omap_mux_init_signal("dss_data19", mux_mode);
694 omap_mux_init_signal("dss_data20", mux_mode);
695 omap_mux_init_signal("dss_data21", mux_mode);
696 omap_mux_init_signal("dss_data22", mux_mode);
697 omap_mux_init_signal("dss_data23", mux_mode);
698}
699
700static void __init cm_t35_init_mux(void)
701{
b2404f42
IG		 702 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
703
704 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
705 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
706 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
707 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
708 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
709 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
710 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 711}
712
713static void __init cm_t3730_init_mux(void)
714{
b2404f42
IG		 715 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
716
717 omap_mux_init_signal("sys_boot0", mux_mode);
718 omap_mux_init_signal("sys_boot1", mux_mode);
719 omap_mux_init_signal("sys_boot3", mux_mode);
720 omap_mux_init_signal("sys_boot4", mux_mode);
721 omap_mux_init_signal("sys_boot5", mux_mode);
722 omap_mux_init_signal("sys_boot6", mux_mode);
723 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 724}
725#else
726static inline void cm_t35_init_mux(void) {}
727static inline void cm_t3730_init_mux(void) {}
c7ecea24 728#endif
ca5742bd 729
c3146974 730static void __init cm_t3x_common_init(void)
2886d128 731{
ca5742bd 732 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
2886d128 733 omap_serial_init();
a4ca9dbe
TL		 734 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
735 mt46h32m32lf6_sdrc_params);
3b972bf0 736 omap_hsmmc_init(mmc);
2886d128 737 cm_t35_init_i2c();
96974a24 738 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
2886d128
MR		 739 cm_t35_init_ethernet();
740 cm_t35_init_led();
7f049ad1 741 cm_t35_init_display();
40234bf7 742 omap_twl4030_audio_init("cm-t3x", NULL);
2886d128 743
51482be9 744 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
9e18630b 745 usb_musb_init(NULL);
039401f3 746 cm_t35_init_usbh();
d396be47 747 cm_t35_init_camera();
2886d128
MR		 748}
749
c3146974
IG		 750static void __init cm_t35_init(void)
751{
752 cm_t3x_common_init();
753 cm_t35_init_mux();
754 cm_t35_init_nand();
755}
756
757static void __init cm_t3730_init(void)
758{
759 cm_t3x_common_init();
760 cm_t3730_init_mux();
761}
762
2886d128 763MACHINE_START(CM_T35, "Compulab CM-T35")
5e52b435 764 .atag_offset = 0x100,
71ee7dad 765 .reserve = omap_reserve,
3dc3bad6 766 .map_io = omap3_map_io,
8f5b5a41 767 .init_early = omap35xx_init_early,
741e3a89 768 .init_irq = omap3_init_irq,
6b2f55d7 769 .handle_irq = omap3_intc_handle_irq,
2886d128 770 .init_machine = cm_t35_init,
bbd707ac 771 .init_late = omap35xx_init_late,
6bb27d73 772 .init_time = omap3_sync32k_timer_init,
187e3e06 773 .restart = omap3xxx_restart,
2886d128 774MACHINE_END
c3146974
IG		 775
776MACHINE_START(CM_T3730, "Compulab CM-T3730")
187e3e06
PW		 777 .atag_offset = 0x100,
778 .reserve = omap_reserve,
779 .map_io = omap3_map_io,
780 .init_early = omap3630_init_early,
781 .init_irq = omap3_init_irq,
6b2f55d7 782 .handle_irq = omap3_intc_handle_irq,
187e3e06 783 .init_machine = cm_t3730_init,
bbd707ac 784 .init_late = omap3630_init_late,
6bb27d73 785 .init_time = omap3_sync32k_timer_init,
187e3e06 786 .restart = omap3xxx_restart,
c3146974 787MACHINE_END
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