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Merge branch 'core-hweight-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
CommitLineData
2886d128
MR		 1/*
2 * board-cm-t35.c (CompuLab CM-T35 module)
3 *
4 * Copyright (C) 2009 CompuLab, Ltd.
5 * Author: Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/platform_device.h>
26#include <linux/input.h>
27#include <linux/input/matrix_keypad.h>
28#include <linux/delay.h>
29#include <linux/gpio.h>
30
31#include <linux/i2c/at24.h>
ebeb53e1 32#include <linux/i2c/twl.h>
2886d128
MR		 33#include <linux/regulator/machine.h>
34
7f049ad1
MR		 35#include <linux/spi/spi.h>
36#include <linux/spi/tdo24m.h>
37
2886d128
MR		 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41
42#include <plat/board.h>
43#include <plat/common.h>
2886d128
MR		 44#include <plat/nand.h>
45#include <plat/gpmc.h>
46#include <plat/usb.h>
7f049ad1 47#include <plat/display.h>
2886d128
MR		 48
49#include <mach/hardware.h>
50
ca5742bd 51#include "mux.h"
2886d128 52#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 53#include "hsmmc.h"
2886d128
MR		 54
55#define CM_T35_GPIO_PENDOWN 57
56
57#define CM_T35_SMSC911X_CS 5
58#define CM_T35_SMSC911X_GPIO 163
59#define SB_T35_SMSC911X_CS 4
60#define SB_T35_SMSC911X_GPIO 65
61
62#define NAND_BLOCK_SIZE SZ_128K
63#define GPMC_CS0_BASE 0x60
64#define GPMC_CS0_BASE_ADDR (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE)
65
66#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
67#include <linux/smsc911x.h>
68
69static struct smsc911x_platform_config cm_t35_smsc911x_config = {
70 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
71 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
72 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
73 .phy_interface = PHY_INTERFACE_MODE_MII,
74};
75
76static struct resource cm_t35_smsc911x_resources[] = {
77 {
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
82 .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
83 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
84 },
85};
86
87static struct platform_device cm_t35_smsc911x_device = {
88 .name = "smsc911x",
89 .id = 0,
90 .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources),
91 .resource = cm_t35_smsc911x_resources,
92 .dev = {
93 .platform_data = &cm_t35_smsc911x_config,
94 },
95};
96
97static struct resource sb_t35_smsc911x_resources[] = {
98 {
99 .flags = IORESOURCE_MEM,
100 },
101 {
102 .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
103 .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
104 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
105 },
106};
107
108static struct platform_device sb_t35_smsc911x_device = {
109 .name = "smsc911x",
110 .id = 1,
111 .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources),
112 .resource = sb_t35_smsc911x_resources,
113 .dev = {
114 .platform_data = &cm_t35_smsc911x_config,
115 },
116};
117
118static void __init cm_t35_init_smsc911x(struct platform_device *dev,
119 int cs, int irq_gpio)
120{
121 unsigned long cs_mem_base;
122
123 if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) {
124 pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n");
125 return;
126 }
127
128 dev->resource[0].start = cs_mem_base + 0x0;
129 dev->resource[0].end = cs_mem_base + 0xff;
130
131 if ((gpio_request(irq_gpio, "ETH IRQ") == 0) &&
132 (gpio_direction_input(irq_gpio) == 0)) {
133 gpio_export(irq_gpio, 0);
134 } else {
135 pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n");
136 return;
137 }
138
139 platform_device_register(dev);
140}
141
142static void __init cm_t35_init_ethernet(void)
143{
144 cm_t35_init_smsc911x(&cm_t35_smsc911x_device,
145 CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO);
146 cm_t35_init_smsc911x(&sb_t35_smsc911x_device,
147 SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO);
148}
149#else
150static inline void __init cm_t35_init_ethernet(void) { return; }
151#endif
152
153#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
154#include <linux/leds.h>
155
156static struct gpio_led cm_t35_leds[] = {
157 [0] = {
158 .gpio = 186,
159 .name = "cm-t35:green",
160 .default_trigger = "heartbeat",
161 .active_low = 0,
162 },
163};
164
165static struct gpio_led_platform_data cm_t35_led_pdata = {
166 .num_leds = ARRAY_SIZE(cm_t35_leds),
167 .leds = cm_t35_leds,
168};
169
170static struct platform_device cm_t35_led_device = {
171 .name = "leds-gpio",
172 .id = -1,
173 .dev = {
174 .platform_data = &cm_t35_led_pdata,
175 },
176};
177
178static void __init cm_t35_init_led(void)
179{
180 platform_device_register(&cm_t35_led_device);
181}
182#else
183static inline void cm_t35_init_led(void) {}
184#endif
185
186#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
187#include <linux/mtd/mtd.h>
188#include <linux/mtd/nand.h>
189#include <linux/mtd/partitions.h>
190
191static struct mtd_partition cm_t35_nand_partitions[] = {
192 {
193 .name = "xloader",
194 .offset = 0, /* Offset = 0x00000 */
195 .size = 4 * NAND_BLOCK_SIZE,
196 .mask_flags = MTD_WRITEABLE
197 },
198 {
199 .name = "uboot",
200 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
201 .size = 15 * NAND_BLOCK_SIZE,
202 },
203 {
204 .name = "uboot environment",
205 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
206 .size = 2 * NAND_BLOCK_SIZE,
207 },
208 {
209 .name = "linux",
210 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
211 .size = 32 * NAND_BLOCK_SIZE,
212 },
213 {
214 .name = "rootfs",
215 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
216 .size = MTDPART_SIZ_FULL,
217 },
218};
219
220static struct omap_nand_platform_data cm_t35_nand_data = {
221 .parts = cm_t35_nand_partitions,
222 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
223 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
224 .cs = 0,
225 .gpmc_cs_baseaddr = (void __iomem *)GPMC_CS0_BASE_ADDR,
226 .gpmc_baseaddr = (void __iomem *)OMAP34XX_GPMC_VIRT,
227
228};
229
230static struct resource cm_t35_nand_resource = {
231 .flags = IORESOURCE_MEM,
232};
233
234static struct platform_device cm_t35_nand_device = {
235 .name = "omap2-nand",
236 .id = -1,
237 .num_resources = 1,
238 .resource = &cm_t35_nand_resource,
239 .dev = {
240 .platform_data = &cm_t35_nand_data,
241 },
242};
243
244static void __init cm_t35_init_nand(void)
245{
246 if (platform_device_register(&cm_t35_nand_device) < 0)
247 pr_err("CM-T35: Unable to register NAND device\n");
248}
249#else
250static inline void cm_t35_init_nand(void) {}
251#endif
252
253#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
254 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
2886d128
MR		 255#include <linux/spi/ads7846.h>
256
257#include <plat/mcspi.h>
258
259static struct omap2_mcspi_device_config ads7846_mcspi_config = {
260 .turbo_mode = 0,
261 .single_channel = 1, /* 0: slave, 1: master */
262};
263
264static int ads7846_get_pendown_state(void)
265{
266 return !gpio_get_value(CM_T35_GPIO_PENDOWN);
267}
268
269static struct ads7846_platform_data ads7846_config = {
270 .x_max = 0x0fff,
271 .y_max = 0x0fff,
272 .x_plate_ohms = 180,
273 .pressure_max = 255,
274 .debounce_max = 10,
275 .debounce_tol = 3,
276 .debounce_rep = 1,
277 .get_pendown_state = ads7846_get_pendown_state,
278 .keep_vref_on = 1,
279};
280
281static struct spi_board_info cm_t35_spi_board_info[] __initdata = {
282 {
283 .modalias = "ads7846",
284 .bus_num = 1,
285 .chip_select = 0,
286 .max_speed_hz = 1500000,
287 .controller_data = &ads7846_mcspi_config,
288 .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN),
289 .platform_data = &ads7846_config,
290 },
291};
292
293static void __init cm_t35_init_ads7846(void)
294{
295 if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
296 (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) {
297 gpio_export(CM_T35_GPIO_PENDOWN, 0);
298 } else {
299 pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n");
300 return;
301 }
302
303 spi_register_board_info(cm_t35_spi_board_info,
304 ARRAY_SIZE(cm_t35_spi_board_info));
305}
306#else
307static inline void cm_t35_init_ads7846(void) {}
308#endif
309
7f049ad1
MR		 310#define CM_T35_LCD_EN_GPIO 157
311#define CM_T35_LCD_BL_GPIO 58
312#define CM_T35_DVI_EN_GPIO 54
313
314static int lcd_bl_gpio;
315static int lcd_en_gpio;
316static int dvi_en_gpio;
317
318static int lcd_enabled;
319static int dvi_enabled;
320
321static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
322{
323 if (dvi_enabled) {
324 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
325 return -EINVAL;
326 }
327
328 gpio_set_value(lcd_en_gpio, 1);
329 gpio_set_value(lcd_bl_gpio, 1);
330
331 lcd_enabled = 1;
332
333 return 0;
334}
335
336static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
337{
338 lcd_enabled = 0;
339
340 gpio_set_value(lcd_bl_gpio, 0);
341 gpio_set_value(lcd_en_gpio, 0);
342}
343
344static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
345{
346 if (lcd_enabled) {
347 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
348 return -EINVAL;
349 }
350
351 gpio_set_value(dvi_en_gpio, 0);
352 dvi_enabled = 1;
353
354 return 0;
355}
356
357static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
358{
359 gpio_set_value(dvi_en_gpio, 1);
360 dvi_enabled = 0;
361}
362
363static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
364{
365 return 0;
366}
367
368static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
369{
370}
371
372static struct omap_dss_device cm_t35_lcd_device = {
373 .name = "lcd",
374 .driver_name = "toppoly_tdo35s_panel",
375 .type = OMAP_DISPLAY_TYPE_DPI,
376 .phy.dpi.data_lines = 18,
377 .platform_enable = cm_t35_panel_enable_lcd,
378 .platform_disable = cm_t35_panel_disable_lcd,
379};
380
381static struct omap_dss_device cm_t35_dvi_device = {
382 .name = "dvi",
383 .driver_name = "generic_panel",
384 .type = OMAP_DISPLAY_TYPE_DPI,
385 .phy.dpi.data_lines = 24,
386 .platform_enable = cm_t35_panel_enable_dvi,
387 .platform_disable = cm_t35_panel_disable_dvi,
388};
389
390static struct omap_dss_device cm_t35_tv_device = {
391 .name = "tv",
392 .driver_name = "venc",
393 .type = OMAP_DISPLAY_TYPE_VENC,
394 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
395 .platform_enable = cm_t35_panel_enable_tv,
396 .platform_disable = cm_t35_panel_disable_tv,
397};
398
399static struct omap_dss_device *cm_t35_dss_devices[] = {
400 &cm_t35_lcd_device,
401 &cm_t35_dvi_device,
402 &cm_t35_tv_device,
403};
404
405static struct omap_dss_board_info cm_t35_dss_data = {
406 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
407 .devices = cm_t35_dss_devices,
408 .default_device = &cm_t35_dvi_device,
409};
410
411static struct platform_device cm_t35_dss_device = {
412 .name = "omapdss",
413 .id = -1,
414 .dev = {
415 .platform_data = &cm_t35_dss_data,
416 },
417};
418
419static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
420 .turbo_mode = 0,
421 .single_channel = 1, /* 0: slave, 1: master */
422};
423
424static struct tdo24m_platform_data tdo24m_config = {
425 .model = TDO35S,
426};
427
428static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
429 {
430 .modalias = "tdo24m",
431 .bus_num = 4,
432 .chip_select = 0,
433 .max_speed_hz = 1000000,
434 .controller_data = &tdo24m_mcspi_config,
435 .platform_data = &tdo24m_config,
436 },
437};
438
439static void __init cm_t35_init_display(void)
440{
441 int err;
442
443 lcd_en_gpio = CM_T35_LCD_EN_GPIO;
444 lcd_bl_gpio = CM_T35_LCD_BL_GPIO;
445 dvi_en_gpio = CM_T35_DVI_EN_GPIO;
446
447 spi_register_board_info(cm_t35_lcd_spi_board_info,
448 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
449
450 err = gpio_request(lcd_en_gpio, "LCD RST");
451 if (err) {
452 pr_err("CM-T35: failed to get LCD reset GPIO\n");
453 goto out;
454 }
455
456 err = gpio_request(lcd_bl_gpio, "LCD BL");
457 if (err) {
458 pr_err("CM-T35: failed to get LCD backlight control GPIO\n");
459 goto err_lcd_bl;
460 }
461
462 err = gpio_request(dvi_en_gpio, "DVI EN");
463 if (err) {
464 pr_err("CM-T35: failed to get DVI reset GPIO\n");
465 goto err_dvi_en;
466 }
467
468 gpio_export(lcd_en_gpio, 0);
469 gpio_export(lcd_bl_gpio, 0);
470 gpio_export(dvi_en_gpio, 0);
471 gpio_direction_output(lcd_en_gpio, 0);
472 gpio_direction_output(lcd_bl_gpio, 0);
473 gpio_direction_output(dvi_en_gpio, 1);
474
475 msleep(50);
476 gpio_set_value(lcd_en_gpio, 1);
477
478 err = platform_device_register(&cm_t35_dss_device);
479 if (err) {
480 pr_err("CM-T35: failed to register DSS device\n");
481 goto err_dev_reg;
482 }
483
484 return;
485
486err_dev_reg:
487 gpio_free(dvi_en_gpio);
488err_dvi_en:
489 gpio_free(lcd_bl_gpio);
490err_lcd_bl:
491 gpio_free(lcd_en_gpio);
492out:
493
494 return;
495}
496
2886d128
MR		 497static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
498 .supply = "vmmc",
499};
500
501static struct regulator_consumer_supply cm_t35_vsim_supply = {
502 .supply = "vmmc_aux",
503};
504
7f049ad1
MR		 505static struct regulator_consumer_supply cm_t35_vdac_supply = {
506 .supply = "vdda_dac",
507 .dev = &cm_t35_dss_device.dev,
508};
509
510static struct regulator_consumer_supply cm_t35_vdvi_supply = {
511 .supply = "vdvi",
512 .dev = &cm_t35_dss_device.dev,
513};
514
2886d128
MR		 515/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
516static struct regulator_init_data cm_t35_vmmc1 = {
517 .constraints = {
518 .min_uV = 1850000,
519 .max_uV = 3150000,
520 .valid_modes_mask = REGULATOR_MODE_NORMAL
521 | REGULATOR_MODE_STANDBY,
522 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
523 | REGULATOR_CHANGE_MODE
524 | REGULATOR_CHANGE_STATUS,
525 },
526 .num_consumer_supplies = 1,
527 .consumer_supplies = &cm_t35_vmmc1_supply,
528};
529
530/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
531static struct regulator_init_data cm_t35_vsim = {
532 .constraints = {
533 .min_uV = 1800000,
534 .max_uV = 3000000,
535 .valid_modes_mask = REGULATOR_MODE_NORMAL
536 | REGULATOR_MODE_STANDBY,
537 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
538 | REGULATOR_CHANGE_MODE
539 | REGULATOR_CHANGE_STATUS,
540 },
541 .num_consumer_supplies = 1,
542 .consumer_supplies = &cm_t35_vsim_supply,
543};
544
7f049ad1
MR		 545/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
546static struct regulator_init_data cm_t35_vdac = {
547 .constraints = {
548 .min_uV = 1800000,
549 .max_uV = 1800000,
550 .valid_modes_mask = REGULATOR_MODE_NORMAL
551 | REGULATOR_MODE_STANDBY,
552 .valid_ops_mask = REGULATOR_CHANGE_MODE
553 | REGULATOR_CHANGE_STATUS,
554 },
555 .num_consumer_supplies = 1,
556 .consumer_supplies = &cm_t35_vdac_supply,
557};
558
559/* VPLL2 for digital video outputs */
560static struct regulator_init_data cm_t35_vpll2 = {
561 .constraints = {
562 .name = "VDVI",
563 .min_uV = 1800000,
564 .max_uV = 1800000,
565 .valid_modes_mask = REGULATOR_MODE_NORMAL
566 | REGULATOR_MODE_STANDBY,
567 .valid_ops_mask = REGULATOR_CHANGE_MODE
568 | REGULATOR_CHANGE_STATUS,
569 },
570 .num_consumer_supplies = 1,
571 .consumer_supplies = &cm_t35_vdvi_supply,
572};
573
2886d128
MR		 574static struct twl4030_usb_data cm_t35_usb_data = {
575 .usb_mode = T2_USB_MODE_ULPI,
576};
577
578static int cm_t35_keymap[] = {
579 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
580 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
581 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
582};
583
584static struct matrix_keymap_data cm_t35_keymap_data = {
585 .keymap = cm_t35_keymap,
586 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
587};
588
589static struct twl4030_keypad_data cm_t35_kp_data = {
590 .keymap_data = &cm_t35_keymap_data,
591 .rows = 3,
592 .cols = 3,
593 .rep = 1,
594};
595
68ff0423 596static struct omap2_hsmmc_info mmc[] = {
2886d128
MR		 597 {
598 .mmc = 1,
599 .wires = 4,
600 .gpio_cd = -EINVAL,
601 .gpio_wp = -EINVAL,
602
603 },
604 {
605 .mmc = 2,
606 .wires = 4,
607 .transceiver = 1,
608 .gpio_cd = -EINVAL,
609 .gpio_wp = -EINVAL,
610 .ocr_mask = 0x00100000, /* 3.3V */
611 },
612 {} /* Terminator */
613};
614
6f69a181 615static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
2886d128
MR		 616 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
617 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
618 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
619
620 .phy_reset = true,
621 .reset_gpio_port[0] = -EINVAL,
622 .reset_gpio_port[1] = -EINVAL,
623 .reset_gpio_port[2] = -EINVAL
624};
625
626static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
627 unsigned ngpio)
628{
629 int wlan_rst = gpio + 2;
630
631 if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
632 (gpio_direction_output(wlan_rst, 1) == 0)) {
633 gpio_export(wlan_rst, 0);
634
635 udelay(10);
636 gpio_set_value(wlan_rst, 0);
637 udelay(10);
638 gpio_set_value(wlan_rst, 1);
639 } else {
640 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
641 }
642
643 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
644 mmc[0].gpio_cd = gpio + 0;
68ff0423 645 omap2_hsmmc_init(mmc);
2886d128
MR		 646
647 /* link regulators to MMC adapters */
648 cm_t35_vmmc1_supply.dev = mmc[0].dev;
649 cm_t35_vsim_supply.dev = mmc[0].dev;
650
651 /* setup USB with proper PHY reset GPIOs */
652 ehci_pdata.reset_gpio_port[0] = gpio + 6;
653 ehci_pdata.reset_gpio_port[1] = gpio + 7;
654
655 usb_ehci_init(&ehci_pdata);
656
657 return 0;
658}
659
660static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
661 .gpio_base = OMAP_MAX_GPIO_LINES,
662 .irq_base = TWL4030_GPIO_IRQ_BASE,
663 .irq_end = TWL4030_GPIO_IRQ_END,
664 .setup = cm_t35_twl_gpio_setup,
665};
666
667static struct twl4030_platform_data cm_t35_twldata = {
668 .irq_base = TWL4030_IRQ_BASE,
669 .irq_end = TWL4030_IRQ_END,
670
671 /* platform_data for children goes here */
672 .keypad = &cm_t35_kp_data,
673 .usb = &cm_t35_usb_data,
674 .gpio = &cm_t35_gpio_data,
675 .vmmc1 = &cm_t35_vmmc1,
676 .vsim = &cm_t35_vsim,
7f049ad1
MR		 677 .vdac = &cm_t35_vdac,
678 .vpll2 = &cm_t35_vpll2,
2886d128
MR		 679};
680
681static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = {
682 {
683 I2C_BOARD_INFO("tps65930", 0x48),
684 .flags = I2C_CLIENT_WAKE,
685 .irq = INT_34XX_SYS_NIRQ,
686 .platform_data = &cm_t35_twldata,
687 },
688};
689
690static void __init cm_t35_init_i2c(void)
691{
692 omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo,
693 ARRAY_SIZE(cm_t35_i2c_boardinfo));
694}
695
696static struct omap_board_config_kernel cm_t35_config[] __initdata = {
697};
698
699static void __init cm_t35_init_irq(void)
700{
701 omap_board_config = cm_t35_config;
702 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
703
704 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
705 mt46h32m32lf6_sdrc_params);
706 omap_init_irq();
707 omap_gpio_init();
708}
709
710static void __init cm_t35_map_io(void)
711{
712 omap2_set_globals_343x();
6fbd55d0 713 omap34xx_map_common_io();
2886d128
MR		 714}
715
ca5742bd 716static struct omap_board_mux board_mux[] __initdata = {
edc961a2
MR		 717 /* nCS and IRQ for CM-T35 ethernet */
718 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
719 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
720
721 /* nCS and IRQ for SB-T35 ethernet */
722 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
723 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
724
725 /* PENDOWN GPIO */
726 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
727
728 /* mUSB */
729 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
730 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
731 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
732 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
733 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
734 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
735 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
736 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
737 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
738 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
739 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
740 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
741
742 /* MMC 2 */
743 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
744 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
745 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
746 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
747
748 /* McSPI 1 */
749 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
750 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
751 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
752 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
753
754 /* McSPI 4 */
755 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
756 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
757 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
758 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
759
760 /* McBSP 2 */
761 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
762 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
763 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
764 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
765
766 /* serial ports */
767 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
768 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
769 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
770 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
771
772 /* DSS */
773 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
774 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
775 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
776 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
777 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
778 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
779 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
780 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
781 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
782 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
783 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
784 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
785 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
786 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
787 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
788 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
789 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
790 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
791 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
792 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
793 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
794 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
795 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
796 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
797 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
798 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
799 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
800 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
801
7f049ad1
MR		 802 /* display controls */
803 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
804 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
805 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
806
edc961a2
MR		 807 /* TPS IRQ */
808 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
809 OMAP_PIN_INPUT_PULLUP),
810
ca5742bd
TL		 811 { .reg_offset = OMAP_MUX_TERMINATOR },
812};
ca5742bd 813
884b8369
MM		 814static struct omap_musb_board_data musb_board_data = {
815 .interface_type = MUSB_INTERFACE_ULPI,
816 .mode = MUSB_OTG,
817 .power = 100,
818};
819
2886d128
MR		 820static void __init cm_t35_init(void)
821{
ca5742bd 822 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
2886d128
MR		 823 omap_serial_init();
824 cm_t35_init_i2c();
825 cm_t35_init_nand();
826 cm_t35_init_ads7846();
827 cm_t35_init_ethernet();
828 cm_t35_init_led();
7f049ad1 829 cm_t35_init_display();
2886d128 830
884b8369 831 usb_musb_init(&musb_board_data);
2886d128
MR		 832}
833
834MACHINE_START(CM_T35, "Compulab CM-T35")
835 .phys_io = 0x48000000,
836 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
837 .boot_params = 0x80000100,
838 .map_io = cm_t35_map_io,
839 .init_irq = cm_t35_init_irq,
840 .init_machine = cm_t35_init,
841 .timer = &omap_timer,
842MACHINE_END
Linux kernel - Deliverables
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