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[SCSI] Merge tag 'fcoe-02-19-13' into for-linus
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
CommitLineData
2886d128 1/*
c3146974 2 * CompuLab CM-T35/CM-T3730 modules support
2886d128 3 *
d12c2e28
IG		 4 * Copyright (C) 2009-2011 CompuLab, Ltd.
5 * Authors: Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
2886d128
MR		 7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
2886d128
MR		 17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/input.h>
23#include <linux/input/matrix_keypad.h>
24#include <linux/delay.h>
25#include <linux/gpio.h>
4b25408f 26#include <linux/platform_data/gpio-omap.h>
2886d128
MR		 27
28#include <linux/i2c/at24.h>
ebeb53e1 29#include <linux/i2c/twl.h>
5b3689f4 30#include <linux/regulator/fixed.h>
2886d128 31#include <linux/regulator/machine.h>
3a63833e 32#include <linux/mmc/host.h>
2886d128 33
7f049ad1
MR		 34#include <linux/spi/spi.h>
35#include <linux/spi/tdo24m.h>
36
2886d128
MR		 37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40
2203747c 41#include <linux/platform_data/mtd-nand-omap2.h>
a0b38cc4 42#include <video/omapdss.h>
f8ae2f08 43#include <video/omap-panel-generic-dpi.h>
dac8eb5f 44#include <video/omap-panel-tfp410.h>
2203747c 45#include <linux/platform_data/spi-omap2-mcspi.h>
2886d128 46
6d02643d 47#include "common.h"
ca5742bd 48#include "mux.h"
2886d128 49#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 50#include "hsmmc.h"
96974a24 51#include "common-board-devices.h"
6d02643d 52#include "gpmc.h"
bc3668ea 53#include "gpmc-nand.h"
2886d128 54
039401f3
IG		 55#define CM_T35_GPIO_PENDOWN 57
56#define SB_T35_USB_HUB_RESET_GPIO 167
2886d128
MR		 57
58#define CM_T35_SMSC911X_CS 5
59#define CM_T35_SMSC911X_GPIO 163
60#define SB_T35_SMSC911X_CS 4
61#define SB_T35_SMSC911X_GPIO 65
62
2886d128
MR		 63#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
64#include <linux/smsc911x.h>
ac839b3c 65#include "gpmc-smsc911x.h"
2886d128 66
21b42731 67static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
2886d128 68 .id = 0,
21b42731
MR		 69 .cs = CM_T35_SMSC911X_CS,
70 .gpio_irq = CM_T35_SMSC911X_GPIO,
71 .gpio_reset = -EINVAL,
72 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 73};
74
21b42731 75static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
2886d128 76 .id = 1,
21b42731
MR		 77 .cs = SB_T35_SMSC911X_CS,
78 .gpio_irq = SB_T35_SMSC911X_GPIO,
79 .gpio_reset = -EINVAL,
80 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 81};
82
5b3689f4
RD		 83static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
84 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
85 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
86};
87
88static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
89 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
90 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
91};
92
2886d128
MR		 93static void __init cm_t35_init_ethernet(void)
94{
5b3689f4
RD		 95 regulator_register_fixed(0, cm_t35_smsc911x_supplies,
96 ARRAY_SIZE(cm_t35_smsc911x_supplies));
97 regulator_register_fixed(1, sb_t35_smsc911x_supplies,
98 ARRAY_SIZE(sb_t35_smsc911x_supplies));
99
21b42731
MR		 100 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
101 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
2886d128
MR		 102}
103#else
104static inline void __init cm_t35_init_ethernet(void) { return; }
105#endif
106
107#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
108#include <linux/leds.h>
109
110static struct gpio_led cm_t35_leds[] = {
111 [0] = {
112 .gpio = 186,
113 .name = "cm-t35:green",
114 .default_trigger = "heartbeat",
115 .active_low = 0,
116 },
117};
118
119static struct gpio_led_platform_data cm_t35_led_pdata = {
120 .num_leds = ARRAY_SIZE(cm_t35_leds),
121 .leds = cm_t35_leds,
122};
123
124static struct platform_device cm_t35_led_device = {
125 .name = "leds-gpio",
126 .id = -1,
127 .dev = {
128 .platform_data = &cm_t35_led_pdata,
129 },
130};
131
132static void __init cm_t35_init_led(void)
133{
134 platform_device_register(&cm_t35_led_device);
135}
136#else
137static inline void cm_t35_init_led(void) {}
138#endif
139
140#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
141#include <linux/mtd/mtd.h>
142#include <linux/mtd/nand.h>
143#include <linux/mtd/partitions.h>
144
145static struct mtd_partition cm_t35_nand_partitions[] = {
146 {
147 .name = "xloader",
148 .offset = 0, /* Offset = 0x00000 */
149 .size = 4 * NAND_BLOCK_SIZE,
150 .mask_flags = MTD_WRITEABLE
151 },
152 {
153 .name = "uboot",
154 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
155 .size = 15 * NAND_BLOCK_SIZE,
156 },
157 {
158 .name = "uboot environment",
159 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
160 .size = 2 * NAND_BLOCK_SIZE,
161 },
162 {
163 .name = "linux",
d12c2e28 164 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
2886d128
MR		 165 .size = 32 * NAND_BLOCK_SIZE,
166 },
167 {
168 .name = "rootfs",
d12c2e28 169 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
2886d128
MR		 170 .size = MTDPART_SIZ_FULL,
171 },
172};
173
174static struct omap_nand_platform_data cm_t35_nand_data = {
175 .parts = cm_t35_nand_partitions,
176 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
2886d128 177 .cs = 0,
2886d128
MR		 178};
179
2886d128
MR		 180static void __init cm_t35_init_nand(void)
181{
bc3668ea 182 if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
2886d128
MR		 183 pr_err("CM-T35: Unable to register NAND device\n");
184}
185#else
186static inline void cm_t35_init_nand(void) {}
187#endif
188
7f049ad1
MR		 189#define CM_T35_LCD_EN_GPIO 157
190#define CM_T35_LCD_BL_GPIO 58
191#define CM_T35_DVI_EN_GPIO 54
192
7f049ad1
MR		 193static int lcd_enabled;
194static int dvi_enabled;
195
196static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
197{
198 if (dvi_enabled) {
199 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
200 return -EINVAL;
201 }
202
bc593f5d
IG		 203 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
204 gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
7f049ad1
MR		 205
206 lcd_enabled = 1;
207
208 return 0;
209}
210
211static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
212{
213 lcd_enabled = 0;
214
bc593f5d
IG		 215 gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
216 gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
7f049ad1
MR		 217}
218
7f049ad1
MR		 219static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
220{
221 return 0;
222}
223
224static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
225{
226}
227
89747c91
BW		 228static struct panel_generic_dpi_data lcd_panel = {
229 .name = "toppoly_tdo35s",
230 .platform_enable = cm_t35_panel_enable_lcd,
231 .platform_disable = cm_t35_panel_disable_lcd,
232};
233
7f049ad1
MR		 234static struct omap_dss_device cm_t35_lcd_device = {
235 .name = "lcd",
7f049ad1 236 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 237 .driver_name = "generic_dpi_panel",
238 .data = &lcd_panel,
7f049ad1 239 .phy.dpi.data_lines = 18,
89747c91
BW		 240};
241
2e6f2ee7 242static struct tfp410_platform_data dvi_panel = {
e813a55e 243 .power_down_gpio = CM_T35_DVI_EN_GPIO,
ca2e16fa 244 .i2c_bus_num = -1,
7f049ad1
MR		 245};
246
247static struct omap_dss_device cm_t35_dvi_device = {
248 .name = "dvi",
7f049ad1 249 .type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7 250 .driver_name = "tfp410",
89747c91 251 .data = &dvi_panel,
7f049ad1 252 .phy.dpi.data_lines = 24,
7f049ad1
MR		 253};
254
255static struct omap_dss_device cm_t35_tv_device = {
256 .name = "tv",
257 .driver_name = "venc",
258 .type = OMAP_DISPLAY_TYPE_VENC,
259 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
260 .platform_enable = cm_t35_panel_enable_tv,
261 .platform_disable = cm_t35_panel_disable_tv,
262};
263
264static struct omap_dss_device *cm_t35_dss_devices[] = {
265 &cm_t35_lcd_device,
266 &cm_t35_dvi_device,
267 &cm_t35_tv_device,
268};
269
270static struct omap_dss_board_info cm_t35_dss_data = {
271 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
272 .devices = cm_t35_dss_devices,
273 .default_device = &cm_t35_dvi_device,
274};
275
7f049ad1
MR		 276static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
277 .turbo_mode = 0,
7f049ad1
MR		 278};
279
280static struct tdo24m_platform_data tdo24m_config = {
281 .model = TDO35S,
282};
283
284static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
285 {
286 .modalias = "tdo24m",
287 .bus_num = 4,
288 .chip_select = 0,
289 .max_speed_hz = 1000000,
290 .controller_data = &tdo24m_mcspi_config,
291 .platform_data = &tdo24m_config,
292 },
293};
294
bc593f5d
IG		 295static struct gpio cm_t35_dss_gpios[] __initdata = {
296 { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
297 { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
bc593f5d
IG		 298};
299
7f049ad1
MR		 300static void __init cm_t35_init_display(void)
301{
302 int err;
303
7f049ad1
MR		 304 spi_register_board_info(cm_t35_lcd_spi_board_info,
305 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
306
bc593f5d
IG		 307 err = gpio_request_array(cm_t35_dss_gpios,
308 ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 309 if (err) {
bc593f5d
IG		 310 pr_err("CM-T35: failed to request DSS control GPIOs\n");
311 return;
7f049ad1
MR		 312 }
313
bc593f5d
IG		 314 gpio_export(CM_T35_LCD_EN_GPIO, 0);
315 gpio_export(CM_T35_LCD_BL_GPIO, 0);
7f049ad1
MR		 316
317 msleep(50);
bc593f5d 318 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
7f049ad1 319
d5e13227 320 err = omap_display_init(&cm_t35_dss_data);
7f049ad1
MR		 321 if (err) {
322 pr_err("CM-T35: failed to register DSS device\n");
bc593f5d 323 gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 324 }
7f049ad1
MR		 325}
326
786b01a8
OD		 327static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
328 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
2886d128
MR		 329};
330
786b01a8
OD		 331static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
332 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
2886d128
MR		 333};
334
b74f149c
IG		 335static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
336 REGULATOR_SUPPLY("vcc", "spi1.0"),
cd1c683c
IG		 337 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
338 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
b74f149c
IG		 339};
340
2886d128
MR		 341/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
342static struct regulator_init_data cm_t35_vmmc1 = {
343 .constraints = {
344 .min_uV = 1850000,
345 .max_uV = 3150000,
346 .valid_modes_mask = REGULATOR_MODE_NORMAL
347 | REGULATOR_MODE_STANDBY,
348 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
349 | REGULATOR_CHANGE_MODE
350 | REGULATOR_CHANGE_STATUS,
351 },
786b01a8
OD		 352 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
353 .consumer_supplies = cm_t35_vmmc1_supply,
2886d128
MR		 354};
355
356/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
357static struct regulator_init_data cm_t35_vsim = {
358 .constraints = {
359 .min_uV = 1800000,
360 .max_uV = 3000000,
361 .valid_modes_mask = REGULATOR_MODE_NORMAL
362 | REGULATOR_MODE_STANDBY,
363 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
364 | REGULATOR_CHANGE_MODE
365 | REGULATOR_CHANGE_STATUS,
366 },
786b01a8
OD		 367 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
368 .consumer_supplies = cm_t35_vsim_supply,
2886d128
MR		 369};
370
b74f149c
IG		 371static struct regulator_init_data cm_t35_vio = {
372 .constraints = {
373 .min_uV = 1800000,
374 .max_uV = 1800000,
375 .apply_uV = true,
376 .valid_modes_mask = REGULATOR_MODE_NORMAL
377 | REGULATOR_MODE_STANDBY,
378 .valid_ops_mask = REGULATOR_CHANGE_MODE,
379 },
380 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
381 .consumer_supplies = cm_t35_vio_supplies,
382};
383
bead4375 384static uint32_t cm_t35_keymap[] = {
2886d128
MR		 385 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
386 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
387 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
388};
389
390static struct matrix_keymap_data cm_t35_keymap_data = {
391 .keymap = cm_t35_keymap,
392 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
393};
394
395static struct twl4030_keypad_data cm_t35_kp_data = {
396 .keymap_data = &cm_t35_keymap_data,
397 .rows = 3,
398 .cols = 3,
399 .rep = 1,
400};
401
68ff0423 402static struct omap2_hsmmc_info mmc[] = {
2886d128
MR		 403 {
404 .mmc = 1,
3a63833e 405 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 406 .gpio_cd = -EINVAL,
407 .gpio_wp = -EINVAL,
3b972bf0 408 .deferred = true,
2886d128
MR		 409 },
410 {
411 .mmc = 2,
3a63833e 412 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 413 .transceiver = 1,
414 .gpio_cd = -EINVAL,
415 .gpio_wp = -EINVAL,
416 .ocr_mask = 0x00100000, /* 3.3V */
417 },
418 {} /* Terminator */
419};
420
181b250c
KM		 421static struct usbhs_omap_board_data usbhs_bdata __initdata = {
422 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
423 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
424 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
2886d128
MR		 425
426 .phy_reset = true,
1a6b5923
BW		 427 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
428 .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
2886d128
MR		 429 .reset_gpio_port[2] = -EINVAL
430};
431
36863964 432static void __init cm_t35_init_usbh(void)
039401f3
IG		 433{
434 int err;
435
436 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
437 GPIOF_OUT_INIT_LOW, "usb hub rst");
438 if (err) {
439 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
440 } else {
441 udelay(10);
442 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
443 msleep(1);
444 }
445
446 usbhs_init(&usbhs_bdata);
447}
448
2886d128
MR		 449static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
450 unsigned ngpio)
451{
452 int wlan_rst = gpio + 2;
453
bc593f5d 454 if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
2886d128 455 gpio_export(wlan_rst, 0);
2886d128 456 udelay(10);
be741de1 457 gpio_set_value_cansleep(wlan_rst, 0);
2886d128 458 udelay(10);
be741de1 459 gpio_set_value_cansleep(wlan_rst, 1);
2886d128
MR		 460 } else {
461 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
462 }
463
464 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
465 mmc[0].gpio_cd = gpio + 0;
3b972bf0 466 omap_hsmmc_late_init(mmc);
2886d128 467
2886d128
MR		 468 return 0;
469}
470
471static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
2886d128
MR		 472 .setup = cm_t35_twl_gpio_setup,
473};
474
d61676b8
IG		 475static struct twl4030_power_data cm_t35_power_data = {
476 .use_poweroff = true,
477};
478
2886d128 479static struct twl4030_platform_data cm_t35_twldata = {
2886d128
MR		 480 /* platform_data for children goes here */
481 .keypad = &cm_t35_kp_data,
2886d128
MR		 482 .gpio = &cm_t35_gpio_data,
483 .vmmc1 = &cm_t35_vmmc1,
484 .vsim = &cm_t35_vsim,
b74f149c 485 .vio = &cm_t35_vio,
d61676b8 486 .power = &cm_t35_power_data,
2886d128
MR		 487};
488
d396be47
DL		 489#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
490#include <media/omap3isp.h>
491#include "devices.h"
492
493static struct i2c_board_info cm_t35_isp_i2c_boardinfo[] = {
494 {
495 I2C_BOARD_INFO("mt9t001", 0x5d),
496 },
3d6bbca9
DL		 497 {
498 I2C_BOARD_INFO("tvp5150", 0x5c),
499 },
d396be47
DL		 500};
501
502static struct isp_subdev_i2c_board_info cm_t35_isp_primary_subdevs[] = {
503 {
504 .board_info = &cm_t35_isp_i2c_boardinfo[0],
505 .i2c_adapter_id = 3,
506 },
507 { NULL, 0, },
508};
509
3d6bbca9
DL		 510static struct isp_subdev_i2c_board_info cm_t35_isp_secondary_subdevs[] = {
511 {
512 .board_info = &cm_t35_isp_i2c_boardinfo[1],
513 .i2c_adapter_id = 3,
514 },
515 { NULL, 0, },
516};
517
d396be47
DL		 518static struct isp_v4l2_subdevs_group cm_t35_isp_subdevs[] = {
519 {
520 .subdevs = cm_t35_isp_primary_subdevs,
521 .interface = ISP_INTERFACE_PARALLEL,
522 .bus = {
523 .parallel = {
524 .clk_pol = 1,
525 },
526 },
527 },
3d6bbca9
DL		 528 {
529 .subdevs = cm_t35_isp_secondary_subdevs,
530 .interface = ISP_INTERFACE_PARALLEL,
531 .bus = {
532 .parallel = {
533 .clk_pol = 0,
534 },
535 },
536 },
d396be47
DL		 537 { NULL, 0, },
538};
539
540static struct isp_platform_data cm_t35_isp_pdata = {
541 .subdevs = cm_t35_isp_subdevs,
542};
543
544static void __init cm_t35_init_camera(void)
545{
546 if (omap3_init_camera(&cm_t35_isp_pdata) < 0)
547 pr_warn("CM-T3x: Failed registering camera device!\n");
548}
549
550#else
551static inline void cm_t35_init_camera(void) {}
552#endif /* CONFIG_VIDEO_OMAP3 */
553
2886d128
MR		 554static void __init cm_t35_init_i2c(void)
555{
b252b0ef 556 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
19ce6439
IG		 557 TWL_COMMON_REGULATOR_VDAC |
558 TWL_COMMON_PDATA_AUDIO);
b252b0ef 559
fbd8071c 560 omap3_pmic_init("tps65930", &cm_t35_twldata);
d396be47
DL		 561
562 omap_register_i2c_bus(3, 400, NULL, 0);
2886d128
MR		 563}
564
c7ecea24 565#ifdef CONFIG_OMAP_MUX
ca5742bd 566static struct omap_board_mux board_mux[] __initdata = {
edc961a2
MR		 567 /* nCS and IRQ for CM-T35 ethernet */
568 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
569 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
570
571 /* nCS and IRQ for SB-T35 ethernet */
572 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
573 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
574
575 /* PENDOWN GPIO */
576 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
577
578 /* mUSB */
579 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
580 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
581 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
582 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
583 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
584 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
585 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
586 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
587 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
588 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
589 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
590 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
591
592 /* MMC 2 */
593 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
594 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
595 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
596 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
597
598 /* McSPI 1 */
599 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
600 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
601 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
602 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
603
604 /* McSPI 4 */
605 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
606 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
607 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
608 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
609
610 /* McBSP 2 */
611 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
612 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
613 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
614 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
615
616 /* serial ports */
617 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
618 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
619 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
620 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
621
c3146974 622 /* common DSS */
edc961a2
MR		 623 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
624 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
625 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
626 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2
MR		 627 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
628 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
629 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
630 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
631 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
632 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
633 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
634 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
635 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
636 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
637 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
638 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2 639
d396be47
DL		 640 /* Camera */
641 OMAP3_MUX(CAM_HS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
642 OMAP3_MUX(CAM_VS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
643 OMAP3_MUX(CAM_XCLKA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
644 OMAP3_MUX(CAM_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
645 OMAP3_MUX(CAM_FLD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
646 OMAP3_MUX(CAM_D0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
647 OMAP3_MUX(CAM_D1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
648 OMAP3_MUX(CAM_D2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
649 OMAP3_MUX(CAM_D3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
650 OMAP3_MUX(CAM_D4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
651 OMAP3_MUX(CAM_D5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
652 OMAP3_MUX(CAM_D6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
653 OMAP3_MUX(CAM_D7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
654 OMAP3_MUX(CAM_D8, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
655 OMAP3_MUX(CAM_D9, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
656 OMAP3_MUX(CAM_STROBE, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
657
658 OMAP3_MUX(CAM_D10, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),
659 OMAP3_MUX(CAM_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),
660
7f049ad1
MR		 661 /* display controls */
662 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
663 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
664 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
665
edc961a2
MR		 666 /* TPS IRQ */
667 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
668 OMAP_PIN_INPUT_PULLUP),
669
ca5742bd
TL		 670 { .reg_offset = OMAP_MUX_TERMINATOR },
671};
c3146974
IG		 672
673static void __init cm_t3x_common_dss_mux_init(int mux_mode)
674{
675 omap_mux_init_signal("dss_data18", mux_mode);
676 omap_mux_init_signal("dss_data19", mux_mode);
677 omap_mux_init_signal("dss_data20", mux_mode);
678 omap_mux_init_signal("dss_data21", mux_mode);
679 omap_mux_init_signal("dss_data22", mux_mode);
680 omap_mux_init_signal("dss_data23", mux_mode);
681}
682
683static void __init cm_t35_init_mux(void)
684{
b2404f42
IG		 685 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
686
687 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
688 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
689 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
690 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
691 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
692 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
693 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 694}
695
696static void __init cm_t3730_init_mux(void)
697{
b2404f42
IG		 698 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
699
700 omap_mux_init_signal("sys_boot0", mux_mode);
701 omap_mux_init_signal("sys_boot1", mux_mode);
702 omap_mux_init_signal("sys_boot3", mux_mode);
703 omap_mux_init_signal("sys_boot4", mux_mode);
704 omap_mux_init_signal("sys_boot5", mux_mode);
705 omap_mux_init_signal("sys_boot6", mux_mode);
706 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 707}
708#else
709static inline void cm_t35_init_mux(void) {}
710static inline void cm_t3730_init_mux(void) {}
c7ecea24 711#endif
ca5742bd 712
c3146974 713static void __init cm_t3x_common_init(void)
2886d128 714{
ca5742bd 715 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
2886d128 716 omap_serial_init();
a4ca9dbe
TL		 717 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
718 mt46h32m32lf6_sdrc_params);
3b972bf0 719 omap_hsmmc_init(mmc);
2886d128 720 cm_t35_init_i2c();
96974a24 721 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
2886d128
MR		 722 cm_t35_init_ethernet();
723 cm_t35_init_led();
7f049ad1 724 cm_t35_init_display();
ac51c90f 725 omap_twl4030_audio_init("cm-t3x");
2886d128 726
9e18630b 727 usb_musb_init(NULL);
039401f3 728 cm_t35_init_usbh();
d396be47 729 cm_t35_init_camera();
2886d128
MR		 730}
731
c3146974
IG		 732static void __init cm_t35_init(void)
733{
734 cm_t3x_common_init();
735 cm_t35_init_mux();
736 cm_t35_init_nand();
737}
738
739static void __init cm_t3730_init(void)
740{
741 cm_t3x_common_init();
742 cm_t3730_init_mux();
743}
744
2886d128 745MACHINE_START(CM_T35, "Compulab CM-T35")
5e52b435 746 .atag_offset = 0x100,
71ee7dad 747 .reserve = omap_reserve,
3dc3bad6 748 .map_io = omap3_map_io,
8f5b5a41 749 .init_early = omap35xx_init_early,
741e3a89 750 .init_irq = omap3_init_irq,
6b2f55d7 751 .handle_irq = omap3_intc_handle_irq,
2886d128 752 .init_machine = cm_t35_init,
bbd707ac 753 .init_late = omap35xx_init_late,
e74984e4 754 .timer = &omap3_timer,
187e3e06 755 .restart = omap3xxx_restart,
2886d128 756MACHINE_END
c3146974
IG		 757
758MACHINE_START(CM_T3730, "Compulab CM-T3730")
187e3e06
PW		 759 .atag_offset = 0x100,
760 .reserve = omap_reserve,
761 .map_io = omap3_map_io,
762 .init_early = omap3630_init_early,
763 .init_irq = omap3_init_irq,
6b2f55d7 764 .handle_irq = omap3_intc_handle_irq,
187e3e06 765 .init_machine = cm_t3730_init,
bbd707ac 766 .init_late = omap3630_init_late,
187e3e06
PW		 767 .timer = &omap3_timer,
768 .restart = omap3xxx_restart,
c3146974 769MACHINE_END
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