Commit | Line | Data |
---|---|---|
2886d128 | 1 | /* |
c3146974 | 2 | * CompuLab CM-T35/CM-T3730 modules support |
2886d128 | 3 | * |
d12c2e28 IG |
4 | * Copyright (C) 2009-2011 CompuLab, Ltd. |
5 | * Authors: Mike Rapoport <mike@compulab.co.il> | |
6 | * Igor Grinberg <grinberg@compulab.co.il> | |
2886d128 MR |
7 | * |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but | |
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * General Public License for more details. | |
16 | * | |
2886d128 MR |
17 | */ |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/input.h> | |
23 | #include <linux/input/matrix_keypad.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/gpio.h> | |
4b25408f | 26 | #include <linux/platform_data/gpio-omap.h> |
2886d128 MR |
27 | |
28 | #include <linux/i2c/at24.h> | |
ebeb53e1 | 29 | #include <linux/i2c/twl.h> |
5b3689f4 | 30 | #include <linux/regulator/fixed.h> |
2886d128 | 31 | #include <linux/regulator/machine.h> |
3a63833e | 32 | #include <linux/mmc/host.h> |
51482be9 | 33 | #include <linux/usb/phy.h> |
2886d128 | 34 | |
7f049ad1 MR |
35 | #include <linux/spi/spi.h> |
36 | #include <linux/spi/tdo24m.h> | |
37 | ||
2886d128 MR |
38 | #include <asm/mach-types.h> |
39 | #include <asm/mach/arch.h> | |
40 | #include <asm/mach/map.h> | |
41 | ||
2203747c | 42 | #include <linux/platform_data/mtd-nand-omap2.h> |
a0b38cc4 | 43 | #include <video/omapdss.h> |
a0d8dde9 | 44 | #include <video/omap-panel-data.h> |
2203747c | 45 | #include <linux/platform_data/spi-omap2-mcspi.h> |
2886d128 | 46 | |
6d02643d | 47 | #include "common.h" |
ca5742bd | 48 | #include "mux.h" |
2886d128 | 49 | #include "sdram-micron-mt46h32m32lf-6.h" |
d02a900b | 50 | #include "hsmmc.h" |
96974a24 | 51 | #include "common-board-devices.h" |
6d02643d | 52 | #include "gpmc.h" |
bc3668ea | 53 | #include "gpmc-nand.h" |
2886d128 | 54 | |
039401f3 IG |
55 | #define CM_T35_GPIO_PENDOWN 57 |
56 | #define SB_T35_USB_HUB_RESET_GPIO 167 | |
2886d128 MR |
57 | |
58 | #define CM_T35_SMSC911X_CS 5 | |
59 | #define CM_T35_SMSC911X_GPIO 163 | |
60 | #define SB_T35_SMSC911X_CS 4 | |
61 | #define SB_T35_SMSC911X_GPIO 65 | |
62 | ||
2886d128 MR |
63 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
64 | #include <linux/smsc911x.h> | |
ac839b3c | 65 | #include "gpmc-smsc911x.h" |
2886d128 | 66 | |
21b42731 | 67 | static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = { |
2886d128 | 68 | .id = 0, |
21b42731 MR |
69 | .cs = CM_T35_SMSC911X_CS, |
70 | .gpio_irq = CM_T35_SMSC911X_GPIO, | |
71 | .gpio_reset = -EINVAL, | |
72 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | |
2886d128 MR |
73 | }; |
74 | ||
21b42731 | 75 | static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = { |
2886d128 | 76 | .id = 1, |
21b42731 MR |
77 | .cs = SB_T35_SMSC911X_CS, |
78 | .gpio_irq = SB_T35_SMSC911X_GPIO, | |
79 | .gpio_reset = -EINVAL, | |
80 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | |
2886d128 MR |
81 | }; |
82 | ||
5b3689f4 RD |
83 | static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = { |
84 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | |
85 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | |
86 | }; | |
87 | ||
88 | static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = { | |
89 | REGULATOR_SUPPLY("vddvario", "smsc911x.1"), | |
90 | REGULATOR_SUPPLY("vdd33a", "smsc911x.1"), | |
91 | }; | |
92 | ||
2886d128 MR |
93 | static void __init cm_t35_init_ethernet(void) |
94 | { | |
5b3689f4 RD |
95 | regulator_register_fixed(0, cm_t35_smsc911x_supplies, |
96 | ARRAY_SIZE(cm_t35_smsc911x_supplies)); | |
97 | regulator_register_fixed(1, sb_t35_smsc911x_supplies, | |
98 | ARRAY_SIZE(sb_t35_smsc911x_supplies)); | |
99 | ||
21b42731 MR |
100 | gpmc_smsc911x_init(&cm_t35_smsc911x_cfg); |
101 | gpmc_smsc911x_init(&sb_t35_smsc911x_cfg); | |
2886d128 MR |
102 | } |
103 | #else | |
104 | static inline void __init cm_t35_init_ethernet(void) { return; } | |
105 | #endif | |
106 | ||
107 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
108 | #include <linux/leds.h> | |
109 | ||
110 | static struct gpio_led cm_t35_leds[] = { | |
111 | [0] = { | |
112 | .gpio = 186, | |
113 | .name = "cm-t35:green", | |
114 | .default_trigger = "heartbeat", | |
115 | .active_low = 0, | |
116 | }, | |
117 | }; | |
118 | ||
119 | static struct gpio_led_platform_data cm_t35_led_pdata = { | |
120 | .num_leds = ARRAY_SIZE(cm_t35_leds), | |
121 | .leds = cm_t35_leds, | |
122 | }; | |
123 | ||
124 | static struct platform_device cm_t35_led_device = { | |
125 | .name = "leds-gpio", | |
126 | .id = -1, | |
127 | .dev = { | |
128 | .platform_data = &cm_t35_led_pdata, | |
129 | }, | |
130 | }; | |
131 | ||
132 | static void __init cm_t35_init_led(void) | |
133 | { | |
134 | platform_device_register(&cm_t35_led_device); | |
135 | } | |
136 | #else | |
137 | static inline void cm_t35_init_led(void) {} | |
138 | #endif | |
139 | ||
140 | #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) | |
141 | #include <linux/mtd/mtd.h> | |
142 | #include <linux/mtd/nand.h> | |
143 | #include <linux/mtd/partitions.h> | |
144 | ||
145 | static struct mtd_partition cm_t35_nand_partitions[] = { | |
146 | { | |
147 | .name = "xloader", | |
148 | .offset = 0, /* Offset = 0x00000 */ | |
149 | .size = 4 * NAND_BLOCK_SIZE, | |
150 | .mask_flags = MTD_WRITEABLE | |
151 | }, | |
152 | { | |
153 | .name = "uboot", | |
154 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
155 | .size = 15 * NAND_BLOCK_SIZE, | |
156 | }, | |
157 | { | |
158 | .name = "uboot environment", | |
159 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ | |
160 | .size = 2 * NAND_BLOCK_SIZE, | |
161 | }, | |
162 | { | |
163 | .name = "linux", | |
d12c2e28 | 164 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */ |
2886d128 MR |
165 | .size = 32 * NAND_BLOCK_SIZE, |
166 | }, | |
167 | { | |
168 | .name = "rootfs", | |
d12c2e28 | 169 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */ |
2886d128 MR |
170 | .size = MTDPART_SIZ_FULL, |
171 | }, | |
172 | }; | |
173 | ||
174 | static struct omap_nand_platform_data cm_t35_nand_data = { | |
175 | .parts = cm_t35_nand_partitions, | |
176 | .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), | |
2886d128 | 177 | .cs = 0, |
2886d128 MR |
178 | }; |
179 | ||
2886d128 MR |
180 | static void __init cm_t35_init_nand(void) |
181 | { | |
bc3668ea | 182 | if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0) |
2886d128 MR |
183 | pr_err("CM-T35: Unable to register NAND device\n"); |
184 | } | |
185 | #else | |
186 | static inline void cm_t35_init_nand(void) {} | |
187 | #endif | |
188 | ||
7f049ad1 MR |
189 | #define CM_T35_LCD_EN_GPIO 157 |
190 | #define CM_T35_LCD_BL_GPIO 58 | |
191 | #define CM_T35_DVI_EN_GPIO 54 | |
192 | ||
89747c91 BW |
193 | static struct panel_generic_dpi_data lcd_panel = { |
194 | .name = "toppoly_tdo35s", | |
e471e9ad TV |
195 | .num_gpios = 1, |
196 | .gpios = { | |
197 | CM_T35_LCD_BL_GPIO, | |
198 | }, | |
89747c91 BW |
199 | }; |
200 | ||
7f049ad1 MR |
201 | static struct omap_dss_device cm_t35_lcd_device = { |
202 | .name = "lcd", | |
7f049ad1 | 203 | .type = OMAP_DISPLAY_TYPE_DPI, |
89747c91 BW |
204 | .driver_name = "generic_dpi_panel", |
205 | .data = &lcd_panel, | |
7f049ad1 | 206 | .phy.dpi.data_lines = 18, |
89747c91 BW |
207 | }; |
208 | ||
2e6f2ee7 | 209 | static struct tfp410_platform_data dvi_panel = { |
e813a55e | 210 | .power_down_gpio = CM_T35_DVI_EN_GPIO, |
ca2e16fa | 211 | .i2c_bus_num = -1, |
7f049ad1 MR |
212 | }; |
213 | ||
214 | static struct omap_dss_device cm_t35_dvi_device = { | |
215 | .name = "dvi", | |
7f049ad1 | 216 | .type = OMAP_DISPLAY_TYPE_DPI, |
2e6f2ee7 | 217 | .driver_name = "tfp410", |
89747c91 | 218 | .data = &dvi_panel, |
7f049ad1 | 219 | .phy.dpi.data_lines = 24, |
7f049ad1 MR |
220 | }; |
221 | ||
222 | static struct omap_dss_device cm_t35_tv_device = { | |
223 | .name = "tv", | |
224 | .driver_name = "venc", | |
225 | .type = OMAP_DISPLAY_TYPE_VENC, | |
226 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
7f049ad1 MR |
227 | }; |
228 | ||
229 | static struct omap_dss_device *cm_t35_dss_devices[] = { | |
230 | &cm_t35_lcd_device, | |
231 | &cm_t35_dvi_device, | |
232 | &cm_t35_tv_device, | |
233 | }; | |
234 | ||
235 | static struct omap_dss_board_info cm_t35_dss_data = { | |
236 | .num_devices = ARRAY_SIZE(cm_t35_dss_devices), | |
237 | .devices = cm_t35_dss_devices, | |
238 | .default_device = &cm_t35_dvi_device, | |
239 | }; | |
240 | ||
7f049ad1 MR |
241 | static struct omap2_mcspi_device_config tdo24m_mcspi_config = { |
242 | .turbo_mode = 0, | |
7f049ad1 MR |
243 | }; |
244 | ||
245 | static struct tdo24m_platform_data tdo24m_config = { | |
246 | .model = TDO35S, | |
247 | }; | |
248 | ||
249 | static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = { | |
250 | { | |
251 | .modalias = "tdo24m", | |
252 | .bus_num = 4, | |
253 | .chip_select = 0, | |
254 | .max_speed_hz = 1000000, | |
255 | .controller_data = &tdo24m_mcspi_config, | |
256 | .platform_data = &tdo24m_config, | |
257 | }, | |
258 | }; | |
259 | ||
260 | static void __init cm_t35_init_display(void) | |
261 | { | |
262 | int err; | |
263 | ||
7f049ad1 MR |
264 | spi_register_board_info(cm_t35_lcd_spi_board_info, |
265 | ARRAY_SIZE(cm_t35_lcd_spi_board_info)); | |
266 | ||
e471e9ad TV |
267 | |
268 | err = gpio_request_one(CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, | |
269 | "lcd bl enable"); | |
7f049ad1 | 270 | if (err) { |
e471e9ad | 271 | pr_err("CM-T35: failed to request LCD EN GPIO\n"); |
bc593f5d | 272 | return; |
7f049ad1 MR |
273 | } |
274 | ||
7f049ad1 | 275 | msleep(50); |
bc593f5d | 276 | gpio_set_value(CM_T35_LCD_EN_GPIO, 1); |
7f049ad1 | 277 | |
d5e13227 | 278 | err = omap_display_init(&cm_t35_dss_data); |
7f049ad1 MR |
279 | if (err) { |
280 | pr_err("CM-T35: failed to register DSS device\n"); | |
e471e9ad | 281 | gpio_free(CM_T35_LCD_EN_GPIO); |
7f049ad1 | 282 | } |
7f049ad1 MR |
283 | } |
284 | ||
786b01a8 OD |
285 | static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = { |
286 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
2886d128 MR |
287 | }; |
288 | ||
786b01a8 OD |
289 | static struct regulator_consumer_supply cm_t35_vsim_supply[] = { |
290 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | |
2886d128 MR |
291 | }; |
292 | ||
b74f149c IG |
293 | static struct regulator_consumer_supply cm_t35_vio_supplies[] = { |
294 | REGULATOR_SUPPLY("vcc", "spi1.0"), | |
cd1c683c IG |
295 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), |
296 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | |
b74f149c IG |
297 | }; |
298 | ||
2886d128 MR |
299 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ |
300 | static struct regulator_init_data cm_t35_vmmc1 = { | |
301 | .constraints = { | |
302 | .min_uV = 1850000, | |
303 | .max_uV = 3150000, | |
304 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
305 | | REGULATOR_MODE_STANDBY, | |
306 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
307 | | REGULATOR_CHANGE_MODE | |
308 | | REGULATOR_CHANGE_STATUS, | |
309 | }, | |
786b01a8 OD |
310 | .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply), |
311 | .consumer_supplies = cm_t35_vmmc1_supply, | |
2886d128 MR |
312 | }; |
313 | ||
314 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | |
315 | static struct regulator_init_data cm_t35_vsim = { | |
316 | .constraints = { | |
317 | .min_uV = 1800000, | |
318 | .max_uV = 3000000, | |
319 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
320 | | REGULATOR_MODE_STANDBY, | |
321 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
322 | | REGULATOR_CHANGE_MODE | |
323 | | REGULATOR_CHANGE_STATUS, | |
324 | }, | |
786b01a8 OD |
325 | .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply), |
326 | .consumer_supplies = cm_t35_vsim_supply, | |
2886d128 MR |
327 | }; |
328 | ||
b74f149c IG |
329 | static struct regulator_init_data cm_t35_vio = { |
330 | .constraints = { | |
331 | .min_uV = 1800000, | |
332 | .max_uV = 1800000, | |
333 | .apply_uV = true, | |
334 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
335 | | REGULATOR_MODE_STANDBY, | |
336 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
337 | }, | |
338 | .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies), | |
339 | .consumer_supplies = cm_t35_vio_supplies, | |
340 | }; | |
341 | ||
bead4375 | 342 | static uint32_t cm_t35_keymap[] = { |
2886d128 MR |
343 | KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), |
344 | KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), | |
345 | KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D), | |
346 | }; | |
347 | ||
348 | static struct matrix_keymap_data cm_t35_keymap_data = { | |
349 | .keymap = cm_t35_keymap, | |
350 | .keymap_size = ARRAY_SIZE(cm_t35_keymap), | |
351 | }; | |
352 | ||
353 | static struct twl4030_keypad_data cm_t35_kp_data = { | |
354 | .keymap_data = &cm_t35_keymap_data, | |
355 | .rows = 3, | |
356 | .cols = 3, | |
357 | .rep = 1, | |
358 | }; | |
359 | ||
68ff0423 | 360 | static struct omap2_hsmmc_info mmc[] = { |
2886d128 MR |
361 | { |
362 | .mmc = 1, | |
3a63833e | 363 | .caps = MMC_CAP_4_BIT_DATA, |
2886d128 MR |
364 | .gpio_cd = -EINVAL, |
365 | .gpio_wp = -EINVAL, | |
3b972bf0 | 366 | .deferred = true, |
2886d128 MR |
367 | }, |
368 | { | |
369 | .mmc = 2, | |
3a63833e | 370 | .caps = MMC_CAP_4_BIT_DATA, |
2886d128 MR |
371 | .transceiver = 1, |
372 | .gpio_cd = -EINVAL, | |
373 | .gpio_wp = -EINVAL, | |
374 | .ocr_mask = 0x00100000, /* 3.3V */ | |
375 | }, | |
376 | {} /* Terminator */ | |
377 | }; | |
378 | ||
59b1499a RQ |
379 | static struct usbhs_phy_data phy_data[] __initdata = { |
380 | { | |
381 | .port = 1, | |
382 | .reset_gpio = OMAP_MAX_GPIO_LINES + 6, | |
383 | .vcc_gpio = -EINVAL, | |
384 | }, | |
385 | { | |
386 | .port = 2, | |
387 | .reset_gpio = OMAP_MAX_GPIO_LINES + 7, | |
388 | .vcc_gpio = -EINVAL, | |
389 | }, | |
390 | }; | |
391 | ||
42973159 | 392 | static struct usbhs_omap_platform_data usbhs_bdata __initdata = { |
181b250c KM |
393 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
394 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
2886d128 MR |
395 | }; |
396 | ||
36863964 | 397 | static void __init cm_t35_init_usbh(void) |
039401f3 IG |
398 | { |
399 | int err; | |
400 | ||
401 | err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO, | |
402 | GPIOF_OUT_INIT_LOW, "usb hub rst"); | |
403 | if (err) { | |
404 | pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err); | |
405 | } else { | |
406 | udelay(10); | |
407 | gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1); | |
408 | msleep(1); | |
409 | } | |
410 | ||
59b1499a | 411 | usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); |
039401f3 IG |
412 | usbhs_init(&usbhs_bdata); |
413 | } | |
414 | ||
2886d128 MR |
415 | static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, |
416 | unsigned ngpio) | |
417 | { | |
418 | int wlan_rst = gpio + 2; | |
419 | ||
bc593f5d | 420 | if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) { |
2886d128 | 421 | gpio_export(wlan_rst, 0); |
2886d128 | 422 | udelay(10); |
be741de1 | 423 | gpio_set_value_cansleep(wlan_rst, 0); |
2886d128 | 424 | udelay(10); |
be741de1 | 425 | gpio_set_value_cansleep(wlan_rst, 1); |
2886d128 MR |
426 | } else { |
427 | pr_err("CM-T35: could not obtain gpio for WiFi reset\n"); | |
428 | } | |
429 | ||
430 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | |
431 | mmc[0].gpio_cd = gpio + 0; | |
3b972bf0 | 432 | omap_hsmmc_late_init(mmc); |
2886d128 | 433 | |
2886d128 MR |
434 | return 0; |
435 | } | |
436 | ||
437 | static struct twl4030_gpio_platform_data cm_t35_gpio_data = { | |
2886d128 MR |
438 | .setup = cm_t35_twl_gpio_setup, |
439 | }; | |
440 | ||
d61676b8 IG |
441 | static struct twl4030_power_data cm_t35_power_data = { |
442 | .use_poweroff = true, | |
443 | }; | |
444 | ||
2886d128 | 445 | static struct twl4030_platform_data cm_t35_twldata = { |
2886d128 MR |
446 | /* platform_data for children goes here */ |
447 | .keypad = &cm_t35_kp_data, | |
2886d128 MR |
448 | .gpio = &cm_t35_gpio_data, |
449 | .vmmc1 = &cm_t35_vmmc1, | |
450 | .vsim = &cm_t35_vsim, | |
b74f149c | 451 | .vio = &cm_t35_vio, |
d61676b8 | 452 | .power = &cm_t35_power_data, |
2886d128 MR |
453 | }; |
454 | ||
d396be47 DL |
455 | #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) |
456 | #include <media/omap3isp.h> | |
457 | #include "devices.h" | |
458 | ||
459 | static struct i2c_board_info cm_t35_isp_i2c_boardinfo[] = { | |
460 | { | |
461 | I2C_BOARD_INFO("mt9t001", 0x5d), | |
462 | }, | |
3d6bbca9 DL |
463 | { |
464 | I2C_BOARD_INFO("tvp5150", 0x5c), | |
465 | }, | |
d396be47 DL |
466 | }; |
467 | ||
468 | static struct isp_subdev_i2c_board_info cm_t35_isp_primary_subdevs[] = { | |
469 | { | |
470 | .board_info = &cm_t35_isp_i2c_boardinfo[0], | |
471 | .i2c_adapter_id = 3, | |
472 | }, | |
473 | { NULL, 0, }, | |
474 | }; | |
475 | ||
3d6bbca9 DL |
476 | static struct isp_subdev_i2c_board_info cm_t35_isp_secondary_subdevs[] = { |
477 | { | |
478 | .board_info = &cm_t35_isp_i2c_boardinfo[1], | |
479 | .i2c_adapter_id = 3, | |
480 | }, | |
481 | { NULL, 0, }, | |
482 | }; | |
483 | ||
d396be47 DL |
484 | static struct isp_v4l2_subdevs_group cm_t35_isp_subdevs[] = { |
485 | { | |
486 | .subdevs = cm_t35_isp_primary_subdevs, | |
487 | .interface = ISP_INTERFACE_PARALLEL, | |
488 | .bus = { | |
489 | .parallel = { | |
490 | .clk_pol = 1, | |
491 | }, | |
492 | }, | |
493 | }, | |
3d6bbca9 DL |
494 | { |
495 | .subdevs = cm_t35_isp_secondary_subdevs, | |
496 | .interface = ISP_INTERFACE_PARALLEL, | |
497 | .bus = { | |
498 | .parallel = { | |
499 | .clk_pol = 0, | |
500 | }, | |
501 | }, | |
502 | }, | |
d396be47 DL |
503 | { NULL, 0, }, |
504 | }; | |
505 | ||
506 | static struct isp_platform_data cm_t35_isp_pdata = { | |
507 | .subdevs = cm_t35_isp_subdevs, | |
508 | }; | |
509 | ||
510 | static void __init cm_t35_init_camera(void) | |
511 | { | |
512 | if (omap3_init_camera(&cm_t35_isp_pdata) < 0) | |
513 | pr_warn("CM-T3x: Failed registering camera device!\n"); | |
514 | } | |
515 | ||
516 | #else | |
517 | static inline void cm_t35_init_camera(void) {} | |
518 | #endif /* CONFIG_VIDEO_OMAP3 */ | |
519 | ||
2886d128 MR |
520 | static void __init cm_t35_init_i2c(void) |
521 | { | |
b252b0ef | 522 | omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, |
19ce6439 IG |
523 | TWL_COMMON_REGULATOR_VDAC | |
524 | TWL_COMMON_PDATA_AUDIO); | |
b252b0ef | 525 | |
fbd8071c | 526 | omap3_pmic_init("tps65930", &cm_t35_twldata); |
d396be47 DL |
527 | |
528 | omap_register_i2c_bus(3, 400, NULL, 0); | |
2886d128 MR |
529 | } |
530 | ||
c7ecea24 | 531 | #ifdef CONFIG_OMAP_MUX |
ca5742bd | 532 | static struct omap_board_mux board_mux[] __initdata = { |
edc961a2 MR |
533 | /* nCS and IRQ for CM-T35 ethernet */ |
534 | OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0), | |
535 | OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), | |
536 | ||
537 | /* nCS and IRQ for SB-T35 ethernet */ | |
538 | OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0), | |
539 | OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), | |
540 | ||
541 | /* PENDOWN GPIO */ | |
542 | OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
543 | ||
544 | /* mUSB */ | |
545 | OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
546 | OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
547 | OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
548 | OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
549 | OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
550 | OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
551 | OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
552 | OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
553 | OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
554 | OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
555 | OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
556 | OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
557 | ||
558 | /* MMC 2 */ | |
559 | OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
560 | OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
561 | OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
562 | OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
563 | ||
564 | /* McSPI 1 */ | |
565 | OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
566 | OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
567 | OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
568 | OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
569 | ||
570 | /* McSPI 4 */ | |
571 | OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
572 | OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
573 | OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
574 | OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP), | |
575 | ||
576 | /* McBSP 2 */ | |
577 | OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
578 | OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
579 | OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
580 | OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
581 | ||
582 | /* serial ports */ | |
583 | OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
584 | OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
585 | OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
586 | OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
587 | ||
c3146974 | 588 | /* common DSS */ |
edc961a2 MR |
589 | OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), |
590 | OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
591 | OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
592 | OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
edc961a2 MR |
593 | OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), |
594 | OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
595 | OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
596 | OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
597 | OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
598 | OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
599 | OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
600 | OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
601 | OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
602 | OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
603 | OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
604 | OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
edc961a2 | 605 | |
d396be47 DL |
606 | /* Camera */ |
607 | OMAP3_MUX(CAM_HS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
608 | OMAP3_MUX(CAM_VS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
609 | OMAP3_MUX(CAM_XCLKA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
610 | OMAP3_MUX(CAM_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
611 | OMAP3_MUX(CAM_FLD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
612 | OMAP3_MUX(CAM_D0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
613 | OMAP3_MUX(CAM_D1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
614 | OMAP3_MUX(CAM_D2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
615 | OMAP3_MUX(CAM_D3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
616 | OMAP3_MUX(CAM_D4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
617 | OMAP3_MUX(CAM_D5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
618 | OMAP3_MUX(CAM_D6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
619 | OMAP3_MUX(CAM_D7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
620 | OMAP3_MUX(CAM_D8, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
621 | OMAP3_MUX(CAM_D9, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
622 | OMAP3_MUX(CAM_STROBE, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
623 | ||
624 | OMAP3_MUX(CAM_D10, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN), | |
625 | OMAP3_MUX(CAM_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN), | |
626 | ||
7f049ad1 MR |
627 | /* display controls */ |
628 | OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
629 | OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
630 | OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
631 | ||
edc961a2 MR |
632 | /* TPS IRQ */ |
633 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \ | |
634 | OMAP_PIN_INPUT_PULLUP), | |
635 | ||
ca5742bd TL |
636 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
637 | }; | |
c3146974 IG |
638 | |
639 | static void __init cm_t3x_common_dss_mux_init(int mux_mode) | |
640 | { | |
641 | omap_mux_init_signal("dss_data18", mux_mode); | |
642 | omap_mux_init_signal("dss_data19", mux_mode); | |
643 | omap_mux_init_signal("dss_data20", mux_mode); | |
644 | omap_mux_init_signal("dss_data21", mux_mode); | |
645 | omap_mux_init_signal("dss_data22", mux_mode); | |
646 | omap_mux_init_signal("dss_data23", mux_mode); | |
647 | } | |
648 | ||
649 | static void __init cm_t35_init_mux(void) | |
650 | { | |
b2404f42 IG |
651 | int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT; |
652 | ||
653 | omap_mux_init_signal("dss_data0.dss_data0", mux_mode); | |
654 | omap_mux_init_signal("dss_data1.dss_data1", mux_mode); | |
655 | omap_mux_init_signal("dss_data2.dss_data2", mux_mode); | |
656 | omap_mux_init_signal("dss_data3.dss_data3", mux_mode); | |
657 | omap_mux_init_signal("dss_data4.dss_data4", mux_mode); | |
658 | omap_mux_init_signal("dss_data5.dss_data5", mux_mode); | |
659 | cm_t3x_common_dss_mux_init(mux_mode); | |
c3146974 IG |
660 | } |
661 | ||
662 | static void __init cm_t3730_init_mux(void) | |
663 | { | |
b2404f42 IG |
664 | int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT; |
665 | ||
666 | omap_mux_init_signal("sys_boot0", mux_mode); | |
667 | omap_mux_init_signal("sys_boot1", mux_mode); | |
668 | omap_mux_init_signal("sys_boot3", mux_mode); | |
669 | omap_mux_init_signal("sys_boot4", mux_mode); | |
670 | omap_mux_init_signal("sys_boot5", mux_mode); | |
671 | omap_mux_init_signal("sys_boot6", mux_mode); | |
672 | cm_t3x_common_dss_mux_init(mux_mode); | |
c3146974 IG |
673 | } |
674 | #else | |
675 | static inline void cm_t35_init_mux(void) {} | |
676 | static inline void cm_t3730_init_mux(void) {} | |
c7ecea24 | 677 | #endif |
ca5742bd | 678 | |
c3146974 | 679 | static void __init cm_t3x_common_init(void) |
2886d128 | 680 | { |
ca5742bd | 681 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); |
2886d128 | 682 | omap_serial_init(); |
a4ca9dbe TL |
683 | omap_sdrc_init(mt46h32m32lf6_sdrc_params, |
684 | mt46h32m32lf6_sdrc_params); | |
3b972bf0 | 685 | omap_hsmmc_init(mmc); |
2886d128 | 686 | cm_t35_init_i2c(); |
96974a24 | 687 | omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); |
2886d128 MR |
688 | cm_t35_init_ethernet(); |
689 | cm_t35_init_led(); | |
7f049ad1 | 690 | cm_t35_init_display(); |
40234bf7 | 691 | omap_twl4030_audio_init("cm-t3x", NULL); |
2886d128 | 692 | |
51482be9 | 693 | usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); |
9e18630b | 694 | usb_musb_init(NULL); |
039401f3 | 695 | cm_t35_init_usbh(); |
d396be47 | 696 | cm_t35_init_camera(); |
2886d128 MR |
697 | } |
698 | ||
c3146974 IG |
699 | static void __init cm_t35_init(void) |
700 | { | |
701 | cm_t3x_common_init(); | |
702 | cm_t35_init_mux(); | |
703 | cm_t35_init_nand(); | |
704 | } | |
705 | ||
706 | static void __init cm_t3730_init(void) | |
707 | { | |
708 | cm_t3x_common_init(); | |
709 | cm_t3730_init_mux(); | |
710 | } | |
711 | ||
2886d128 | 712 | MACHINE_START(CM_T35, "Compulab CM-T35") |
5e52b435 | 713 | .atag_offset = 0x100, |
71ee7dad | 714 | .reserve = omap_reserve, |
3dc3bad6 | 715 | .map_io = omap3_map_io, |
8f5b5a41 | 716 | .init_early = omap35xx_init_early, |
741e3a89 | 717 | .init_irq = omap3_init_irq, |
6b2f55d7 | 718 | .handle_irq = omap3_intc_handle_irq, |
2886d128 | 719 | .init_machine = cm_t35_init, |
bbd707ac | 720 | .init_late = omap35xx_init_late, |
6bb27d73 | 721 | .init_time = omap3_sync32k_timer_init, |
187e3e06 | 722 | .restart = omap3xxx_restart, |
2886d128 | 723 | MACHINE_END |
c3146974 IG |
724 | |
725 | MACHINE_START(CM_T3730, "Compulab CM-T3730") | |
187e3e06 PW |
726 | .atag_offset = 0x100, |
727 | .reserve = omap_reserve, | |
728 | .map_io = omap3_map_io, | |
729 | .init_early = omap3630_init_early, | |
730 | .init_irq = omap3_init_irq, | |
6b2f55d7 | 731 | .handle_irq = omap3_intc_handle_irq, |
187e3e06 | 732 | .init_machine = cm_t3730_init, |
bbd707ac | 733 | .init_late = omap3630_init_late, |
6bb27d73 | 734 | .init_time = omap3_sync32k_timer_init, |
187e3e06 | 735 | .restart = omap3xxx_restart, |
c3146974 | 736 | MACHINE_END |