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OMAPDSS: TFP410: rename dvi -> tfp410
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
CommitLineData
2886d128 1/*
c3146974 2 * CompuLab CM-T35/CM-T3730 modules support
2886d128 3 *
d12c2e28
IG		 4 * Copyright (C) 2009-2011 CompuLab, Ltd.
5 * Authors: Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
2886d128
MR		 7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
2886d128
MR		 17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/input.h>
23#include <linux/input/matrix_keypad.h>
24#include <linux/delay.h>
25#include <linux/gpio.h>
26
27#include <linux/i2c/at24.h>
ebeb53e1 28#include <linux/i2c/twl.h>
5b3689f4 29#include <linux/regulator/fixed.h>
2886d128 30#include <linux/regulator/machine.h>
3a63833e 31#include <linux/mmc/host.h>
2886d128 32
7f049ad1
MR		 33#include <linux/spi/spi.h>
34#include <linux/spi/tdo24m.h>
35
2886d128
MR		 36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39
40#include <plat/board.h>
4e65331c 41#include "common.h"
2886d128
MR		 42#include <plat/nand.h>
43#include <plat/gpmc.h>
44#include <plat/usb.h>
a0b38cc4 45#include <video/omapdss.h>
f8ae2f08 46#include <video/omap-panel-generic-dpi.h>
1d7a8654 47#include <video/omap-panel-dvi.h>
609c9ba2 48#include <plat/mcspi.h>
2886d128
MR		 49
50#include <mach/hardware.h>
51
ca5742bd 52#include "mux.h"
2886d128 53#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 54#include "hsmmc.h"
96974a24 55#include "common-board-devices.h"
2886d128 56
039401f3
IG		 57#define CM_T35_GPIO_PENDOWN 57
58#define SB_T35_USB_HUB_RESET_GPIO 167
2886d128
MR		 59
60#define CM_T35_SMSC911X_CS 5
61#define CM_T35_SMSC911X_GPIO 163
62#define SB_T35_SMSC911X_CS 4
63#define SB_T35_SMSC911X_GPIO 65
64
2886d128
MR		 65#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
66#include <linux/smsc911x.h>
21b42731 67#include <plat/gpmc-smsc911x.h>
2886d128 68
21b42731 69static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
2886d128 70 .id = 0,
21b42731
MR		 71 .cs = CM_T35_SMSC911X_CS,
72 .gpio_irq = CM_T35_SMSC911X_GPIO,
73 .gpio_reset = -EINVAL,
74 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 75};
76
21b42731 77static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
2886d128 78 .id = 1,
21b42731
MR		 79 .cs = SB_T35_SMSC911X_CS,
80 .gpio_irq = SB_T35_SMSC911X_GPIO,
81 .gpio_reset = -EINVAL,
82 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 83};
84
5b3689f4
RD		 85static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
86 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
87 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
88};
89
90static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
91 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
92 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
93};
94
2886d128
MR		 95static void __init cm_t35_init_ethernet(void)
96{
5b3689f4
RD		 97 regulator_register_fixed(0, cm_t35_smsc911x_supplies,
98 ARRAY_SIZE(cm_t35_smsc911x_supplies));
99 regulator_register_fixed(1, sb_t35_smsc911x_supplies,
100 ARRAY_SIZE(sb_t35_smsc911x_supplies));
101
21b42731
MR		 102 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
103 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
2886d128
MR		 104}
105#else
106static inline void __init cm_t35_init_ethernet(void) { return; }
107#endif
108
109#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
110#include <linux/leds.h>
111
112static struct gpio_led cm_t35_leds[] = {
113 [0] = {
114 .gpio = 186,
115 .name = "cm-t35:green",
116 .default_trigger = "heartbeat",
117 .active_low = 0,
118 },
119};
120
121static struct gpio_led_platform_data cm_t35_led_pdata = {
122 .num_leds = ARRAY_SIZE(cm_t35_leds),
123 .leds = cm_t35_leds,
124};
125
126static struct platform_device cm_t35_led_device = {
127 .name = "leds-gpio",
128 .id = -1,
129 .dev = {
130 .platform_data = &cm_t35_led_pdata,
131 },
132};
133
134static void __init cm_t35_init_led(void)
135{
136 platform_device_register(&cm_t35_led_device);
137}
138#else
139static inline void cm_t35_init_led(void) {}
140#endif
141
142#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
143#include <linux/mtd/mtd.h>
144#include <linux/mtd/nand.h>
145#include <linux/mtd/partitions.h>
146
147static struct mtd_partition cm_t35_nand_partitions[] = {
148 {
149 .name = "xloader",
150 .offset = 0, /* Offset = 0x00000 */
151 .size = 4 * NAND_BLOCK_SIZE,
152 .mask_flags = MTD_WRITEABLE
153 },
154 {
155 .name = "uboot",
156 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
157 .size = 15 * NAND_BLOCK_SIZE,
158 },
159 {
160 .name = "uboot environment",
161 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
162 .size = 2 * NAND_BLOCK_SIZE,
163 },
164 {
165 .name = "linux",
d12c2e28 166 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
2886d128
MR		 167 .size = 32 * NAND_BLOCK_SIZE,
168 },
169 {
170 .name = "rootfs",
d12c2e28 171 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
2886d128
MR		 172 .size = MTDPART_SIZ_FULL,
173 },
174};
175
176static struct omap_nand_platform_data cm_t35_nand_data = {
177 .parts = cm_t35_nand_partitions,
178 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
2886d128 179 .cs = 0,
2886d128
MR		 180};
181
2886d128
MR		 182static void __init cm_t35_init_nand(void)
183{
f450d867 184 if (gpmc_nand_init(&cm_t35_nand_data) < 0)
2886d128
MR		 185 pr_err("CM-T35: Unable to register NAND device\n");
186}
187#else
188static inline void cm_t35_init_nand(void) {}
189#endif
190
7f049ad1
MR		 191#define CM_T35_LCD_EN_GPIO 157
192#define CM_T35_LCD_BL_GPIO 58
193#define CM_T35_DVI_EN_GPIO 54
194
7f049ad1
MR		 195static int lcd_enabled;
196static int dvi_enabled;
197
198static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
199{
200 if (dvi_enabled) {
201 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
202 return -EINVAL;
203 }
204
bc593f5d
IG		 205 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
206 gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
7f049ad1
MR		 207
208 lcd_enabled = 1;
209
210 return 0;
211}
212
213static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
214{
215 lcd_enabled = 0;
216
bc593f5d
IG		 217 gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
218 gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
7f049ad1
MR		 219}
220
7f049ad1
MR		 221static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
222{
223 return 0;
224}
225
226static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
227{
228}
229
89747c91
BW		 230static struct panel_generic_dpi_data lcd_panel = {
231 .name = "toppoly_tdo35s",
232 .platform_enable = cm_t35_panel_enable_lcd,
233 .platform_disable = cm_t35_panel_disable_lcd,
234};
235
7f049ad1
MR		 236static struct omap_dss_device cm_t35_lcd_device = {
237 .name = "lcd",
7f049ad1 238 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 239 .driver_name = "generic_dpi_panel",
240 .data = &lcd_panel,
7f049ad1 241 .phy.dpi.data_lines = 18,
89747c91
BW		 242};
243
2e6f2ee7 244static struct tfp410_platform_data dvi_panel = {
e813a55e 245 .power_down_gpio = CM_T35_DVI_EN_GPIO,
7f049ad1
MR		 246};
247
248static struct omap_dss_device cm_t35_dvi_device = {
249 .name = "dvi",
7f049ad1 250 .type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7 251 .driver_name = "tfp410",
89747c91 252 .data = &dvi_panel,
7f049ad1 253 .phy.dpi.data_lines = 24,
7f049ad1
MR		 254};
255
256static struct omap_dss_device cm_t35_tv_device = {
257 .name = "tv",
258 .driver_name = "venc",
259 .type = OMAP_DISPLAY_TYPE_VENC,
260 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
261 .platform_enable = cm_t35_panel_enable_tv,
262 .platform_disable = cm_t35_panel_disable_tv,
263};
264
265static struct omap_dss_device *cm_t35_dss_devices[] = {
266 &cm_t35_lcd_device,
267 &cm_t35_dvi_device,
268 &cm_t35_tv_device,
269};
270
271static struct omap_dss_board_info cm_t35_dss_data = {
272 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
273 .devices = cm_t35_dss_devices,
274 .default_device = &cm_t35_dvi_device,
275};
276
7f049ad1
MR		 277static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
278 .turbo_mode = 0,
7f049ad1
MR		 279};
280
281static struct tdo24m_platform_data tdo24m_config = {
282 .model = TDO35S,
283};
284
285static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
286 {
287 .modalias = "tdo24m",
288 .bus_num = 4,
289 .chip_select = 0,
290 .max_speed_hz = 1000000,
291 .controller_data = &tdo24m_mcspi_config,
292 .platform_data = &tdo24m_config,
293 },
294};
295
bc593f5d
IG		 296static struct gpio cm_t35_dss_gpios[] __initdata = {
297 { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
298 { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
bc593f5d
IG		 299};
300
7f049ad1
MR		 301static void __init cm_t35_init_display(void)
302{
303 int err;
304
7f049ad1
MR		 305 spi_register_board_info(cm_t35_lcd_spi_board_info,
306 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
307
bc593f5d
IG		 308 err = gpio_request_array(cm_t35_dss_gpios,
309 ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 310 if (err) {
bc593f5d
IG		 311 pr_err("CM-T35: failed to request DSS control GPIOs\n");
312 return;
7f049ad1
MR		 313 }
314
bc593f5d
IG		 315 gpio_export(CM_T35_LCD_EN_GPIO, 0);
316 gpio_export(CM_T35_LCD_BL_GPIO, 0);
7f049ad1
MR		 317
318 msleep(50);
bc593f5d 319 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
7f049ad1 320
d5e13227 321 err = omap_display_init(&cm_t35_dss_data);
7f049ad1
MR		 322 if (err) {
323 pr_err("CM-T35: failed to register DSS device\n");
bc593f5d 324 gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 325 }
7f049ad1
MR		 326}
327
786b01a8
OD		 328static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
329 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
2886d128
MR		 330};
331
786b01a8
OD		 332static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
333 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
2886d128
MR		 334};
335
b74f149c
IG		 336static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
337 REGULATOR_SUPPLY("vcc", "spi1.0"),
cd1c683c
IG		 338 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
339 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
b74f149c
IG		 340};
341
2886d128
MR		 342/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
343static struct regulator_init_data cm_t35_vmmc1 = {
344 .constraints = {
345 .min_uV = 1850000,
346 .max_uV = 3150000,
347 .valid_modes_mask = REGULATOR_MODE_NORMAL
348 | REGULATOR_MODE_STANDBY,
349 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
350 | REGULATOR_CHANGE_MODE
351 | REGULATOR_CHANGE_STATUS,
352 },
786b01a8
OD		 353 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
354 .consumer_supplies = cm_t35_vmmc1_supply,
2886d128
MR		 355};
356
357/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
358static struct regulator_init_data cm_t35_vsim = {
359 .constraints = {
360 .min_uV = 1800000,
361 .max_uV = 3000000,
362 .valid_modes_mask = REGULATOR_MODE_NORMAL
363 | REGULATOR_MODE_STANDBY,
364 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
365 | REGULATOR_CHANGE_MODE
366 | REGULATOR_CHANGE_STATUS,
367 },
786b01a8
OD		 368 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
369 .consumer_supplies = cm_t35_vsim_supply,
2886d128
MR		 370};
371
b74f149c
IG		 372static struct regulator_init_data cm_t35_vio = {
373 .constraints = {
374 .min_uV = 1800000,
375 .max_uV = 1800000,
376 .apply_uV = true,
377 .valid_modes_mask = REGULATOR_MODE_NORMAL
378 | REGULATOR_MODE_STANDBY,
379 .valid_ops_mask = REGULATOR_CHANGE_MODE,
380 },
381 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
382 .consumer_supplies = cm_t35_vio_supplies,
383};
384
bead4375 385static uint32_t cm_t35_keymap[] = {
2886d128
MR		 386 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
387 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
388 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
389};
390
391static struct matrix_keymap_data cm_t35_keymap_data = {
392 .keymap = cm_t35_keymap,
393 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
394};
395
396static struct twl4030_keypad_data cm_t35_kp_data = {
397 .keymap_data = &cm_t35_keymap_data,
398 .rows = 3,
399 .cols = 3,
400 .rep = 1,
401};
402
68ff0423 403static struct omap2_hsmmc_info mmc[] = {
2886d128
MR		 404 {
405 .mmc = 1,
3a63833e 406 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 407 .gpio_cd = -EINVAL,
408 .gpio_wp = -EINVAL,
3b972bf0 409 .deferred = true,
2886d128
MR		 410 },
411 {
412 .mmc = 2,
3a63833e 413 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 414 .transceiver = 1,
415 .gpio_cd = -EINVAL,
416 .gpio_wp = -EINVAL,
417 .ocr_mask = 0x00100000, /* 3.3V */
418 },
419 {} /* Terminator */
420};
421
181b250c
KM		 422static struct usbhs_omap_board_data usbhs_bdata __initdata = {
423 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
424 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
425 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
2886d128
MR		 426
427 .phy_reset = true,
1a6b5923
BW		 428 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
429 .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
2886d128
MR		 430 .reset_gpio_port[2] = -EINVAL
431};
432
36863964 433static void __init cm_t35_init_usbh(void)
039401f3
IG		 434{
435 int err;
436
437 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
438 GPIOF_OUT_INIT_LOW, "usb hub rst");
439 if (err) {
440 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
441 } else {
442 udelay(10);
443 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
444 msleep(1);
445 }
446
447 usbhs_init(&usbhs_bdata);
448}
449
2886d128
MR		 450static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
451 unsigned ngpio)
452{
453 int wlan_rst = gpio + 2;
454
bc593f5d 455 if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
2886d128 456 gpio_export(wlan_rst, 0);
2886d128 457 udelay(10);
be741de1 458 gpio_set_value_cansleep(wlan_rst, 0);
2886d128 459 udelay(10);
be741de1 460 gpio_set_value_cansleep(wlan_rst, 1);
2886d128
MR		 461 } else {
462 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
463 }
464
465 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
466 mmc[0].gpio_cd = gpio + 0;
3b972bf0 467 omap_hsmmc_late_init(mmc);
2886d128 468
2886d128
MR		 469 return 0;
470}
471
472static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
473 .gpio_base = OMAP_MAX_GPIO_LINES,
474 .irq_base = TWL4030_GPIO_IRQ_BASE,
475 .irq_end = TWL4030_GPIO_IRQ_END,
476 .setup = cm_t35_twl_gpio_setup,
477};
478
479static struct twl4030_platform_data cm_t35_twldata = {
2886d128
MR		 480 /* platform_data for children goes here */
481 .keypad = &cm_t35_kp_data,
2886d128
MR		 482 .gpio = &cm_t35_gpio_data,
483 .vmmc1 = &cm_t35_vmmc1,
484 .vsim = &cm_t35_vsim,
b74f149c 485 .vio = &cm_t35_vio,
2886d128
MR		 486};
487
2886d128
MR		 488static void __init cm_t35_init_i2c(void)
489{
b252b0ef 490 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
19ce6439
IG		 491 TWL_COMMON_REGULATOR_VDAC |
492 TWL_COMMON_PDATA_AUDIO);
b252b0ef 493
fbd8071c 494 omap3_pmic_init("tps65930", &cm_t35_twldata);
2886d128
MR		 495}
496
c7ecea24 497#ifdef CONFIG_OMAP_MUX
ca5742bd 498static struct omap_board_mux board_mux[] __initdata = {
edc961a2
MR		 499 /* nCS and IRQ for CM-T35 ethernet */
500 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
501 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
502
503 /* nCS and IRQ for SB-T35 ethernet */
504 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
505 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
506
507 /* PENDOWN GPIO */
508 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
509
510 /* mUSB */
511 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
512 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
513 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
514 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
515 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
516 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
517 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
518 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
519 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
520 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
521 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
522 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
523
524 /* MMC 2 */
525 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
526 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
527 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
528 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
529
530 /* McSPI 1 */
531 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
532 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
533 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
534 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
535
536 /* McSPI 4 */
537 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
538 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
539 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
540 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
541
542 /* McBSP 2 */
543 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
544 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
545 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
546 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
547
548 /* serial ports */
549 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
550 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
551 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
552 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
553
c3146974 554 /* common DSS */
edc961a2
MR		 555 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
556 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
557 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
558 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2
MR		 559 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
560 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
561 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
562 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
563 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
564 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
565 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
566 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
567 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
568 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
569 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
570 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2 571
7f049ad1
MR		 572 /* display controls */
573 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
574 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
575 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
576
edc961a2
MR		 577 /* TPS IRQ */
578 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
579 OMAP_PIN_INPUT_PULLUP),
580
ca5742bd
TL		 581 { .reg_offset = OMAP_MUX_TERMINATOR },
582};
c3146974
IG		 583
584static void __init cm_t3x_common_dss_mux_init(int mux_mode)
585{
586 omap_mux_init_signal("dss_data18", mux_mode);
587 omap_mux_init_signal("dss_data19", mux_mode);
588 omap_mux_init_signal("dss_data20", mux_mode);
589 omap_mux_init_signal("dss_data21", mux_mode);
590 omap_mux_init_signal("dss_data22", mux_mode);
591 omap_mux_init_signal("dss_data23", mux_mode);
592}
593
594static void __init cm_t35_init_mux(void)
595{
b2404f42
IG		 596 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
597
598 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
599 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
600 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
601 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
602 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
603 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
604 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 605}
606
607static void __init cm_t3730_init_mux(void)
608{
b2404f42
IG		 609 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
610
611 omap_mux_init_signal("sys_boot0", mux_mode);
612 omap_mux_init_signal("sys_boot1", mux_mode);
613 omap_mux_init_signal("sys_boot3", mux_mode);
614 omap_mux_init_signal("sys_boot4", mux_mode);
615 omap_mux_init_signal("sys_boot5", mux_mode);
616 omap_mux_init_signal("sys_boot6", mux_mode);
617 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 618}
619#else
620static inline void cm_t35_init_mux(void) {}
621static inline void cm_t3730_init_mux(void) {}
c7ecea24 622#endif
ca5742bd 623
e41cccfe
TL		 624static struct omap_board_config_kernel cm_t35_config[] __initdata = {
625};
626
c3146974 627static void __init cm_t3x_common_init(void)
2886d128 628{
e41cccfe
TL		 629 omap_board_config = cm_t35_config;
630 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
ca5742bd 631 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
2886d128 632 omap_serial_init();
a4ca9dbe
TL		 633 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
634 mt46h32m32lf6_sdrc_params);
3b972bf0 635 omap_hsmmc_init(mmc);
2886d128 636 cm_t35_init_i2c();
96974a24 637 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
2886d128
MR		 638 cm_t35_init_ethernet();
639 cm_t35_init_led();
7f049ad1 640 cm_t35_init_display();
2886d128 641
9e18630b 642 usb_musb_init(NULL);
039401f3 643 cm_t35_init_usbh();
2886d128
MR		 644}
645
c3146974
IG		 646static void __init cm_t35_init(void)
647{
648 cm_t3x_common_init();
649 cm_t35_init_mux();
650 cm_t35_init_nand();
651}
652
653static void __init cm_t3730_init(void)
654{
655 cm_t3x_common_init();
656 cm_t3730_init_mux();
657}
658
2886d128 659MACHINE_START(CM_T35, "Compulab CM-T35")
5e52b435 660 .atag_offset = 0x100,
71ee7dad 661 .reserve = omap_reserve,
3dc3bad6 662 .map_io = omap3_map_io,
8f5b5a41 663 .init_early = omap35xx_init_early,
741e3a89 664 .init_irq = omap3_init_irq,
6b2f55d7 665 .handle_irq = omap3_intc_handle_irq,
2886d128 666 .init_machine = cm_t35_init,
e74984e4 667 .timer = &omap3_timer,
baa95883 668 .restart = omap_prcm_restart,
2886d128 669MACHINE_END
c3146974
IG		 670
671MACHINE_START(CM_T3730, "Compulab CM-T3730")
5e52b435 672 .atag_offset = 0x100,
c3146974
IG		 673 .reserve = omap_reserve,
674 .map_io = omap3_map_io,
8f5b5a41 675 .init_early = omap3630_init_early,
c3146974 676 .init_irq = omap3_init_irq,
6b2f55d7 677 .handle_irq = omap3_intc_handle_irq,
c3146974
IG		 678 .init_machine = cm_t3730_init,
679 .timer = &omap3_timer,
baa95883 680 .restart = omap_prcm_restart,
c3146974 681MACHINE_END
Linux kernel - Deliverables
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