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ARM: omap1: use machine specific hook for late init
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
CommitLineData
2886d128 1/*
c3146974 2 * CompuLab CM-T35/CM-T3730 modules support
2886d128 3 *
d12c2e28
IG		 4 * Copyright (C) 2009-2011 CompuLab, Ltd.
5 * Authors: Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
2886d128
MR		 7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
2886d128
MR		 17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/input.h>
23#include <linux/input/matrix_keypad.h>
24#include <linux/delay.h>
25#include <linux/gpio.h>
26
27#include <linux/i2c/at24.h>
ebeb53e1 28#include <linux/i2c/twl.h>
5b3689f4 29#include <linux/regulator/fixed.h>
2886d128 30#include <linux/regulator/machine.h>
3a63833e 31#include <linux/mmc/host.h>
2886d128 32
7f049ad1
MR		 33#include <linux/spi/spi.h>
34#include <linux/spi/tdo24m.h>
35
2886d128
MR		 36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39
40#include <plat/board.h>
4e65331c 41#include "common.h"
2886d128
MR		 42#include <plat/nand.h>
43#include <plat/gpmc.h>
44#include <plat/usb.h>
a0b38cc4 45#include <video/omapdss.h>
f8ae2f08 46#include <video/omap-panel-generic-dpi.h>
1d7a8654 47#include <video/omap-panel-dvi.h>
609c9ba2 48#include <plat/mcspi.h>
2886d128
MR		 49
50#include <mach/hardware.h>
51
ca5742bd 52#include "mux.h"
2886d128 53#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 54#include "hsmmc.h"
96974a24 55#include "common-board-devices.h"
2886d128 56
039401f3
IG		 57#define CM_T35_GPIO_PENDOWN 57
58#define SB_T35_USB_HUB_RESET_GPIO 167
2886d128
MR		 59
60#define CM_T35_SMSC911X_CS 5
61#define CM_T35_SMSC911X_GPIO 163
62#define SB_T35_SMSC911X_CS 4
63#define SB_T35_SMSC911X_GPIO 65
64
2886d128
MR		 65#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
66#include <linux/smsc911x.h>
21b42731 67#include <plat/gpmc-smsc911x.h>
2886d128 68
21b42731 69static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
2886d128 70 .id = 0,
21b42731
MR		 71 .cs = CM_T35_SMSC911X_CS,
72 .gpio_irq = CM_T35_SMSC911X_GPIO,
73 .gpio_reset = -EINVAL,
74 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 75};
76
21b42731 77static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
2886d128 78 .id = 1,
21b42731
MR		 79 .cs = SB_T35_SMSC911X_CS,
80 .gpio_irq = SB_T35_SMSC911X_GPIO,
81 .gpio_reset = -EINVAL,
82 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 83};
84
5b3689f4
RD		 85static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
86 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
87 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
88};
89
90static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
91 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
92 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
93};
94
2886d128
MR		 95static void __init cm_t35_init_ethernet(void)
96{
5b3689f4
RD		 97 regulator_register_fixed(0, cm_t35_smsc911x_supplies,
98 ARRAY_SIZE(cm_t35_smsc911x_supplies));
99 regulator_register_fixed(1, sb_t35_smsc911x_supplies,
100 ARRAY_SIZE(sb_t35_smsc911x_supplies));
101
21b42731
MR		 102 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
103 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
2886d128
MR		 104}
105#else
106static inline void __init cm_t35_init_ethernet(void) { return; }
107#endif
108
109#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
110#include <linux/leds.h>
111
112static struct gpio_led cm_t35_leds[] = {
113 [0] = {
114 .gpio = 186,
115 .name = "cm-t35:green",
116 .default_trigger = "heartbeat",
117 .active_low = 0,
118 },
119};
120
121static struct gpio_led_platform_data cm_t35_led_pdata = {
122 .num_leds = ARRAY_SIZE(cm_t35_leds),
123 .leds = cm_t35_leds,
124};
125
126static struct platform_device cm_t35_led_device = {
127 .name = "leds-gpio",
128 .id = -1,
129 .dev = {
130 .platform_data = &cm_t35_led_pdata,
131 },
132};
133
134static void __init cm_t35_init_led(void)
135{
136 platform_device_register(&cm_t35_led_device);
137}
138#else
139static inline void cm_t35_init_led(void) {}
140#endif
141
142#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
143#include <linux/mtd/mtd.h>
144#include <linux/mtd/nand.h>
145#include <linux/mtd/partitions.h>
146
147static struct mtd_partition cm_t35_nand_partitions[] = {
148 {
149 .name = "xloader",
150 .offset = 0, /* Offset = 0x00000 */
151 .size = 4 * NAND_BLOCK_SIZE,
152 .mask_flags = MTD_WRITEABLE
153 },
154 {
155 .name = "uboot",
156 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
157 .size = 15 * NAND_BLOCK_SIZE,
158 },
159 {
160 .name = "uboot environment",
161 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
162 .size = 2 * NAND_BLOCK_SIZE,
163 },
164 {
165 .name = "linux",
d12c2e28 166 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
2886d128
MR		 167 .size = 32 * NAND_BLOCK_SIZE,
168 },
169 {
170 .name = "rootfs",
d12c2e28 171 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
2886d128
MR		 172 .size = MTDPART_SIZ_FULL,
173 },
174};
175
176static struct omap_nand_platform_data cm_t35_nand_data = {
177 .parts = cm_t35_nand_partitions,
178 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
2886d128 179 .cs = 0,
2886d128
MR		 180};
181
2886d128
MR		 182static void __init cm_t35_init_nand(void)
183{
f450d867 184 if (gpmc_nand_init(&cm_t35_nand_data) < 0)
2886d128
MR		 185 pr_err("CM-T35: Unable to register NAND device\n");
186}
187#else
188static inline void cm_t35_init_nand(void) {}
189#endif
190
7f049ad1
MR		 191#define CM_T35_LCD_EN_GPIO 157
192#define CM_T35_LCD_BL_GPIO 58
193#define CM_T35_DVI_EN_GPIO 54
194
7f049ad1
MR		 195static int lcd_enabled;
196static int dvi_enabled;
197
198static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
199{
200 if (dvi_enabled) {
201 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
202 return -EINVAL;
203 }
204
bc593f5d
IG		 205 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
206 gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
7f049ad1
MR		 207
208 lcd_enabled = 1;
209
210 return 0;
211}
212
213static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
214{
215 lcd_enabled = 0;
216
bc593f5d
IG		 217 gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
218 gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
7f049ad1
MR		 219}
220
221static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
222{
223 if (lcd_enabled) {
224 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
225 return -EINVAL;
226 }
227
bc593f5d 228 gpio_set_value(CM_T35_DVI_EN_GPIO, 0);
7f049ad1
MR		 229 dvi_enabled = 1;
230
231 return 0;
232}
233
234static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
235{
bc593f5d 236 gpio_set_value(CM_T35_DVI_EN_GPIO, 1);
7f049ad1
MR		 237 dvi_enabled = 0;
238}
239
240static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
241{
242 return 0;
243}
244
245static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
246{
247}
248
89747c91
BW		 249static struct panel_generic_dpi_data lcd_panel = {
250 .name = "toppoly_tdo35s",
251 .platform_enable = cm_t35_panel_enable_lcd,
252 .platform_disable = cm_t35_panel_disable_lcd,
253};
254
7f049ad1
MR		 255static struct omap_dss_device cm_t35_lcd_device = {
256 .name = "lcd",
7f049ad1 257 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 258 .driver_name = "generic_dpi_panel",
259 .data = &lcd_panel,
7f049ad1 260 .phy.dpi.data_lines = 18,
89747c91
BW		 261};
262
1d7a8654 263static struct panel_dvi_platform_data dvi_panel = {
89747c91
BW		 264 .platform_enable = cm_t35_panel_enable_dvi,
265 .platform_disable = cm_t35_panel_disable_dvi,
7f049ad1
MR		 266};
267
268static struct omap_dss_device cm_t35_dvi_device = {
269 .name = "dvi",
7f049ad1 270 .type = OMAP_DISPLAY_TYPE_DPI,
1d7a8654 271 .driver_name = "dvi",
89747c91 272 .data = &dvi_panel,
7f049ad1 273 .phy.dpi.data_lines = 24,
7f049ad1
MR		 274};
275
276static struct omap_dss_device cm_t35_tv_device = {
277 .name = "tv",
278 .driver_name = "venc",
279 .type = OMAP_DISPLAY_TYPE_VENC,
280 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
281 .platform_enable = cm_t35_panel_enable_tv,
282 .platform_disable = cm_t35_panel_disable_tv,
283};
284
285static struct omap_dss_device *cm_t35_dss_devices[] = {
286 &cm_t35_lcd_device,
287 &cm_t35_dvi_device,
288 &cm_t35_tv_device,
289};
290
291static struct omap_dss_board_info cm_t35_dss_data = {
292 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
293 .devices = cm_t35_dss_devices,
294 .default_device = &cm_t35_dvi_device,
295};
296
7f049ad1
MR		 297static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
298 .turbo_mode = 0,
7f049ad1
MR		 299};
300
301static struct tdo24m_platform_data tdo24m_config = {
302 .model = TDO35S,
303};
304
305static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
306 {
307 .modalias = "tdo24m",
308 .bus_num = 4,
309 .chip_select = 0,
310 .max_speed_hz = 1000000,
311 .controller_data = &tdo24m_mcspi_config,
312 .platform_data = &tdo24m_config,
313 },
314};
315
bc593f5d
IG		 316static struct gpio cm_t35_dss_gpios[] __initdata = {
317 { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
318 { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
319 { CM_T35_DVI_EN_GPIO, GPIOF_OUT_INIT_HIGH, "dvi enable" },
320};
321
7f049ad1
MR		 322static void __init cm_t35_init_display(void)
323{
324 int err;
325
7f049ad1
MR		 326 spi_register_board_info(cm_t35_lcd_spi_board_info,
327 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
328
bc593f5d
IG		 329 err = gpio_request_array(cm_t35_dss_gpios,
330 ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 331 if (err) {
bc593f5d
IG		 332 pr_err("CM-T35: failed to request DSS control GPIOs\n");
333 return;
7f049ad1
MR		 334 }
335
bc593f5d
IG		 336 gpio_export(CM_T35_LCD_EN_GPIO, 0);
337 gpio_export(CM_T35_LCD_BL_GPIO, 0);
338 gpio_export(CM_T35_DVI_EN_GPIO, 0);
7f049ad1
MR		 339
340 msleep(50);
bc593f5d 341 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
7f049ad1 342
d5e13227 343 err = omap_display_init(&cm_t35_dss_data);
7f049ad1
MR		 344 if (err) {
345 pr_err("CM-T35: failed to register DSS device\n");
bc593f5d 346 gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 347 }
7f049ad1
MR		 348}
349
786b01a8
OD		 350static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
351 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
2886d128
MR		 352};
353
786b01a8
OD		 354static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
355 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
2886d128
MR		 356};
357
b74f149c
IG		 358static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
359 REGULATOR_SUPPLY("vcc", "spi1.0"),
cd1c683c
IG		 360 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
361 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
b74f149c
IG		 362};
363
2886d128
MR		 364/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
365static struct regulator_init_data cm_t35_vmmc1 = {
366 .constraints = {
367 .min_uV = 1850000,
368 .max_uV = 3150000,
369 .valid_modes_mask = REGULATOR_MODE_NORMAL
370 | REGULATOR_MODE_STANDBY,
371 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
372 | REGULATOR_CHANGE_MODE
373 | REGULATOR_CHANGE_STATUS,
374 },
786b01a8
OD		 375 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
376 .consumer_supplies = cm_t35_vmmc1_supply,
2886d128
MR		 377};
378
379/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
380static struct regulator_init_data cm_t35_vsim = {
381 .constraints = {
382 .min_uV = 1800000,
383 .max_uV = 3000000,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
387 | REGULATOR_CHANGE_MODE
388 | REGULATOR_CHANGE_STATUS,
389 },
786b01a8
OD		 390 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
391 .consumer_supplies = cm_t35_vsim_supply,
2886d128
MR		 392};
393
b74f149c
IG		 394static struct regulator_init_data cm_t35_vio = {
395 .constraints = {
396 .min_uV = 1800000,
397 .max_uV = 1800000,
398 .apply_uV = true,
399 .valid_modes_mask = REGULATOR_MODE_NORMAL
400 | REGULATOR_MODE_STANDBY,
401 .valid_ops_mask = REGULATOR_CHANGE_MODE,
402 },
403 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
404 .consumer_supplies = cm_t35_vio_supplies,
405};
406
bead4375 407static uint32_t cm_t35_keymap[] = {
2886d128
MR		 408 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
409 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
410 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
411};
412
413static struct matrix_keymap_data cm_t35_keymap_data = {
414 .keymap = cm_t35_keymap,
415 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
416};
417
418static struct twl4030_keypad_data cm_t35_kp_data = {
419 .keymap_data = &cm_t35_keymap_data,
420 .rows = 3,
421 .cols = 3,
422 .rep = 1,
423};
424
68ff0423 425static struct omap2_hsmmc_info mmc[] = {
2886d128
MR		 426 {
427 .mmc = 1,
3a63833e 428 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 429 .gpio_cd = -EINVAL,
430 .gpio_wp = -EINVAL,
3b972bf0 431 .deferred = true,
2886d128
MR		 432 },
433 {
434 .mmc = 2,
3a63833e 435 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 436 .transceiver = 1,
437 .gpio_cd = -EINVAL,
438 .gpio_wp = -EINVAL,
439 .ocr_mask = 0x00100000, /* 3.3V */
440 },
441 {} /* Terminator */
442};
443
181b250c
KM		 444static struct usbhs_omap_board_data usbhs_bdata __initdata = {
445 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
446 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
447 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
2886d128
MR		 448
449 .phy_reset = true,
1a6b5923
BW		 450 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
451 .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
2886d128
MR		 452 .reset_gpio_port[2] = -EINVAL
453};
454
36863964 455static void __init cm_t35_init_usbh(void)
039401f3
IG		 456{
457 int err;
458
459 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
460 GPIOF_OUT_INIT_LOW, "usb hub rst");
461 if (err) {
462 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
463 } else {
464 udelay(10);
465 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
466 msleep(1);
467 }
468
469 usbhs_init(&usbhs_bdata);
470}
471
2886d128
MR		 472static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
473 unsigned ngpio)
474{
475 int wlan_rst = gpio + 2;
476
bc593f5d 477 if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
2886d128 478 gpio_export(wlan_rst, 0);
2886d128 479 udelay(10);
be741de1 480 gpio_set_value_cansleep(wlan_rst, 0);
2886d128 481 udelay(10);
be741de1 482 gpio_set_value_cansleep(wlan_rst, 1);
2886d128
MR		 483 } else {
484 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
485 }
486
487 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
488 mmc[0].gpio_cd = gpio + 0;
3b972bf0 489 omap_hsmmc_late_init(mmc);
2886d128 490
2886d128
MR		 491 return 0;
492}
493
494static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
495 .gpio_base = OMAP_MAX_GPIO_LINES,
496 .irq_base = TWL4030_GPIO_IRQ_BASE,
497 .irq_end = TWL4030_GPIO_IRQ_END,
498 .setup = cm_t35_twl_gpio_setup,
499};
500
501static struct twl4030_platform_data cm_t35_twldata = {
2886d128
MR		 502 /* platform_data for children goes here */
503 .keypad = &cm_t35_kp_data,
2886d128
MR		 504 .gpio = &cm_t35_gpio_data,
505 .vmmc1 = &cm_t35_vmmc1,
506 .vsim = &cm_t35_vsim,
b74f149c 507 .vio = &cm_t35_vio,
2886d128
MR		 508};
509
2886d128
MR		 510static void __init cm_t35_init_i2c(void)
511{
b252b0ef 512 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
19ce6439
IG		 513 TWL_COMMON_REGULATOR_VDAC |
514 TWL_COMMON_PDATA_AUDIO);
b252b0ef 515
fbd8071c 516 omap3_pmic_init("tps65930", &cm_t35_twldata);
2886d128
MR		 517}
518
c7ecea24 519#ifdef CONFIG_OMAP_MUX
ca5742bd 520static struct omap_board_mux board_mux[] __initdata = {
edc961a2
MR		 521 /* nCS and IRQ for CM-T35 ethernet */
522 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
523 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
524
525 /* nCS and IRQ for SB-T35 ethernet */
526 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
527 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
528
529 /* PENDOWN GPIO */
530 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
531
532 /* mUSB */
533 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
534 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
535 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
536 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
537 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
538 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
539 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
540 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
541 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
542 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
543 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
544 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
545
546 /* MMC 2 */
547 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
548 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
549 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
550 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
551
552 /* McSPI 1 */
553 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
554 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
555 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
556 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
557
558 /* McSPI 4 */
559 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
560 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
561 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
562 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
563
564 /* McBSP 2 */
565 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
566 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
567 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
568 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
569
570 /* serial ports */
571 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
572 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
573 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
574 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
575
c3146974 576 /* common DSS */
edc961a2
MR		 577 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
578 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
579 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
580 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2
MR		 581 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
582 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
583 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
584 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
585 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
586 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
587 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
588 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
589 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
590 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
591 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
592 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2 593
7f049ad1
MR		 594 /* display controls */
595 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
596 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
597 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
598
edc961a2
MR		 599 /* TPS IRQ */
600 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
601 OMAP_PIN_INPUT_PULLUP),
602
ca5742bd
TL		 603 { .reg_offset = OMAP_MUX_TERMINATOR },
604};
c3146974
IG		 605
606static void __init cm_t3x_common_dss_mux_init(int mux_mode)
607{
608 omap_mux_init_signal("dss_data18", mux_mode);
609 omap_mux_init_signal("dss_data19", mux_mode);
610 omap_mux_init_signal("dss_data20", mux_mode);
611 omap_mux_init_signal("dss_data21", mux_mode);
612 omap_mux_init_signal("dss_data22", mux_mode);
613 omap_mux_init_signal("dss_data23", mux_mode);
614}
615
616static void __init cm_t35_init_mux(void)
617{
b2404f42
IG		 618 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
619
620 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
621 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
622 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
623 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
624 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
625 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
626 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 627}
628
629static void __init cm_t3730_init_mux(void)
630{
b2404f42
IG		 631 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
632
633 omap_mux_init_signal("sys_boot0", mux_mode);
634 omap_mux_init_signal("sys_boot1", mux_mode);
635 omap_mux_init_signal("sys_boot3", mux_mode);
636 omap_mux_init_signal("sys_boot4", mux_mode);
637 omap_mux_init_signal("sys_boot5", mux_mode);
638 omap_mux_init_signal("sys_boot6", mux_mode);
639 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 640}
641#else
642static inline void cm_t35_init_mux(void) {}
643static inline void cm_t3730_init_mux(void) {}
c7ecea24 644#endif
ca5742bd 645
e41cccfe
TL		 646static struct omap_board_config_kernel cm_t35_config[] __initdata = {
647};
648
c3146974 649static void __init cm_t3x_common_init(void)
2886d128 650{
e41cccfe
TL		 651 omap_board_config = cm_t35_config;
652 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
ca5742bd 653 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
2886d128 654 omap_serial_init();
a4ca9dbe
TL		 655 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
656 mt46h32m32lf6_sdrc_params);
3b972bf0 657 omap_hsmmc_init(mmc);
2886d128 658 cm_t35_init_i2c();
96974a24 659 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
2886d128
MR		 660 cm_t35_init_ethernet();
661 cm_t35_init_led();
7f049ad1 662 cm_t35_init_display();
2886d128 663
9e18630b 664 usb_musb_init(NULL);
039401f3 665 cm_t35_init_usbh();
2886d128
MR		 666}
667
c3146974
IG		 668static void __init cm_t35_init(void)
669{
670 cm_t3x_common_init();
671 cm_t35_init_mux();
672 cm_t35_init_nand();
673}
674
675static void __init cm_t3730_init(void)
676{
677 cm_t3x_common_init();
678 cm_t3730_init_mux();
679}
680
2886d128 681MACHINE_START(CM_T35, "Compulab CM-T35")
5e52b435 682 .atag_offset = 0x100,
71ee7dad 683 .reserve = omap_reserve,
3dc3bad6 684 .map_io = omap3_map_io,
8f5b5a41 685 .init_early = omap35xx_init_early,
741e3a89 686 .init_irq = omap3_init_irq,
6b2f55d7 687 .handle_irq = omap3_intc_handle_irq,
2886d128 688 .init_machine = cm_t35_init,
e74984e4 689 .timer = &omap3_timer,
baa95883 690 .restart = omap_prcm_restart,
2886d128 691MACHINE_END
c3146974
IG		 692
693MACHINE_START(CM_T3730, "Compulab CM-T3730")
5e52b435 694 .atag_offset = 0x100,
c3146974
IG		 695 .reserve = omap_reserve,
696 .map_io = omap3_map_io,
8f5b5a41 697 .init_early = omap3630_init_early,
c3146974 698 .init_irq = omap3_init_irq,
6b2f55d7 699 .handle_irq = omap3_intc_handle_irq,
c3146974
IG		 700 .init_machine = cm_t3730_init,
701 .timer = &omap3_timer,
baa95883 702 .restart = omap_prcm_restart,
c3146974 703MACHINE_END
Linux kernel - Deliverables
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