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OMAP: DSS2: Add generic DPI panel display driver
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
CommitLineData
2886d128
MR		 1/*
2 * board-cm-t35.c (CompuLab CM-T35 module)
3 *
4 * Copyright (C) 2009 CompuLab, Ltd.
5 * Author: Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/platform_device.h>
26#include <linux/input.h>
27#include <linux/input/matrix_keypad.h>
28#include <linux/delay.h>
29#include <linux/gpio.h>
30
31#include <linux/i2c/at24.h>
ebeb53e1 32#include <linux/i2c/twl.h>
2886d128 33#include <linux/regulator/machine.h>
3a63833e 34#include <linux/mmc/host.h>
2886d128 35
7f049ad1
MR		 36#include <linux/spi/spi.h>
37#include <linux/spi/tdo24m.h>
38
2886d128
MR		 39#include <asm/mach-types.h>
40#include <asm/mach/arch.h>
41#include <asm/mach/map.h>
42
43#include <plat/board.h>
44#include <plat/common.h>
2886d128
MR		 45#include <plat/nand.h>
46#include <plat/gpmc.h>
47#include <plat/usb.h>
7f049ad1 48#include <plat/display.h>
609c9ba2 49#include <plat/mcspi.h>
2886d128
MR		 50
51#include <mach/hardware.h>
52
ca5742bd 53#include "mux.h"
2886d128 54#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 55#include "hsmmc.h"
2886d128
MR		 56
57#define CM_T35_GPIO_PENDOWN 57
58
59#define CM_T35_SMSC911X_CS 5
60#define CM_T35_SMSC911X_GPIO 163
61#define SB_T35_SMSC911X_CS 4
62#define SB_T35_SMSC911X_GPIO 65
63
64#define NAND_BLOCK_SIZE SZ_128K
2886d128
MR		 65
66#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
67#include <linux/smsc911x.h>
68
69static struct smsc911x_platform_config cm_t35_smsc911x_config = {
70 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
71 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
72 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
73 .phy_interface = PHY_INTERFACE_MODE_MII,
74};
75
76static struct resource cm_t35_smsc911x_resources[] = {
77 {
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
82 .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
83 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
84 },
85};
86
87static struct platform_device cm_t35_smsc911x_device = {
88 .name = "smsc911x",
89 .id = 0,
90 .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources),
91 .resource = cm_t35_smsc911x_resources,
92 .dev = {
93 .platform_data = &cm_t35_smsc911x_config,
94 },
95};
96
97static struct resource sb_t35_smsc911x_resources[] = {
98 {
99 .flags = IORESOURCE_MEM,
100 },
101 {
102 .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
103 .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
104 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
105 },
106};
107
108static struct platform_device sb_t35_smsc911x_device = {
109 .name = "smsc911x",
110 .id = 1,
111 .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources),
112 .resource = sb_t35_smsc911x_resources,
113 .dev = {
114 .platform_data = &cm_t35_smsc911x_config,
115 },
116};
117
118static void __init cm_t35_init_smsc911x(struct platform_device *dev,
119 int cs, int irq_gpio)
120{
121 unsigned long cs_mem_base;
122
123 if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) {
124 pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n");
125 return;
126 }
127
128 dev->resource[0].start = cs_mem_base + 0x0;
129 dev->resource[0].end = cs_mem_base + 0xff;
130
131 if ((gpio_request(irq_gpio, "ETH IRQ") == 0) &&
132 (gpio_direction_input(irq_gpio) == 0)) {
133 gpio_export(irq_gpio, 0);
134 } else {
135 pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n");
136 return;
137 }
138
139 platform_device_register(dev);
140}
141
142static void __init cm_t35_init_ethernet(void)
143{
144 cm_t35_init_smsc911x(&cm_t35_smsc911x_device,
145 CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO);
146 cm_t35_init_smsc911x(&sb_t35_smsc911x_device,
147 SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO);
148}
149#else
150static inline void __init cm_t35_init_ethernet(void) { return; }
151#endif
152
153#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
154#include <linux/leds.h>
155
156static struct gpio_led cm_t35_leds[] = {
157 [0] = {
158 .gpio = 186,
159 .name = "cm-t35:green",
160 .default_trigger = "heartbeat",
161 .active_low = 0,
162 },
163};
164
165static struct gpio_led_platform_data cm_t35_led_pdata = {
166 .num_leds = ARRAY_SIZE(cm_t35_leds),
167 .leds = cm_t35_leds,
168};
169
170static struct platform_device cm_t35_led_device = {
171 .name = "leds-gpio",
172 .id = -1,
173 .dev = {
174 .platform_data = &cm_t35_led_pdata,
175 },
176};
177
178static void __init cm_t35_init_led(void)
179{
180 platform_device_register(&cm_t35_led_device);
181}
182#else
183static inline void cm_t35_init_led(void) {}
184#endif
185
186#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
187#include <linux/mtd/mtd.h>
188#include <linux/mtd/nand.h>
189#include <linux/mtd/partitions.h>
190
191static struct mtd_partition cm_t35_nand_partitions[] = {
192 {
193 .name = "xloader",
194 .offset = 0, /* Offset = 0x00000 */
195 .size = 4 * NAND_BLOCK_SIZE,
196 .mask_flags = MTD_WRITEABLE
197 },
198 {
199 .name = "uboot",
200 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
201 .size = 15 * NAND_BLOCK_SIZE,
202 },
203 {
204 .name = "uboot environment",
205 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
206 .size = 2 * NAND_BLOCK_SIZE,
207 },
208 {
209 .name = "linux",
210 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
211 .size = 32 * NAND_BLOCK_SIZE,
212 },
213 {
214 .name = "rootfs",
215 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
216 .size = MTDPART_SIZ_FULL,
217 },
218};
219
220static struct omap_nand_platform_data cm_t35_nand_data = {
221 .parts = cm_t35_nand_partitions,
222 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
223 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
224 .cs = 0,
2886d128
MR		 225
226};
227
2886d128
MR		 228static void __init cm_t35_init_nand(void)
229{
f450d867 230 if (gpmc_nand_init(&cm_t35_nand_data) < 0)
2886d128
MR		 231 pr_err("CM-T35: Unable to register NAND device\n");
232}
233#else
234static inline void cm_t35_init_nand(void) {}
235#endif
236
237#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
238 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
2886d128
MR		 239#include <linux/spi/ads7846.h>
240
2886d128
MR		 241static struct omap2_mcspi_device_config ads7846_mcspi_config = {
242 .turbo_mode = 0,
243 .single_channel = 1, /* 0: slave, 1: master */
244};
245
246static int ads7846_get_pendown_state(void)
247{
248 return !gpio_get_value(CM_T35_GPIO_PENDOWN);
249}
250
251static struct ads7846_platform_data ads7846_config = {
252 .x_max = 0x0fff,
253 .y_max = 0x0fff,
254 .x_plate_ohms = 180,
255 .pressure_max = 255,
256 .debounce_max = 10,
257 .debounce_tol = 3,
258 .debounce_rep = 1,
259 .get_pendown_state = ads7846_get_pendown_state,
260 .keep_vref_on = 1,
261};
262
263static struct spi_board_info cm_t35_spi_board_info[] __initdata = {
264 {
265 .modalias = "ads7846",
266 .bus_num = 1,
267 .chip_select = 0,
268 .max_speed_hz = 1500000,
269 .controller_data = &ads7846_mcspi_config,
270 .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN),
271 .platform_data = &ads7846_config,
272 },
273};
274
275static void __init cm_t35_init_ads7846(void)
276{
277 if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
278 (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) {
279 gpio_export(CM_T35_GPIO_PENDOWN, 0);
280 } else {
281 pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n");
282 return;
283 }
284
285 spi_register_board_info(cm_t35_spi_board_info,
286 ARRAY_SIZE(cm_t35_spi_board_info));
287}
288#else
289static inline void cm_t35_init_ads7846(void) {}
290#endif
291
7f049ad1
MR		 292#define CM_T35_LCD_EN_GPIO 157
293#define CM_T35_LCD_BL_GPIO 58
294#define CM_T35_DVI_EN_GPIO 54
295
296static int lcd_bl_gpio;
297static int lcd_en_gpio;
298static int dvi_en_gpio;
299
300static int lcd_enabled;
301static int dvi_enabled;
302
303static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
304{
305 if (dvi_enabled) {
306 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
307 return -EINVAL;
308 }
309
310 gpio_set_value(lcd_en_gpio, 1);
311 gpio_set_value(lcd_bl_gpio, 1);
312
313 lcd_enabled = 1;
314
315 return 0;
316}
317
318static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
319{
320 lcd_enabled = 0;
321
322 gpio_set_value(lcd_bl_gpio, 0);
323 gpio_set_value(lcd_en_gpio, 0);
324}
325
326static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
327{
328 if (lcd_enabled) {
329 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
330 return -EINVAL;
331 }
332
333 gpio_set_value(dvi_en_gpio, 0);
334 dvi_enabled = 1;
335
336 return 0;
337}
338
339static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
340{
341 gpio_set_value(dvi_en_gpio, 1);
342 dvi_enabled = 0;
343}
344
345static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
346{
347 return 0;
348}
349
350static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
351{
352}
353
354static struct omap_dss_device cm_t35_lcd_device = {
355 .name = "lcd",
356 .driver_name = "toppoly_tdo35s_panel",
357 .type = OMAP_DISPLAY_TYPE_DPI,
358 .phy.dpi.data_lines = 18,
359 .platform_enable = cm_t35_panel_enable_lcd,
360 .platform_disable = cm_t35_panel_disable_lcd,
361};
362
363static struct omap_dss_device cm_t35_dvi_device = {
364 .name = "dvi",
365 .driver_name = "generic_panel",
366 .type = OMAP_DISPLAY_TYPE_DPI,
367 .phy.dpi.data_lines = 24,
368 .platform_enable = cm_t35_panel_enable_dvi,
369 .platform_disable = cm_t35_panel_disable_dvi,
370};
371
372static struct omap_dss_device cm_t35_tv_device = {
373 .name = "tv",
374 .driver_name = "venc",
375 .type = OMAP_DISPLAY_TYPE_VENC,
376 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
377 .platform_enable = cm_t35_panel_enable_tv,
378 .platform_disable = cm_t35_panel_disable_tv,
379};
380
381static struct omap_dss_device *cm_t35_dss_devices[] = {
382 &cm_t35_lcd_device,
383 &cm_t35_dvi_device,
384 &cm_t35_tv_device,
385};
386
387static struct omap_dss_board_info cm_t35_dss_data = {
388 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
389 .devices = cm_t35_dss_devices,
390 .default_device = &cm_t35_dvi_device,
391};
392
393static struct platform_device cm_t35_dss_device = {
394 .name = "omapdss",
395 .id = -1,
396 .dev = {
397 .platform_data = &cm_t35_dss_data,
398 },
399};
400
401static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
402 .turbo_mode = 0,
403 .single_channel = 1, /* 0: slave, 1: master */
404};
405
406static struct tdo24m_platform_data tdo24m_config = {
407 .model = TDO35S,
408};
409
410static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
411 {
412 .modalias = "tdo24m",
413 .bus_num = 4,
414 .chip_select = 0,
415 .max_speed_hz = 1000000,
416 .controller_data = &tdo24m_mcspi_config,
417 .platform_data = &tdo24m_config,
418 },
419};
420
421static void __init cm_t35_init_display(void)
422{
423 int err;
424
425 lcd_en_gpio = CM_T35_LCD_EN_GPIO;
426 lcd_bl_gpio = CM_T35_LCD_BL_GPIO;
427 dvi_en_gpio = CM_T35_DVI_EN_GPIO;
428
429 spi_register_board_info(cm_t35_lcd_spi_board_info,
430 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
431
432 err = gpio_request(lcd_en_gpio, "LCD RST");
433 if (err) {
434 pr_err("CM-T35: failed to get LCD reset GPIO\n");
435 goto out;
436 }
437
438 err = gpio_request(lcd_bl_gpio, "LCD BL");
439 if (err) {
440 pr_err("CM-T35: failed to get LCD backlight control GPIO\n");
441 goto err_lcd_bl;
442 }
443
444 err = gpio_request(dvi_en_gpio, "DVI EN");
445 if (err) {
446 pr_err("CM-T35: failed to get DVI reset GPIO\n");
447 goto err_dvi_en;
448 }
449
450 gpio_export(lcd_en_gpio, 0);
451 gpio_export(lcd_bl_gpio, 0);
452 gpio_export(dvi_en_gpio, 0);
453 gpio_direction_output(lcd_en_gpio, 0);
454 gpio_direction_output(lcd_bl_gpio, 0);
455 gpio_direction_output(dvi_en_gpio, 1);
456
457 msleep(50);
458 gpio_set_value(lcd_en_gpio, 1);
459
460 err = platform_device_register(&cm_t35_dss_device);
461 if (err) {
462 pr_err("CM-T35: failed to register DSS device\n");
463 goto err_dev_reg;
464 }
465
466 return;
467
468err_dev_reg:
469 gpio_free(dvi_en_gpio);
470err_dvi_en:
471 gpio_free(lcd_bl_gpio);
472err_lcd_bl:
473 gpio_free(lcd_en_gpio);
474out:
475
476 return;
477}
478
2886d128
MR		 479static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
480 .supply = "vmmc",
481};
482
483static struct regulator_consumer_supply cm_t35_vsim_supply = {
484 .supply = "vmmc_aux",
485};
486
7f049ad1
MR		 487static struct regulator_consumer_supply cm_t35_vdac_supply = {
488 .supply = "vdda_dac",
489 .dev = &cm_t35_dss_device.dev,
490};
491
492static struct regulator_consumer_supply cm_t35_vdvi_supply = {
493 .supply = "vdvi",
494 .dev = &cm_t35_dss_device.dev,
495};
496
2886d128
MR		 497/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
498static struct regulator_init_data cm_t35_vmmc1 = {
499 .constraints = {
500 .min_uV = 1850000,
501 .max_uV = 3150000,
502 .valid_modes_mask = REGULATOR_MODE_NORMAL
503 | REGULATOR_MODE_STANDBY,
504 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
505 | REGULATOR_CHANGE_MODE
506 | REGULATOR_CHANGE_STATUS,
507 },
508 .num_consumer_supplies = 1,
509 .consumer_supplies = &cm_t35_vmmc1_supply,
510};
511
512/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
513static struct regulator_init_data cm_t35_vsim = {
514 .constraints = {
515 .min_uV = 1800000,
516 .max_uV = 3000000,
517 .valid_modes_mask = REGULATOR_MODE_NORMAL
518 | REGULATOR_MODE_STANDBY,
519 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
520 | REGULATOR_CHANGE_MODE
521 | REGULATOR_CHANGE_STATUS,
522 },
523 .num_consumer_supplies = 1,
524 .consumer_supplies = &cm_t35_vsim_supply,
525};
526
7f049ad1
MR		 527/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
528static struct regulator_init_data cm_t35_vdac = {
529 .constraints = {
530 .min_uV = 1800000,
531 .max_uV = 1800000,
532 .valid_modes_mask = REGULATOR_MODE_NORMAL
533 | REGULATOR_MODE_STANDBY,
534 .valid_ops_mask = REGULATOR_CHANGE_MODE
535 | REGULATOR_CHANGE_STATUS,
536 },
537 .num_consumer_supplies = 1,
538 .consumer_supplies = &cm_t35_vdac_supply,
539};
540
541/* VPLL2 for digital video outputs */
542static struct regulator_init_data cm_t35_vpll2 = {
543 .constraints = {
544 .name = "VDVI",
545 .min_uV = 1800000,
546 .max_uV = 1800000,
547 .valid_modes_mask = REGULATOR_MODE_NORMAL
548 | REGULATOR_MODE_STANDBY,
549 .valid_ops_mask = REGULATOR_CHANGE_MODE
550 | REGULATOR_CHANGE_STATUS,
551 },
552 .num_consumer_supplies = 1,
553 .consumer_supplies = &cm_t35_vdvi_supply,
554};
555
2886d128
MR		 556static struct twl4030_usb_data cm_t35_usb_data = {
557 .usb_mode = T2_USB_MODE_ULPI,
558};
559
bead4375 560static uint32_t cm_t35_keymap[] = {
2886d128
MR		 561 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
562 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
563 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
564};
565
566static struct matrix_keymap_data cm_t35_keymap_data = {
567 .keymap = cm_t35_keymap,
568 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
569};
570
571static struct twl4030_keypad_data cm_t35_kp_data = {
572 .keymap_data = &cm_t35_keymap_data,
573 .rows = 3,
574 .cols = 3,
575 .rep = 1,
576};
577
68ff0423 578static struct omap2_hsmmc_info mmc[] = {
2886d128
MR		 579 {
580 .mmc = 1,
3a63833e 581 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 582 .gpio_cd = -EINVAL,
583 .gpio_wp = -EINVAL,
584
585 },
586 {
587 .mmc = 2,
3a63833e 588 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 589 .transceiver = 1,
590 .gpio_cd = -EINVAL,
591 .gpio_wp = -EINVAL,
592 .ocr_mask = 0x00100000, /* 3.3V */
593 },
594 {} /* Terminator */
595};
596
6f69a181 597static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
2886d128
MR		 598 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
599 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
600 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
601
602 .phy_reset = true,
1a6b5923
BW		 603 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
604 .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
2886d128
MR		 605 .reset_gpio_port[2] = -EINVAL
606};
607
608static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
609 unsigned ngpio)
610{
611 int wlan_rst = gpio + 2;
612
613 if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
614 (gpio_direction_output(wlan_rst, 1) == 0)) {
615 gpio_export(wlan_rst, 0);
616
617 udelay(10);
618 gpio_set_value(wlan_rst, 0);
619 udelay(10);
620 gpio_set_value(wlan_rst, 1);
621 } else {
622 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
623 }
624
625 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
626 mmc[0].gpio_cd = gpio + 0;
68ff0423 627 omap2_hsmmc_init(mmc);
2886d128
MR		 628
629 /* link regulators to MMC adapters */
630 cm_t35_vmmc1_supply.dev = mmc[0].dev;
631 cm_t35_vsim_supply.dev = mmc[0].dev;
632
2886d128
MR		 633 return 0;
634}
635
636static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
637 .gpio_base = OMAP_MAX_GPIO_LINES,
638 .irq_base = TWL4030_GPIO_IRQ_BASE,
639 .irq_end = TWL4030_GPIO_IRQ_END,
640 .setup = cm_t35_twl_gpio_setup,
641};
642
643static struct twl4030_platform_data cm_t35_twldata = {
644 .irq_base = TWL4030_IRQ_BASE,
645 .irq_end = TWL4030_IRQ_END,
646
647 /* platform_data for children goes here */
648 .keypad = &cm_t35_kp_data,
649 .usb = &cm_t35_usb_data,
650 .gpio = &cm_t35_gpio_data,
651 .vmmc1 = &cm_t35_vmmc1,
652 .vsim = &cm_t35_vsim,
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MR		 653 .vdac = &cm_t35_vdac,
654 .vpll2 = &cm_t35_vpll2,
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MR		 655};
656
657static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = {
658 {
659 I2C_BOARD_INFO("tps65930", 0x48),
660 .flags = I2C_CLIENT_WAKE,
661 .irq = INT_34XX_SYS_NIRQ,
662 .platform_data = &cm_t35_twldata,
663 },
664};
665
666static void __init cm_t35_init_i2c(void)
667{
668 omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo,
669 ARRAY_SIZE(cm_t35_i2c_boardinfo));
670}
671
672static struct omap_board_config_kernel cm_t35_config[] __initdata = {
673};
674
675static void __init cm_t35_init_irq(void)
676{
677 omap_board_config = cm_t35_config;
678 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
679
4805734b
PW		 680 omap2_init_common_infrastructure();
681 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
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MR		 682 mt46h32m32lf6_sdrc_params);
683 omap_init_irq();
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MR		 684}
685
ca5742bd 686static struct omap_board_mux board_mux[] __initdata = {
edc961a2
MR		 687 /* nCS and IRQ for CM-T35 ethernet */
688 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
689 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
690
691 /* nCS and IRQ for SB-T35 ethernet */
692 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
693 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
694
695 /* PENDOWN GPIO */
696 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
697
698 /* mUSB */
699 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
700 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
701 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
702 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
703 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
704 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
705 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
706 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
707 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
708 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
709 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
710 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
711
712 /* MMC 2 */
713 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
714 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
715 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
716 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
717
718 /* McSPI 1 */
719 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
720 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
721 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
722 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
723
724 /* McSPI 4 */
725 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
726 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
727 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
728 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
729
730 /* McBSP 2 */
731 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
732 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
733 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
734 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
735
736 /* serial ports */
737 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
738 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
739 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
740 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
741
742 /* DSS */
743 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
744 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
745 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
746 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
747 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
748 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
749 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
750 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
751 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
752 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
753 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
754 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
755 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
756 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
757 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
758 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
759 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
760 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
761 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
762 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
763 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
764 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
765 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
766 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
767 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
768 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
769 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
770 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
771
7f049ad1
MR		 772 /* display controls */
773 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
774 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
775 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
776
edc961a2
MR		 777 /* TPS IRQ */
778 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
779 OMAP_PIN_INPUT_PULLUP),
780
ca5742bd
TL		 781 { .reg_offset = OMAP_MUX_TERMINATOR },
782};
ca5742bd 783
884b8369
MM		 784static struct omap_musb_board_data musb_board_data = {
785 .interface_type = MUSB_INTERFACE_ULPI,
786 .mode = MUSB_OTG,
787 .power = 100,
788};
789
2886d128
MR		 790static void __init cm_t35_init(void)
791{
ca5742bd 792 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
2886d128
MR		 793 omap_serial_init();
794 cm_t35_init_i2c();
795 cm_t35_init_nand();
796 cm_t35_init_ads7846();
797 cm_t35_init_ethernet();
798 cm_t35_init_led();
7f049ad1 799 cm_t35_init_display();
2886d128 800
884b8369 801 usb_musb_init(&musb_board_data);
1a6b5923 802 usb_ehci_init(&ehci_pdata);
2886d128
MR		 803}
804
805MACHINE_START(CM_T35, "Compulab CM-T35")
2886d128 806 .boot_params = 0x80000100,
869fef41 807 .map_io = omap3_map_io,
71ee7dad 808 .reserve = omap_reserve,
2886d128
MR		 809 .init_irq = cm_t35_init_irq,
810 .init_machine = cm_t35_init,
811 .timer = &omap_timer,
812MACHINE_END
Linux kernel - Deliverables
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