Commit | Line | Data |
---|---|---|
476544ca TW |
1 | /* |
2 | * board-devkit8000.c - TimLL Devkit8000 | |
3 | * | |
4 | * Copyright (C) 2009 Kim Botherway | |
5 | * Copyright (C) 2010 Thomas Weber | |
6 | * | |
7 | * Modified from mach-omap2/board-omap3beagle.c | |
8 | * | |
9 | * Initial code: Syed Mohammed Khasim | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/leds.h> | |
24 | #include <linux/gpio.h> | |
25 | #include <linux/input.h> | |
26 | #include <linux/gpio_keys.h> | |
27 | ||
28 | #include <linux/mtd/mtd.h> | |
29 | #include <linux/mtd/partitions.h> | |
30 | #include <linux/mtd/nand.h> | |
3a63833e | 31 | #include <linux/mmc/host.h> |
476544ca TW |
32 | |
33 | #include <linux/regulator/machine.h> | |
34 | #include <linux/i2c/twl.h> | |
4952af43 | 35 | #include "id.h" |
476544ca TW |
36 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | |
38 | #include <asm/mach/map.h> | |
39 | #include <asm/mach/flash.h> | |
40 | ||
4e65331c | 41 | #include "common.h" |
3ef5d007 | 42 | #include "gpmc.h" |
2203747c | 43 | #include <linux/platform_data/mtd-nand-omap2.h> |
a0b38cc4 | 44 | #include <video/omapdss.h> |
f8ae2f08 | 45 | #include <video/omap-panel-generic-dpi.h> |
dac8eb5f | 46 | #include <video/omap-panel-tfp410.h> |
476544ca | 47 | |
2203747c | 48 | #include <linux/platform_data/spi-omap2-mcspi.h> |
476544ca TW |
49 | #include <linux/input/matrix_keypad.h> |
50 | #include <linux/spi/spi.h> | |
476544ca TW |
51 | #include <linux/dm9000.h> |
52 | #include <linux/interrupt.h> | |
53 | ||
54 | #include "sdram-micron-mt46h32m32lf-6.h" | |
476544ca TW |
55 | #include "mux.h" |
56 | #include "hsmmc.h" | |
2e618261 | 57 | #include "board-flash.h" |
96974a24 | 58 | #include "common-board-devices.h" |
476544ca | 59 | |
2e618261 AM |
60 | #define NAND_CS 0 |
61 | ||
476544ca TW |
62 | #define OMAP_DM9000_GPIO_IRQ 25 |
63 | #define OMAP3_DEVKIT_TS_GPIO 27 | |
64 | ||
65 | static struct mtd_partition devkit8000_nand_partitions[] = { | |
66 | /* All the partition sizes are listed in terms of NAND block size */ | |
67 | { | |
68 | .name = "X-Loader", | |
69 | .offset = 0, | |
70 | .size = 4 * NAND_BLOCK_SIZE, | |
71 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
72 | }, | |
73 | { | |
74 | .name = "U-Boot", | |
75 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
76 | .size = 15 * NAND_BLOCK_SIZE, | |
77 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
78 | }, | |
79 | { | |
80 | .name = "U-Boot Env", | |
81 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ | |
82 | .size = 1 * NAND_BLOCK_SIZE, | |
83 | }, | |
84 | { | |
85 | .name = "Kernel", | |
86 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | |
87 | .size = 32 * NAND_BLOCK_SIZE, | |
88 | }, | |
89 | { | |
90 | .name = "File System", | |
91 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ | |
92 | .size = MTDPART_SIZ_FULL, | |
93 | }, | |
94 | }; | |
95 | ||
476544ca TW |
96 | static struct omap2_hsmmc_info mmc[] = { |
97 | { | |
98 | .mmc = 1, | |
3a63833e | 99 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
476544ca | 100 | .gpio_wp = 29, |
3b972bf0 | 101 | .deferred = true, |
476544ca TW |
102 | }, |
103 | {} /* Terminator */ | |
104 | }; | |
476544ca TW |
105 | |
106 | static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) | |
107 | { | |
09c0721e | 108 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 109 | gpio_set_value_cansleep(dssdev->reset_gpio, 1); |
476544ca TW |
110 | return 0; |
111 | } | |
112 | ||
113 | static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev) | |
114 | { | |
09c0721e | 115 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 116 | gpio_set_value_cansleep(dssdev->reset_gpio, 0); |
476544ca | 117 | } |
31c73f74 | 118 | |
786b01a8 OD |
119 | static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { |
120 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
121 | }; | |
476544ca | 122 | |
5fd58b51 | 123 | /* ads7846 on SPI */ |
786b01a8 OD |
124 | static struct regulator_consumer_supply devkit8000_vio_supply[] = { |
125 | REGULATOR_SUPPLY("vcc", "spi2.0"), | |
126 | }; | |
476544ca | 127 | |
89747c91 | 128 | static struct panel_generic_dpi_data lcd_panel = { |
cc11aaf8 | 129 | .name = "innolux_at070tn83", |
89747c91 BW |
130 | .platform_enable = devkit8000_panel_enable_lcd, |
131 | .platform_disable = devkit8000_panel_disable_lcd, | |
132 | }; | |
133 | ||
476544ca TW |
134 | static struct omap_dss_device devkit8000_lcd_device = { |
135 | .name = "lcd", | |
476544ca | 136 | .type = OMAP_DISPLAY_TYPE_DPI, |
89747c91 BW |
137 | .driver_name = "generic_dpi_panel", |
138 | .data = &lcd_panel, | |
476544ca | 139 | .phy.dpi.data_lines = 24, |
476544ca | 140 | }; |
89747c91 | 141 | |
2e6f2ee7 | 142 | static struct tfp410_platform_data dvi_panel = { |
e813a55e | 143 | .power_down_gpio = -1, |
ca2e16fa | 144 | .i2c_bus_num = 1, |
89747c91 BW |
145 | }; |
146 | ||
476544ca TW |
147 | static struct omap_dss_device devkit8000_dvi_device = { |
148 | .name = "dvi", | |
476544ca | 149 | .type = OMAP_DISPLAY_TYPE_DPI, |
2e6f2ee7 | 150 | .driver_name = "tfp410", |
89747c91 | 151 | .data = &dvi_panel, |
476544ca | 152 | .phy.dpi.data_lines = 24, |
476544ca TW |
153 | }; |
154 | ||
155 | static struct omap_dss_device devkit8000_tv_device = { | |
156 | .name = "tv", | |
157 | .driver_name = "venc", | |
158 | .type = OMAP_DISPLAY_TYPE_VENC, | |
159 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
476544ca TW |
160 | }; |
161 | ||
162 | ||
163 | static struct omap_dss_device *devkit8000_dss_devices[] = { | |
164 | &devkit8000_lcd_device, | |
165 | &devkit8000_dvi_device, | |
166 | &devkit8000_tv_device, | |
167 | }; | |
168 | ||
169 | static struct omap_dss_board_info devkit8000_dss_data = { | |
170 | .num_devices = ARRAY_SIZE(devkit8000_dss_devices), | |
171 | .devices = devkit8000_dss_devices, | |
172 | .default_device = &devkit8000_lcd_device, | |
173 | }; | |
174 | ||
bead4375 | 175 | static uint32_t board_keymap[] = { |
476544ca TW |
176 | KEY(0, 0, KEY_1), |
177 | KEY(1, 0, KEY_2), | |
178 | KEY(2, 0, KEY_3), | |
179 | KEY(0, 1, KEY_4), | |
180 | KEY(1, 1, KEY_5), | |
181 | KEY(2, 1, KEY_6), | |
182 | KEY(3, 1, KEY_F5), | |
183 | KEY(0, 2, KEY_7), | |
184 | KEY(1, 2, KEY_8), | |
185 | KEY(2, 2, KEY_9), | |
186 | KEY(3, 2, KEY_F6), | |
187 | KEY(0, 3, KEY_F7), | |
188 | KEY(1, 3, KEY_0), | |
189 | KEY(2, 3, KEY_F8), | |
190 | PERSISTENT_KEY(4, 5), | |
191 | KEY(4, 4, KEY_VOLUMEUP), | |
192 | KEY(5, 5, KEY_VOLUMEDOWN), | |
193 | 0 | |
194 | }; | |
195 | ||
196 | static struct matrix_keymap_data board_map_data = { | |
197 | .keymap = board_keymap, | |
198 | .keymap_size = ARRAY_SIZE(board_keymap), | |
199 | }; | |
200 | ||
201 | static struct twl4030_keypad_data devkit8000_kp_data = { | |
202 | .keymap_data = &board_map_data, | |
203 | .rows = 6, | |
204 | .cols = 6, | |
205 | .rep = 1, | |
206 | }; | |
207 | ||
208 | static struct gpio_led gpio_leds[]; | |
209 | ||
210 | static int devkit8000_twl_gpio_setup(struct device *dev, | |
211 | unsigned gpio, unsigned ngpio) | |
212 | { | |
daf7aabc TW |
213 | int ret; |
214 | ||
476544ca TW |
215 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
216 | mmc[0].gpio_cd = gpio + 0; | |
3b972bf0 | 217 | omap_hsmmc_late_init(mmc); |
476544ca | 218 | |
31c73f74 KRC |
219 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ |
220 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | |
221 | ||
daf7aabc TW |
222 | /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ |
223 | devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; | |
224 | ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, | |
bc593f5d | 225 | GPIOF_OUT_INIT_LOW, "LCD_PWREN"); |
daf7aabc TW |
226 | if (ret < 0) { |
227 | devkit8000_lcd_device.reset_gpio = -EINVAL; | |
228 | printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); | |
229 | } | |
40986098 | 230 | |
31c73f74 | 231 | /* gpio + 7 is "DVI_PD" (out, active low) */ |
e813a55e | 232 | dvi_panel.power_down_gpio = gpio + 7; |
31c73f74 | 233 | |
476544ca TW |
234 | return 0; |
235 | } | |
236 | ||
237 | static struct twl4030_gpio_platform_data devkit8000_gpio_data = { | |
476544ca | 238 | .use_leds = true, |
35a78fa4 | 239 | .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13) |
476544ca TW |
240 | | BIT(15) | BIT(16) | BIT(17), |
241 | .setup = devkit8000_twl_gpio_setup, | |
242 | }; | |
243 | ||
c8aac01b SG |
244 | static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = { |
245 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | |
7c68dd96 | 246 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), |
c8aac01b | 247 | }; |
476544ca TW |
248 | |
249 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | |
250 | static struct regulator_init_data devkit8000_vmmc1 = { | |
251 | .constraints = { | |
252 | .min_uV = 1850000, | |
253 | .max_uV = 3150000, | |
254 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
255 | | REGULATOR_MODE_STANDBY, | |
256 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
257 | | REGULATOR_CHANGE_MODE | |
258 | | REGULATOR_CHANGE_STATUS, | |
259 | }, | |
786b01a8 OD |
260 | .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply), |
261 | .consumer_supplies = devkit8000_vmmc1_supply, | |
476544ca TW |
262 | }; |
263 | ||
5fd58b51 TW |
264 | /* VPLL1 for digital video outputs */ |
265 | static struct regulator_init_data devkit8000_vpll1 = { | |
476544ca | 266 | .constraints = { |
476544ca TW |
267 | .min_uV = 1800000, |
268 | .max_uV = 1800000, | |
269 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
270 | | REGULATOR_MODE_STANDBY, | |
271 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
272 | | REGULATOR_CHANGE_STATUS, | |
273 | }, | |
c8aac01b SG |
274 | .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies), |
275 | .consumer_supplies = devkit8000_vpll1_supplies, | |
5fd58b51 TW |
276 | }; |
277 | ||
278 | /* VAUX4 for ads7846 and nubs */ | |
279 | static struct regulator_init_data devkit8000_vio = { | |
280 | .constraints = { | |
281 | .min_uV = 1800000, | |
282 | .max_uV = 1800000, | |
283 | .apply_uV = true, | |
284 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
285 | | REGULATOR_MODE_STANDBY, | |
286 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
287 | | REGULATOR_CHANGE_STATUS, | |
288 | }, | |
786b01a8 OD |
289 | .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), |
290 | .consumer_supplies = devkit8000_vio_supply, | |
476544ca TW |
291 | }; |
292 | ||
476544ca | 293 | static struct twl4030_platform_data devkit8000_twldata = { |
476544ca | 294 | /* platform_data for children goes here */ |
476544ca | 295 | .gpio = &devkit8000_gpio_data, |
476544ca | 296 | .vmmc1 = &devkit8000_vmmc1, |
5fd58b51 TW |
297 | .vpll1 = &devkit8000_vpll1, |
298 | .vio = &devkit8000_vio, | |
476544ca TW |
299 | .keypad = &devkit8000_kp_data, |
300 | }; | |
301 | ||
476544ca TW |
302 | static int __init devkit8000_i2c_init(void) |
303 | { | |
827ed9ae | 304 | omap3_pmic_get_config(&devkit8000_twldata, |
b252b0ef PU |
305 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, |
306 | TWL_COMMON_REGULATOR_VDAC); | |
fbd8071c | 307 | omap3_pmic_init("tps65930", &devkit8000_twldata); |
476544ca TW |
308 | /* Bus 3 is attached to the DVI port where devices like the pico DLP |
309 | * projector don't work reliably with 400kHz */ | |
310 | omap_register_i2c_bus(3, 400, NULL, 0); | |
311 | return 0; | |
312 | } | |
313 | ||
314 | static struct gpio_led gpio_leds[] = { | |
315 | { | |
316 | .name = "led1", | |
317 | .default_trigger = "heartbeat", | |
318 | .gpio = 186, | |
319 | .active_low = true, | |
320 | }, | |
321 | { | |
322 | .name = "led2", | |
323 | .default_trigger = "mmc0", | |
324 | .gpio = 163, | |
325 | .active_low = true, | |
326 | }, | |
327 | { | |
328 | .name = "ledB", | |
329 | .default_trigger = "none", | |
330 | .gpio = 153, | |
331 | .active_low = true, | |
332 | }, | |
333 | { | |
334 | .name = "led3", | |
335 | .default_trigger = "none", | |
336 | .gpio = 164, | |
337 | .active_low = true, | |
338 | }, | |
339 | }; | |
340 | ||
341 | static struct gpio_led_platform_data gpio_led_info = { | |
342 | .leds = gpio_leds, | |
343 | .num_leds = ARRAY_SIZE(gpio_leds), | |
344 | }; | |
345 | ||
346 | static struct platform_device leds_gpio = { | |
347 | .name = "leds-gpio", | |
348 | .id = -1, | |
349 | .dev = { | |
350 | .platform_data = &gpio_led_info, | |
351 | }, | |
352 | }; | |
353 | ||
354 | static struct gpio_keys_button gpio_buttons[] = { | |
355 | { | |
356 | .code = BTN_EXTRA, | |
357 | .gpio = 26, | |
358 | .desc = "user", | |
359 | .wakeup = 1, | |
360 | }, | |
361 | }; | |
362 | ||
363 | static struct gpio_keys_platform_data gpio_key_info = { | |
364 | .buttons = gpio_buttons, | |
365 | .nbuttons = ARRAY_SIZE(gpio_buttons), | |
366 | }; | |
367 | ||
368 | static struct platform_device keys_gpio = { | |
369 | .name = "gpio-keys", | |
370 | .id = -1, | |
371 | .dev = { | |
372 | .platform_data = &gpio_key_info, | |
373 | }, | |
374 | }; | |
375 | ||
476544ca TW |
376 | #define OMAP_DM9000_BASE 0x2c000000 |
377 | ||
378 | static struct resource omap_dm9000_resources[] = { | |
379 | [0] = { | |
380 | .start = OMAP_DM9000_BASE, | |
381 | .end = (OMAP_DM9000_BASE + 0x4 - 1), | |
382 | .flags = IORESOURCE_MEM, | |
383 | }, | |
384 | [1] = { | |
385 | .start = (OMAP_DM9000_BASE + 0x400), | |
386 | .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1), | |
387 | .flags = IORESOURCE_MEM, | |
388 | }, | |
389 | [2] = { | |
476544ca TW |
390 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
391 | }, | |
392 | }; | |
393 | ||
394 | static struct dm9000_plat_data omap_dm9000_platdata = { | |
395 | .flags = DM9000_PLATF_16BITONLY, | |
396 | }; | |
397 | ||
398 | static struct platform_device omap_dm9000_dev = { | |
399 | .name = "dm9000", | |
400 | .id = -1, | |
401 | .num_resources = ARRAY_SIZE(omap_dm9000_resources), | |
402 | .resource = omap_dm9000_resources, | |
403 | .dev = { | |
404 | .platform_data = &omap_dm9000_platdata, | |
405 | }, | |
406 | }; | |
407 | ||
408 | static void __init omap_dm9000_init(void) | |
409 | { | |
f535daed KRC |
410 | unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; |
411 | struct omap_die_id odi; | |
bc593f5d | 412 | int ret; |
f535daed | 413 | |
bc593f5d IG |
414 | ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq"); |
415 | if (ret < 0) { | |
476544ca TW |
416 | printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", |
417 | OMAP_DM9000_GPIO_IRQ); | |
418 | return; | |
bc593f5d | 419 | } |
f535daed KRC |
420 | |
421 | /* init the mac address using DIE id */ | |
422 | omap_get_die_id(&odi); | |
423 | ||
424 | eth_addr[0] = 0x02; /* locally administered */ | |
425 | eth_addr[1] = odi.id_1 & 0xff; | |
426 | eth_addr[2] = (odi.id_0 & 0xff000000) >> 24; | |
427 | eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16; | |
428 | eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8; | |
429 | eth_addr[5] = (odi.id_0 & 0x000000ff); | |
476544ca TW |
430 | } |
431 | ||
432 | static struct platform_device *devkit8000_devices[] __initdata = { | |
476544ca TW |
433 | &leds_gpio, |
434 | &keys_gpio, | |
435 | &omap_dm9000_dev, | |
436 | }; | |
437 | ||
181b250c | 438 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
476544ca | 439 | |
181b250c KM |
440 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
441 | .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, | |
442 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
476544ca TW |
443 | |
444 | .phy_reset = true, | |
445 | .reset_gpio_port[0] = -EINVAL, | |
2135bb53 | 446 | .reset_gpio_port[1] = -EINVAL, |
476544ca TW |
447 | .reset_gpio_port[2] = -EINVAL |
448 | }; | |
449 | ||
c7ecea24 | 450 | #ifdef CONFIG_OMAP_MUX |
018e075c TW |
451 | static struct omap_board_mux board_mux[] __initdata = { |
452 | /* nCS and IRQ for Devkit8000 ethernet */ | |
453 | OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0), | |
454 | OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), | |
455 | ||
456 | /* McSPI 2*/ | |
457 | OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
458 | OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
459 | OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
460 | OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
461 | OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
462 | ||
463 | /* PENDOWN GPIO */ | |
464 | OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
465 | ||
466 | /* mUSB */ | |
467 | OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
468 | OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
469 | OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
470 | OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
471 | OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
472 | OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
473 | OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
474 | OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
475 | OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
476 | OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
477 | OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
478 | OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
479 | ||
480 | /* USB 1 */ | |
481 | OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
482 | OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT), | |
483 | OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
484 | OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
485 | OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
486 | OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
487 | OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
488 | OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
489 | OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
490 | OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
491 | OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
492 | OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
493 | ||
494 | /* MMC 1 */ | |
495 | OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
496 | OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
497 | OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
498 | OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
499 | OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
500 | OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
501 | OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
502 | OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
503 | OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
504 | OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
505 | ||
506 | /* McBSP 2 */ | |
507 | OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
508 | OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
509 | OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
510 | OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
511 | ||
512 | /* I2C 1 */ | |
513 | OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
514 | OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
515 | ||
516 | /* I2C 2 */ | |
517 | OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
518 | OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
519 | ||
520 | /* I2C 3 */ | |
521 | OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
522 | OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
523 | ||
524 | /* I2C 4 */ | |
525 | OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
526 | OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
527 | ||
528 | /* serial ports */ | |
529 | OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
530 | OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
531 | OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
532 | OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
533 | ||
534 | /* DSS */ | |
535 | OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
536 | OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
537 | OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
538 | OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
539 | OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
540 | OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
541 | OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
542 | OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
543 | OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
544 | OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
545 | OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
546 | OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
547 | OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
548 | OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
549 | OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
550 | OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
551 | OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
552 | OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
553 | OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
554 | OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
555 | OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
556 | OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
557 | OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
558 | OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
559 | OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
560 | OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
561 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
562 | OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
563 | ||
564 | /* expansion port */ | |
565 | /* McSPI 1 */ | |
566 | OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
567 | OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
568 | OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
569 | OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
570 | OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
571 | ||
572 | /* HDQ */ | |
573 | OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
574 | ||
575 | /* McSPI4 */ | |
576 | OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
577 | OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
578 | OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
579 | OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP), | |
580 | ||
581 | /* MMC 2 */ | |
582 | OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
583 | OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
584 | OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
585 | OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
586 | ||
587 | /* I2C3 */ | |
588 | OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
589 | OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
590 | ||
591 | OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
592 | OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
593 | OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
594 | ||
595 | OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
596 | OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
597 | ||
598 | /* TPS IRQ */ | |
599 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \ | |
600 | OMAP_PIN_INPUT_PULLUP), | |
601 | ||
602 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
603 | }; | |
c7ecea24 | 604 | #endif |
018e075c | 605 | |
476544ca TW |
606 | static void __init devkit8000_init(void) |
607 | { | |
018e075c | 608 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); |
faec32e5 | 609 | omap_serial_init(); |
a4ca9dbe TL |
610 | omap_sdrc_init(mt46h32m32lf6_sdrc_params, |
611 | mt46h32m32lf6_sdrc_params); | |
faec32e5 TW |
612 | |
613 | omap_dm9000_init(); | |
614 | ||
3b972bf0 | 615 | omap_hsmmc_init(mmc); |
476544ca | 616 | devkit8000_i2c_init(); |
46a0a540 | 617 | omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ); |
476544ca TW |
618 | platform_add_devices(devkit8000_devices, |
619 | ARRAY_SIZE(devkit8000_devices)); | |
476544ca | 620 | |
d5e13227 | 621 | omap_display_init(&devkit8000_dss_data); |
476544ca | 622 | |
96974a24 | 623 | omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL); |
476544ca | 624 | |
9e18630b | 625 | usb_musb_init(NULL); |
9e64bb1e | 626 | usbhs_init(&usbhs_bdata); |
2e618261 AM |
627 | board_nand_init(devkit8000_nand_partitions, |
628 | ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS, | |
629 | NAND_BUSWIDTH_16, NULL); | |
ac51c90f | 630 | omap_twl4030_audio_init("omap3beagle"); |
476544ca TW |
631 | |
632 | /* Ensure SDRC pins are mux'd for self-refresh */ | |
3cdc6ee5 TW |
633 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
634 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | |
476544ca TW |
635 | } |
636 | ||
476544ca | 637 | MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") |
5e52b435 | 638 | .atag_offset = 0x100, |
71ee7dad | 639 | .reserve = omap_reserve, |
3dc3bad6 | 640 | .map_io = omap3_map_io, |
8f5b5a41 | 641 | .init_early = omap35xx_init_early, |
be732460 | 642 | .init_irq = omap3_init_irq, |
6b2f55d7 | 643 | .handle_irq = omap3_intc_handle_irq, |
476544ca | 644 | .init_machine = devkit8000_init, |
bbd707ac | 645 | .init_late = omap35xx_init_late, |
e74984e4 | 646 | .timer = &omap3_secure_timer, |
187e3e06 | 647 | .restart = omap3xxx_restart, |
476544ca | 648 | MACHINE_END |