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Merge branch 'drm-nouveau-fixes-3.10' of git://anongit.freedesktop.org/git/nouveau...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-devkit8000.c
CommitLineData
476544ca
TW		 1/*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/leds.h>
24#include <linux/gpio.h>
25#include <linux/input.h>
26#include <linux/gpio_keys.h>
27
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand.h>
3a63833e 31#include <linux/mmc/host.h>
51482be9 32#include <linux/usb/phy.h>
476544ca
TW		 33
34#include <linux/regulator/machine.h>
35#include <linux/i2c/twl.h>
4952af43 36#include "id.h"
476544ca
TW		 37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/flash.h>
41
4e65331c 42#include "common.h"
3ef5d007 43#include "gpmc.h"
2203747c 44#include <linux/platform_data/mtd-nand-omap2.h>
a0b38cc4 45#include <video/omapdss.h>
a0d8dde9 46#include <video/omap-panel-data.h>
476544ca 47
2203747c 48#include <linux/platform_data/spi-omap2-mcspi.h>
476544ca
TW		 49#include <linux/input/matrix_keypad.h>
50#include <linux/spi/spi.h>
476544ca
TW		 51#include <linux/dm9000.h>
52#include <linux/interrupt.h>
53
54#include "sdram-micron-mt46h32m32lf-6.h"
476544ca
TW		 55#include "mux.h"
56#include "hsmmc.h"
2e618261 57#include "board-flash.h"
96974a24 58#include "common-board-devices.h"
476544ca 59
2e618261
AM		 60#define NAND_CS 0
61
476544ca
TW		 62#define OMAP_DM9000_GPIO_IRQ 25
63#define OMAP3_DEVKIT_TS_GPIO 27
64
65static struct mtd_partition devkit8000_nand_partitions[] = {
66 /* All the partition sizes are listed in terms of NAND block size */
67 {
68 .name = "X-Loader",
69 .offset = 0,
70 .size = 4 * NAND_BLOCK_SIZE,
71 .mask_flags = MTD_WRITEABLE, /* force read-only */
72 },
73 {
74 .name = "U-Boot",
75 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
76 .size = 15 * NAND_BLOCK_SIZE,
77 .mask_flags = MTD_WRITEABLE, /* force read-only */
78 },
79 {
80 .name = "U-Boot Env",
81 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
82 .size = 1 * NAND_BLOCK_SIZE,
83 },
84 {
85 .name = "Kernel",
86 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
87 .size = 32 * NAND_BLOCK_SIZE,
88 },
89 {
90 .name = "File System",
91 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
92 .size = MTDPART_SIZ_FULL,
93 },
94};
95
476544ca
TW		 96static struct omap2_hsmmc_info mmc[] = {
97 {
98 .mmc = 1,
3a63833e 99 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
476544ca 100 .gpio_wp = 29,
3b972bf0 101 .deferred = true,
476544ca
TW		 102 },
103 {} /* Terminator */
104};
476544ca 105
786b01a8
OD		 106static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
107 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
108};
476544ca 109
5fd58b51 110/* ads7846 on SPI */
786b01a8
OD		 111static struct regulator_consumer_supply devkit8000_vio_supply[] = {
112 REGULATOR_SUPPLY("vcc", "spi2.0"),
113};
476544ca 114
89747c91 115static struct panel_generic_dpi_data lcd_panel = {
cc11aaf8 116 .name = "innolux_at070tn83",
9272d8bd 117 /* gpios filled in code */
89747c91
BW		 118};
119
476544ca
TW		 120static struct omap_dss_device devkit8000_lcd_device = {
121 .name = "lcd",
476544ca 122 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 123 .driver_name = "generic_dpi_panel",
124 .data = &lcd_panel,
476544ca 125 .phy.dpi.data_lines = 24,
476544ca 126};
89747c91 127
2e6f2ee7 128static struct tfp410_platform_data dvi_panel = {
e813a55e 129 .power_down_gpio = -1,
ca2e16fa 130 .i2c_bus_num = 1,
89747c91
BW		 131};
132
476544ca
TW		 133static struct omap_dss_device devkit8000_dvi_device = {
134 .name = "dvi",
476544ca 135 .type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7 136 .driver_name = "tfp410",
89747c91 137 .data = &dvi_panel,
476544ca 138 .phy.dpi.data_lines = 24,
476544ca
TW		 139};
140
141static struct omap_dss_device devkit8000_tv_device = {
142 .name = "tv",
143 .driver_name = "venc",
144 .type = OMAP_DISPLAY_TYPE_VENC,
145 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
476544ca
TW		 146};
147
148
149static struct omap_dss_device *devkit8000_dss_devices[] = {
150 &devkit8000_lcd_device,
151 &devkit8000_dvi_device,
152 &devkit8000_tv_device,
153};
154
155static struct omap_dss_board_info devkit8000_dss_data = {
156 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
157 .devices = devkit8000_dss_devices,
158 .default_device = &devkit8000_lcd_device,
159};
160
bead4375 161static uint32_t board_keymap[] = {
476544ca
TW		 162 KEY(0, 0, KEY_1),
163 KEY(1, 0, KEY_2),
164 KEY(2, 0, KEY_3),
165 KEY(0, 1, KEY_4),
166 KEY(1, 1, KEY_5),
167 KEY(2, 1, KEY_6),
168 KEY(3, 1, KEY_F5),
169 KEY(0, 2, KEY_7),
170 KEY(1, 2, KEY_8),
171 KEY(2, 2, KEY_9),
172 KEY(3, 2, KEY_F6),
173 KEY(0, 3, KEY_F7),
174 KEY(1, 3, KEY_0),
175 KEY(2, 3, KEY_F8),
176 PERSISTENT_KEY(4, 5),
177 KEY(4, 4, KEY_VOLUMEUP),
178 KEY(5, 5, KEY_VOLUMEDOWN),
179 0
180};
181
182static struct matrix_keymap_data board_map_data = {
183 .keymap = board_keymap,
184 .keymap_size = ARRAY_SIZE(board_keymap),
185};
186
187static struct twl4030_keypad_data devkit8000_kp_data = {
188 .keymap_data = &board_map_data,
189 .rows = 6,
190 .cols = 6,
191 .rep = 1,
192};
193
194static struct gpio_led gpio_leds[];
195
196static int devkit8000_twl_gpio_setup(struct device *dev,
197 unsigned gpio, unsigned ngpio)
198{
476544ca
TW		 199 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
200 mmc[0].gpio_cd = gpio + 0;
3b972bf0 201 omap_hsmmc_late_init(mmc);
476544ca 202
31c73f74
KRC		 203 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
204 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
205
daf7aabc 206 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
9272d8bd
AT		 207 lcd_panel.num_gpios = 1;
208 lcd_panel.gpios[0] = gpio + TWL4030_GPIO_MAX + 0;
40986098 209
31c73f74 210 /* gpio + 7 is "DVI_PD" (out, active low) */
e813a55e 211 dvi_panel.power_down_gpio = gpio + 7;
31c73f74 212
476544ca
TW		 213 return 0;
214}
215
216static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
476544ca 217 .use_leds = true,
35a78fa4 218 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
476544ca
TW		 219 | BIT(15) | BIT(16) | BIT(17),
220 .setup = devkit8000_twl_gpio_setup,
221};
222
c8aac01b
SG		 223static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
224 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
7c68dd96 225 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
c8aac01b 226};
476544ca
TW		 227
228/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
229static struct regulator_init_data devkit8000_vmmc1 = {
230 .constraints = {
231 .min_uV = 1850000,
232 .max_uV = 3150000,
233 .valid_modes_mask = REGULATOR_MODE_NORMAL
234 | REGULATOR_MODE_STANDBY,
235 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
236 | REGULATOR_CHANGE_MODE
237 | REGULATOR_CHANGE_STATUS,
238 },
786b01a8
OD		 239 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
240 .consumer_supplies = devkit8000_vmmc1_supply,
476544ca
TW		 241};
242
5fd58b51
TW		 243/* VPLL1 for digital video outputs */
244static struct regulator_init_data devkit8000_vpll1 = {
476544ca 245 .constraints = {
476544ca
TW		 246 .min_uV = 1800000,
247 .max_uV = 1800000,
248 .valid_modes_mask = REGULATOR_MODE_NORMAL
249 | REGULATOR_MODE_STANDBY,
250 .valid_ops_mask = REGULATOR_CHANGE_MODE
251 | REGULATOR_CHANGE_STATUS,
252 },
c8aac01b
SG		 253 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
254 .consumer_supplies = devkit8000_vpll1_supplies,
5fd58b51
TW		 255};
256
257/* VAUX4 for ads7846 and nubs */
258static struct regulator_init_data devkit8000_vio = {
259 .constraints = {
260 .min_uV = 1800000,
261 .max_uV = 1800000,
262 .apply_uV = true,
263 .valid_modes_mask = REGULATOR_MODE_NORMAL
264 | REGULATOR_MODE_STANDBY,
265 .valid_ops_mask = REGULATOR_CHANGE_MODE
266 | REGULATOR_CHANGE_STATUS,
267 },
786b01a8
OD		 268 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
269 .consumer_supplies = devkit8000_vio_supply,
476544ca
TW		 270};
271
476544ca 272static struct twl4030_platform_data devkit8000_twldata = {
476544ca 273 /* platform_data for children goes here */
476544ca 274 .gpio = &devkit8000_gpio_data,
476544ca 275 .vmmc1 = &devkit8000_vmmc1,
5fd58b51
TW		 276 .vpll1 = &devkit8000_vpll1,
277 .vio = &devkit8000_vio,
476544ca
TW		 278 .keypad = &devkit8000_kp_data,
279};
280
476544ca
TW		 281static int __init devkit8000_i2c_init(void)
282{
827ed9ae 283 omap3_pmic_get_config(&devkit8000_twldata,
b252b0ef
PU		 284 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
285 TWL_COMMON_REGULATOR_VDAC);
fbd8071c 286 omap3_pmic_init("tps65930", &devkit8000_twldata);
476544ca
TW		 287 /* Bus 3 is attached to the DVI port where devices like the pico DLP
288 * projector don't work reliably with 400kHz */
289 omap_register_i2c_bus(3, 400, NULL, 0);
290 return 0;
291}
292
293static struct gpio_led gpio_leds[] = {
294 {
295 .name = "led1",
296 .default_trigger = "heartbeat",
297 .gpio = 186,
298 .active_low = true,
299 },
300 {
301 .name = "led2",
302 .default_trigger = "mmc0",
303 .gpio = 163,
304 .active_low = true,
305 },
306 {
307 .name = "ledB",
308 .default_trigger = "none",
309 .gpio = 153,
310 .active_low = true,
311 },
312 {
313 .name = "led3",
314 .default_trigger = "none",
315 .gpio = 164,
316 .active_low = true,
317 },
318};
319
320static struct gpio_led_platform_data gpio_led_info = {
321 .leds = gpio_leds,
322 .num_leds = ARRAY_SIZE(gpio_leds),
323};
324
325static struct platform_device leds_gpio = {
326 .name = "leds-gpio",
327 .id = -1,
328 .dev = {
329 .platform_data = &gpio_led_info,
330 },
331};
332
333static struct gpio_keys_button gpio_buttons[] = {
334 {
335 .code = BTN_EXTRA,
336 .gpio = 26,
337 .desc = "user",
338 .wakeup = 1,
339 },
340};
341
342static struct gpio_keys_platform_data gpio_key_info = {
343 .buttons = gpio_buttons,
344 .nbuttons = ARRAY_SIZE(gpio_buttons),
345};
346
347static struct platform_device keys_gpio = {
348 .name = "gpio-keys",
349 .id = -1,
350 .dev = {
351 .platform_data = &gpio_key_info,
352 },
353};
354
476544ca
TW		 355#define OMAP_DM9000_BASE 0x2c000000
356
357static struct resource omap_dm9000_resources[] = {
358 [0] = {
359 .start = OMAP_DM9000_BASE,
360 .end = (OMAP_DM9000_BASE + 0x4 - 1),
361 .flags = IORESOURCE_MEM,
362 },
363 [1] = {
364 .start = (OMAP_DM9000_BASE + 0x400),
365 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
366 .flags = IORESOURCE_MEM,
367 },
368 [2] = {
476544ca
TW		 369 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
370 },
371};
372
373static struct dm9000_plat_data omap_dm9000_platdata = {
374 .flags = DM9000_PLATF_16BITONLY,
375};
376
377static struct platform_device omap_dm9000_dev = {
378 .name = "dm9000",
379 .id = -1,
380 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
381 .resource = omap_dm9000_resources,
382 .dev = {
383 .platform_data = &omap_dm9000_platdata,
384 },
385};
386
387static void __init omap_dm9000_init(void)
388{
f535daed
KRC		 389 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
390 struct omap_die_id odi;
bc593f5d 391 int ret;
f535daed 392
bc593f5d
IG		 393 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
394 if (ret < 0) {
476544ca
TW		 395 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
396 OMAP_DM9000_GPIO_IRQ);
397 return;
bc593f5d 398 }
f535daed
KRC		 399
400 /* init the mac address using DIE id */
401 omap_get_die_id(&odi);
402
403 eth_addr[0] = 0x02; /* locally administered */
404 eth_addr[1] = odi.id_1 & 0xff;
405 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
406 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
407 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
408 eth_addr[5] = (odi.id_0 & 0x000000ff);
476544ca
TW		 409}
410
411static struct platform_device *devkit8000_devices[] __initdata = {
476544ca
TW		 412 &leds_gpio,
413 &keys_gpio,
414 &omap_dm9000_dev,
415};
416
42973159 417static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
181b250c 418 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
476544ca
TW		 419};
420
c7ecea24 421#ifdef CONFIG_OMAP_MUX
018e075c
TW		 422static struct omap_board_mux board_mux[] __initdata = {
423 /* nCS and IRQ for Devkit8000 ethernet */
424 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
425 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
426
427 /* McSPI 2*/
428 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
429 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
430 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
431 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
432 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
433
434 /* PENDOWN GPIO */
435 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
436
437 /* mUSB */
438 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
439 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
440 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
441 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
442 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
443 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
444 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
445 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
446 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
447 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
448 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
449 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
450
451 /* USB 1 */
452 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
453 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
454 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
455 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
456 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
457 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
458 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
459 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
460 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
461 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
462 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
463 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
464
465 /* MMC 1 */
466 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
467 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
468 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
469 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
470 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
471 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
472 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
473 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
474 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
475 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
476
477 /* McBSP 2 */
478 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
479 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
480 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
481 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
482
483 /* I2C 1 */
484 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
485 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
486
487 /* I2C 2 */
488 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
489 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
490
491 /* I2C 3 */
492 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
493 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
494
495 /* I2C 4 */
496 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
497 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
498
499 /* serial ports */
500 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
501 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
502 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
503 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
504
505 /* DSS */
506 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
507 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
508 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
509 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
510 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
511 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
512 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
513 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
514 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
515 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
516 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
517 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
518 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
519 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
520 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
521 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
522 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
523 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
524 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
525 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
526 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
527 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
528 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
529 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
530 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
531 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
532 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
533 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
534
535 /* expansion port */
536 /* McSPI 1 */
537 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
538 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
539 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
540 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
541 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
542
543 /* HDQ */
544 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
545
546 /* McSPI4 */
547 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
548 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
549 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
550 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
551
552 /* MMC 2 */
553 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
554 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
555 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
556 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
557
558 /* I2C3 */
559 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
560 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
561
562 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
563 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
564 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
565
566 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
567 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
568
569 /* TPS IRQ */
570 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
571 OMAP_PIN_INPUT_PULLUP),
572
573 { .reg_offset = OMAP_MUX_TERMINATOR },
574};
c7ecea24 575#endif
018e075c 576
476544ca
TW		 577static void __init devkit8000_init(void)
578{
018e075c 579 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
faec32e5 580 omap_serial_init();
a4ca9dbe
TL		 581 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
582 mt46h32m32lf6_sdrc_params);
faec32e5
TW		 583
584 omap_dm9000_init();
585
3b972bf0 586 omap_hsmmc_init(mmc);
476544ca 587 devkit8000_i2c_init();
46a0a540 588 omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ);
476544ca
TW		 589 platform_add_devices(devkit8000_devices,
590 ARRAY_SIZE(devkit8000_devices));
476544ca 591
d5e13227 592 omap_display_init(&devkit8000_dss_data);
476544ca 593
96974a24 594 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
476544ca 595
51482be9 596 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
9e18630b 597 usb_musb_init(NULL);
9e64bb1e 598 usbhs_init(&usbhs_bdata);
2e618261
AM		 599 board_nand_init(devkit8000_nand_partitions,
600 ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
601 NAND_BUSWIDTH_16, NULL);
40234bf7 602 omap_twl4030_audio_init("omap3beagle", NULL);
476544ca
TW		 603
604 /* Ensure SDRC pins are mux'd for self-refresh */
3cdc6ee5
TW		 605 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
606 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
476544ca
TW		 607}
608
476544ca 609MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
5e52b435 610 .atag_offset = 0x100,
71ee7dad 611 .reserve = omap_reserve,
3dc3bad6 612 .map_io = omap3_map_io,
8f5b5a41 613 .init_early = omap35xx_init_early,
be732460 614 .init_irq = omap3_init_irq,
6b2f55d7 615 .handle_irq = omap3_intc_handle_irq,
476544ca 616 .init_machine = devkit8000_init,
bbd707ac 617 .init_late = omap35xx_init_late,
6bb27d73 618 .init_time = omap3_secure_sync32k_timer_init,
187e3e06 619 .restart = omap3xxx_restart,
476544ca 620MACHINE_END
Linux kernel - Deliverables
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