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Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
[deliverable/linux.git] / arch / arm / mach-omap2 / board-devkit8000.c
CommitLineData
476544ca
TW		 1/*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/leds.h>
24#include <linux/gpio.h>
25#include <linux/input.h>
26#include <linux/gpio_keys.h>
27
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand.h>
3a63833e 31#include <linux/mmc/host.h>
51482be9 32#include <linux/usb/phy.h>
476544ca
TW		 33
34#include <linux/regulator/machine.h>
35#include <linux/i2c/twl.h>
4952af43 36#include "id.h"
476544ca
TW		 37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/flash.h>
41
4e65331c 42#include "common.h"
3ef5d007 43#include "gpmc.h"
2203747c 44#include <linux/platform_data/mtd-nand-omap2.h>
a0b38cc4 45#include <video/omapdss.h>
a0d8dde9 46#include <video/omap-panel-data.h>
476544ca 47
2203747c 48#include <linux/platform_data/spi-omap2-mcspi.h>
476544ca
TW		 49#include <linux/input/matrix_keypad.h>
50#include <linux/spi/spi.h>
476544ca
TW		 51#include <linux/dm9000.h>
52#include <linux/interrupt.h>
53
54#include "sdram-micron-mt46h32m32lf-6.h"
476544ca
TW		 55#include "mux.h"
56#include "hsmmc.h"
2e618261 57#include "board-flash.h"
96974a24 58#include "common-board-devices.h"
476544ca 59
2e618261
AM		 60#define NAND_CS 0
61
476544ca
TW		 62#define OMAP_DM9000_GPIO_IRQ 25
63#define OMAP3_DEVKIT_TS_GPIO 27
64
65static struct mtd_partition devkit8000_nand_partitions[] = {
66 /* All the partition sizes are listed in terms of NAND block size */
67 {
68 .name = "X-Loader",
69 .offset = 0,
70 .size = 4 * NAND_BLOCK_SIZE,
71 .mask_flags = MTD_WRITEABLE, /* force read-only */
72 },
73 {
74 .name = "U-Boot",
75 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
76 .size = 15 * NAND_BLOCK_SIZE,
77 .mask_flags = MTD_WRITEABLE, /* force read-only */
78 },
79 {
80 .name = "U-Boot Env",
81 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
82 .size = 1 * NAND_BLOCK_SIZE,
83 },
84 {
85 .name = "Kernel",
86 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
87 .size = 32 * NAND_BLOCK_SIZE,
88 },
89 {
90 .name = "File System",
91 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
92 .size = MTDPART_SIZ_FULL,
93 },
94};
95
476544ca
TW		 96static struct omap2_hsmmc_info mmc[] = {
97 {
98 .mmc = 1,
3a63833e 99 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
476544ca 100 .gpio_wp = 29,
3b972bf0 101 .deferred = true,
476544ca
TW		 102 },
103 {} /* Terminator */
104};
476544ca 105
786b01a8
OD		 106static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
107 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
108};
476544ca 109
5fd58b51 110/* ads7846 on SPI */
786b01a8
OD		 111static struct regulator_consumer_supply devkit8000_vio_supply[] = {
112 REGULATOR_SUPPLY("vcc", "spi2.0"),
113};
476544ca 114
c78fb21d
TV		 115static const struct display_timing devkit8000_lcd_videomode = {
116 .pixelclock = { 0, 40000000, 0 },
117
118 .hactive = { 0, 800, 0 },
119 .hfront_porch = { 0, 1, 0 },
120 .hback_porch = { 0, 1, 0 },
121 .hsync_len = { 0, 48, 0 },
122
123 .vactive = { 0, 480, 0 },
124 .vfront_porch = { 0, 12, 0 },
125 .vback_porch = { 0, 25, 0 },
126 .vsync_len = { 0, 3, 0 },
127
128 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
129 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,
89747c91
BW		 130};
131
c78fb21d 132static struct panel_dpi_platform_data devkit8000_lcd_pdata = {
476544ca 133 .name = "lcd",
c78fb21d
TV		 134 .source = "dpi.0",
135
136 .data_lines = 24,
137
138 .display_timing = &devkit8000_lcd_videomode,
139
140 .enable_gpio = -1, /* filled in code */
141 .backlight_gpio = -1,
476544ca 142};
89747c91 143
c78fb21d
TV		 144static struct platform_device devkit8000_lcd_device = {
145 .name = "panel-dpi",
146 .id = 0,
147 .dev.platform_data = &devkit8000_lcd_pdata,
89747c91
BW		 148};
149
c78fb21d 150static struct connector_dvi_platform_data devkit8000_dvi_connector_pdata = {
476544ca 151 .name = "dvi",
c78fb21d
TV		 152 .source = "tfp410.0",
153 .i2c_bus_num = 1,
476544ca
TW		 154};
155
c78fb21d
TV		 156static struct platform_device devkit8000_dvi_connector_device = {
157 .name = "connector-dvi",
158 .id = 0,
159 .dev.platform_data = &devkit8000_dvi_connector_pdata,
476544ca
TW		 160};
161
c78fb21d
TV		 162static struct encoder_tfp410_platform_data devkit8000_tfp410_pdata = {
163 .name = "tfp410.0",
164 .source = "dpi.0",
165 .data_lines = 24,
166 .power_down_gpio = -1, /* filled in code */
167};
476544ca 168
c78fb21d
TV		 169static struct platform_device devkit8000_tfp410_device = {
170 .name = "tfp410",
171 .id = 0,
172 .dev.platform_data = &devkit8000_tfp410_pdata,
173};
174
175static struct connector_atv_platform_data devkit8000_tv_pdata = {
176 .name = "tv",
177 .source = "venc.0",
178 .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
179 .invert_polarity = false,
180};
181
182static struct platform_device devkit8000_tv_connector_device = {
183 .name = "connector-analog-tv",
184 .id = 0,
185 .dev.platform_data = &devkit8000_tv_pdata,
476544ca
TW		 186};
187
188static struct omap_dss_board_info devkit8000_dss_data = {
c78fb21d 189 .default_display_name = "lcd",
476544ca
TW		 190};
191
bead4375 192static uint32_t board_keymap[] = {
476544ca
TW		 193 KEY(0, 0, KEY_1),
194 KEY(1, 0, KEY_2),
195 KEY(2, 0, KEY_3),
196 KEY(0, 1, KEY_4),
197 KEY(1, 1, KEY_5),
198 KEY(2, 1, KEY_6),
199 KEY(3, 1, KEY_F5),
200 KEY(0, 2, KEY_7),
201 KEY(1, 2, KEY_8),
202 KEY(2, 2, KEY_9),
203 KEY(3, 2, KEY_F6),
204 KEY(0, 3, KEY_F7),
205 KEY(1, 3, KEY_0),
206 KEY(2, 3, KEY_F8),
207 PERSISTENT_KEY(4, 5),
208 KEY(4, 4, KEY_VOLUMEUP),
209 KEY(5, 5, KEY_VOLUMEDOWN),
210 0
211};
212
213static struct matrix_keymap_data board_map_data = {
214 .keymap = board_keymap,
215 .keymap_size = ARRAY_SIZE(board_keymap),
216};
217
218static struct twl4030_keypad_data devkit8000_kp_data = {
219 .keymap_data = &board_map_data,
220 .rows = 6,
221 .cols = 6,
222 .rep = 1,
223};
224
225static struct gpio_led gpio_leds[];
226
227static int devkit8000_twl_gpio_setup(struct device *dev,
228 unsigned gpio, unsigned ngpio)
229{
476544ca
TW		 230 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
231 mmc[0].gpio_cd = gpio + 0;
3b972bf0 232 omap_hsmmc_late_init(mmc);
476544ca 233
31c73f74
KRC		 234 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
235 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
236
daf7aabc 237 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
c78fb21d 238 devkit8000_lcd_pdata.enable_gpio = gpio + TWL4030_GPIO_MAX + 0;
40986098 239
31c73f74 240 /* gpio + 7 is "DVI_PD" (out, active low) */
c78fb21d 241 devkit8000_tfp410_pdata.power_down_gpio = gpio + 7;
31c73f74 242
476544ca
TW		 243 return 0;
244}
245
246static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
476544ca 247 .use_leds = true,
35a78fa4 248 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
476544ca
TW		 249 | BIT(15) | BIT(16) | BIT(17),
250 .setup = devkit8000_twl_gpio_setup,
251};
252
c8aac01b
SG		 253static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
254 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
1f92a1a4 255 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),
7c68dd96 256 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
c8aac01b 257};
476544ca
TW		 258
259/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
260static struct regulator_init_data devkit8000_vmmc1 = {
261 .constraints = {
262 .min_uV = 1850000,
263 .max_uV = 3150000,
264 .valid_modes_mask = REGULATOR_MODE_NORMAL
265 | REGULATOR_MODE_STANDBY,
266 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
267 | REGULATOR_CHANGE_MODE
268 | REGULATOR_CHANGE_STATUS,
269 },
786b01a8
OD		 270 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
271 .consumer_supplies = devkit8000_vmmc1_supply,
476544ca
TW		 272};
273
5fd58b51
TW		 274/* VPLL1 for digital video outputs */
275static struct regulator_init_data devkit8000_vpll1 = {
476544ca 276 .constraints = {
476544ca
TW		 277 .min_uV = 1800000,
278 .max_uV = 1800000,
279 .valid_modes_mask = REGULATOR_MODE_NORMAL
280 | REGULATOR_MODE_STANDBY,
281 .valid_ops_mask = REGULATOR_CHANGE_MODE
282 | REGULATOR_CHANGE_STATUS,
283 },
c8aac01b
SG		 284 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
285 .consumer_supplies = devkit8000_vpll1_supplies,
5fd58b51
TW		 286};
287
288/* VAUX4 for ads7846 and nubs */
289static struct regulator_init_data devkit8000_vio = {
290 .constraints = {
291 .min_uV = 1800000,
292 .max_uV = 1800000,
293 .apply_uV = true,
294 .valid_modes_mask = REGULATOR_MODE_NORMAL
295 | REGULATOR_MODE_STANDBY,
296 .valid_ops_mask = REGULATOR_CHANGE_MODE
297 | REGULATOR_CHANGE_STATUS,
298 },
786b01a8
OD		 299 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
300 .consumer_supplies = devkit8000_vio_supply,
476544ca
TW		 301};
302
476544ca 303static struct twl4030_platform_data devkit8000_twldata = {
476544ca 304 /* platform_data for children goes here */
476544ca 305 .gpio = &devkit8000_gpio_data,
476544ca 306 .vmmc1 = &devkit8000_vmmc1,
5fd58b51
TW		 307 .vpll1 = &devkit8000_vpll1,
308 .vio = &devkit8000_vio,
476544ca
TW		 309 .keypad = &devkit8000_kp_data,
310};
311
476544ca
TW		 312static int __init devkit8000_i2c_init(void)
313{
827ed9ae 314 omap3_pmic_get_config(&devkit8000_twldata,
b252b0ef
PU		 315 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
316 TWL_COMMON_REGULATOR_VDAC);
fbd8071c 317 omap3_pmic_init("tps65930", &devkit8000_twldata);
476544ca
TW		 318 /* Bus 3 is attached to the DVI port where devices like the pico DLP
319 * projector don't work reliably with 400kHz */
320 omap_register_i2c_bus(3, 400, NULL, 0);
321 return 0;
322}
323
324static struct gpio_led gpio_leds[] = {
325 {
326 .name = "led1",
327 .default_trigger = "heartbeat",
328 .gpio = 186,
329 .active_low = true,
330 },
331 {
332 .name = "led2",
333 .default_trigger = "mmc0",
334 .gpio = 163,
335 .active_low = true,
336 },
337 {
338 .name = "ledB",
339 .default_trigger = "none",
340 .gpio = 153,
341 .active_low = true,
342 },
343 {
344 .name = "led3",
345 .default_trigger = "none",
346 .gpio = 164,
347 .active_low = true,
348 },
349};
350
351static struct gpio_led_platform_data gpio_led_info = {
352 .leds = gpio_leds,
353 .num_leds = ARRAY_SIZE(gpio_leds),
354};
355
356static struct platform_device leds_gpio = {
357 .name = "leds-gpio",
358 .id = -1,
359 .dev = {
360 .platform_data = &gpio_led_info,
361 },
362};
363
364static struct gpio_keys_button gpio_buttons[] = {
365 {
366 .code = BTN_EXTRA,
367 .gpio = 26,
368 .desc = "user",
369 .wakeup = 1,
370 },
371};
372
373static struct gpio_keys_platform_data gpio_key_info = {
374 .buttons = gpio_buttons,
375 .nbuttons = ARRAY_SIZE(gpio_buttons),
376};
377
378static struct platform_device keys_gpio = {
379 .name = "gpio-keys",
380 .id = -1,
381 .dev = {
382 .platform_data = &gpio_key_info,
383 },
384};
385
476544ca
TW		 386#define OMAP_DM9000_BASE 0x2c000000
387
388static struct resource omap_dm9000_resources[] = {
389 [0] = {
390 .start = OMAP_DM9000_BASE,
391 .end = (OMAP_DM9000_BASE + 0x4 - 1),
392 .flags = IORESOURCE_MEM,
393 },
394 [1] = {
395 .start = (OMAP_DM9000_BASE + 0x400),
396 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
397 .flags = IORESOURCE_MEM,
398 },
399 [2] = {
476544ca
TW		 400 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
401 },
402};
403
404static struct dm9000_plat_data omap_dm9000_platdata = {
405 .flags = DM9000_PLATF_16BITONLY,
406};
407
408static struct platform_device omap_dm9000_dev = {
409 .name = "dm9000",
410 .id = -1,
411 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
412 .resource = omap_dm9000_resources,
413 .dev = {
414 .platform_data = &omap_dm9000_platdata,
415 },
416};
417
418static void __init omap_dm9000_init(void)
419{
f535daed
KRC		 420 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
421 struct omap_die_id odi;
bc593f5d 422 int ret;
f535daed 423
bc593f5d
IG		 424 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
425 if (ret < 0) {
476544ca
TW		 426 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
427 OMAP_DM9000_GPIO_IRQ);
428 return;
bc593f5d 429 }
f535daed
KRC		 430
431 /* init the mac address using DIE id */
432 omap_get_die_id(&odi);
433
434 eth_addr[0] = 0x02; /* locally administered */
435 eth_addr[1] = odi.id_1 & 0xff;
436 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
437 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
438 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
439 eth_addr[5] = (odi.id_0 & 0x000000ff);
476544ca
TW		 440}
441
442static struct platform_device *devkit8000_devices[] __initdata = {
476544ca
TW		 443 &leds_gpio,
444 &keys_gpio,
445 &omap_dm9000_dev,
c78fb21d
TV		 446 &devkit8000_lcd_device,
447 &devkit8000_tfp410_device,
448 &devkit8000_dvi_connector_device,
449 &devkit8000_tv_connector_device,
476544ca
TW		 450};
451
42973159 452static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
181b250c 453 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
476544ca
TW		 454};
455
c7ecea24 456#ifdef CONFIG_OMAP_MUX
018e075c
TW		 457static struct omap_board_mux board_mux[] __initdata = {
458 /* nCS and IRQ for Devkit8000 ethernet */
459 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
460 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
461
462 /* McSPI 2*/
463 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
464 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
465 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
466 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
467 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
468
469 /* PENDOWN GPIO */
470 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
471
472 /* mUSB */
473 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
474 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
475 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
476 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
477 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
478 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
479 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
480 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
481 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
482 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
483 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
484 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
485
486 /* USB 1 */
487 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
488 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
489 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
490 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
491 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
492 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
493 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
494 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
495 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
496 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
497 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
498 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
499
500 /* MMC 1 */
501 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
502 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
503 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
504 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
505 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
506 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
507 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
508 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
509 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
510 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
511
512 /* McBSP 2 */
513 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
514 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
515 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
516 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
517
518 /* I2C 1 */
519 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
520 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
521
522 /* I2C 2 */
523 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
524 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
525
526 /* I2C 3 */
527 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
528 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
529
530 /* I2C 4 */
531 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
532 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
533
534 /* serial ports */
535 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
536 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
537 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
538 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
539
540 /* DSS */
541 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
542 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
543 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
544 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
545 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
546 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
547 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
548 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
549 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
550 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
551 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
552 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
553 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
554 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
555 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
556 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
557 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
558 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
559 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
560 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
561 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
562 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
563 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
564 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
565 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
566 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
567 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
568 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
569
570 /* expansion port */
571 /* McSPI 1 */
572 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
573 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
574 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
575 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
576 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
577
578 /* HDQ */
579 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
580
581 /* McSPI4 */
582 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
583 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
584 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
585 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
586
587 /* MMC 2 */
588 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
589 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
590 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
591 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
592
593 /* I2C3 */
594 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
595 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
596
597 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
598 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
599 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
600
601 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
602 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
603
604 /* TPS IRQ */
605 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
606 OMAP_PIN_INPUT_PULLUP),
607
608 { .reg_offset = OMAP_MUX_TERMINATOR },
609};
c7ecea24 610#endif
018e075c 611
476544ca
TW		 612static void __init devkit8000_init(void)
613{
018e075c 614 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
faec32e5 615 omap_serial_init();
a4ca9dbe
TL		 616 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
617 mt46h32m32lf6_sdrc_params);
faec32e5
TW		 618
619 omap_dm9000_init();
620
3b972bf0 621 omap_hsmmc_init(mmc);
476544ca 622 devkit8000_i2c_init();
46a0a540 623 omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ);
476544ca
TW		 624 platform_add_devices(devkit8000_devices,
625 ARRAY_SIZE(devkit8000_devices));
476544ca 626
d5e13227 627 omap_display_init(&devkit8000_dss_data);
476544ca 628
96974a24 629 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
476544ca 630
51482be9 631 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
9e18630b 632 usb_musb_init(NULL);
9e64bb1e 633 usbhs_init(&usbhs_bdata);
2e618261
AM		 634 board_nand_init(devkit8000_nand_partitions,
635 ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
636 NAND_BUSWIDTH_16, NULL);
40234bf7 637 omap_twl4030_audio_init("omap3beagle", NULL);
476544ca
TW		 638
639 /* Ensure SDRC pins are mux'd for self-refresh */
3cdc6ee5
TW		 640 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
641 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
476544ca
TW		 642}
643
476544ca 644MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
5e52b435 645 .atag_offset = 0x100,
71ee7dad 646 .reserve = omap_reserve,
3dc3bad6 647 .map_io = omap3_map_io,
8f5b5a41 648 .init_early = omap35xx_init_early,
be732460 649 .init_irq = omap3_init_irq,
6b2f55d7 650 .handle_irq = omap3_intc_handle_irq,
476544ca 651 .init_machine = devkit8000_init,
bbd707ac 652 .init_late = omap35xx_init_late,
6bb27d73 653 .init_time = omap3_secure_sync32k_timer_init,
187e3e06 654 .restart = omap3xxx_restart,
476544ca 655MACHINE_END
Linux kernel - Deliverables
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