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476544ca TW |
1 | /* |
2 | * board-devkit8000.c - TimLL Devkit8000 | |
3 | * | |
4 | * Copyright (C) 2009 Kim Botherway | |
5 | * Copyright (C) 2010 Thomas Weber | |
6 | * | |
7 | * Modified from mach-omap2/board-omap3beagle.c | |
8 | * | |
9 | * Initial code: Syed Mohammed Khasim | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/leds.h> | |
24 | #include <linux/gpio.h> | |
25 | #include <linux/input.h> | |
26 | #include <linux/gpio_keys.h> | |
27 | ||
28 | #include <linux/mtd/mtd.h> | |
29 | #include <linux/mtd/partitions.h> | |
30 | #include <linux/mtd/nand.h> | |
3a63833e | 31 | #include <linux/mmc/host.h> |
476544ca TW |
32 | |
33 | #include <linux/regulator/machine.h> | |
34 | #include <linux/i2c/twl.h> | |
35 | ||
36 | #include <mach/hardware.h> | |
f535daed | 37 | #include <mach/id.h> |
476544ca TW |
38 | #include <asm/mach-types.h> |
39 | #include <asm/mach/arch.h> | |
40 | #include <asm/mach/map.h> | |
41 | #include <asm/mach/flash.h> | |
42 | ||
43 | #include <plat/board.h> | |
44 | #include <plat/common.h> | |
45 | #include <plat/gpmc.h> | |
46 | #include <plat/nand.h> | |
47 | #include <plat/usb.h> | |
476544ca | 48 | #include <plat/display.h> |
89747c91 | 49 | #include <plat/panel-generic-dpi.h> |
476544ca TW |
50 | |
51 | #include <plat/mcspi.h> | |
52 | #include <linux/input/matrix_keypad.h> | |
53 | #include <linux/spi/spi.h> | |
54 | #include <linux/spi/ads7846.h> | |
476544ca TW |
55 | #include <linux/dm9000.h> |
56 | #include <linux/interrupt.h> | |
57 | ||
58 | #include "sdram-micron-mt46h32m32lf-6.h" | |
59 | ||
60 | #include "mux.h" | |
61 | #include "hsmmc.h" | |
04aeae77 | 62 | #include "timer-gp.h" |
476544ca | 63 | |
476544ca TW |
64 | #define NAND_BLOCK_SIZE SZ_128K |
65 | ||
66 | #define OMAP_DM9000_GPIO_IRQ 25 | |
67 | #define OMAP3_DEVKIT_TS_GPIO 27 | |
68 | ||
69 | static struct mtd_partition devkit8000_nand_partitions[] = { | |
70 | /* All the partition sizes are listed in terms of NAND block size */ | |
71 | { | |
72 | .name = "X-Loader", | |
73 | .offset = 0, | |
74 | .size = 4 * NAND_BLOCK_SIZE, | |
75 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
76 | }, | |
77 | { | |
78 | .name = "U-Boot", | |
79 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
80 | .size = 15 * NAND_BLOCK_SIZE, | |
81 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
82 | }, | |
83 | { | |
84 | .name = "U-Boot Env", | |
85 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ | |
86 | .size = 1 * NAND_BLOCK_SIZE, | |
87 | }, | |
88 | { | |
89 | .name = "Kernel", | |
90 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | |
91 | .size = 32 * NAND_BLOCK_SIZE, | |
92 | }, | |
93 | { | |
94 | .name = "File System", | |
95 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ | |
96 | .size = MTDPART_SIZ_FULL, | |
97 | }, | |
98 | }; | |
99 | ||
100 | static struct omap_nand_platform_data devkit8000_nand_data = { | |
101 | .options = NAND_BUSWIDTH_16, | |
102 | .parts = devkit8000_nand_partitions, | |
103 | .nr_parts = ARRAY_SIZE(devkit8000_nand_partitions), | |
104 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | |
105 | }; | |
106 | ||
476544ca TW |
107 | static struct omap2_hsmmc_info mmc[] = { |
108 | { | |
109 | .mmc = 1, | |
3a63833e | 110 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
476544ca TW |
111 | .gpio_wp = 29, |
112 | }, | |
113 | {} /* Terminator */ | |
114 | }; | |
476544ca TW |
115 | |
116 | static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) | |
117 | { | |
09c0721e | 118 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 119 | gpio_set_value_cansleep(dssdev->reset_gpio, 1); |
476544ca TW |
120 | return 0; |
121 | } | |
122 | ||
123 | static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev) | |
124 | { | |
09c0721e | 125 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 126 | gpio_set_value_cansleep(dssdev->reset_gpio, 0); |
476544ca | 127 | } |
31c73f74 | 128 | |
476544ca TW |
129 | static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev) |
130 | { | |
09c0721e | 131 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 132 | gpio_set_value_cansleep(dssdev->reset_gpio, 1); |
476544ca TW |
133 | return 0; |
134 | } | |
135 | ||
136 | static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) | |
137 | { | |
09c0721e | 138 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 139 | gpio_set_value_cansleep(dssdev->reset_gpio, 0); |
476544ca TW |
140 | } |
141 | ||
1f489f9e | 142 | static struct regulator_consumer_supply devkit8000_vmmc1_supply = |
0005ae73 | 143 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); |
1f489f9e | 144 | |
476544ca | 145 | |
5fd58b51 | 146 | /* ads7846 on SPI */ |
1f489f9e TW |
147 | static struct regulator_consumer_supply devkit8000_vio_supply = |
148 | REGULATOR_SUPPLY("vcc", "spi2.0"); | |
476544ca | 149 | |
89747c91 BW |
150 | static struct panel_generic_dpi_data lcd_panel = { |
151 | .name = "generic", | |
152 | .platform_enable = devkit8000_panel_enable_lcd, | |
153 | .platform_disable = devkit8000_panel_disable_lcd, | |
154 | }; | |
155 | ||
476544ca TW |
156 | static struct omap_dss_device devkit8000_lcd_device = { |
157 | .name = "lcd", | |
476544ca | 158 | .type = OMAP_DISPLAY_TYPE_DPI, |
89747c91 BW |
159 | .driver_name = "generic_dpi_panel", |
160 | .data = &lcd_panel, | |
476544ca | 161 | .phy.dpi.data_lines = 24, |
476544ca | 162 | }; |
89747c91 BW |
163 | |
164 | static struct panel_generic_dpi_data dvi_panel = { | |
165 | .name = "generic", | |
166 | .platform_enable = devkit8000_panel_enable_dvi, | |
167 | .platform_disable = devkit8000_panel_disable_dvi, | |
168 | }; | |
169 | ||
476544ca TW |
170 | static struct omap_dss_device devkit8000_dvi_device = { |
171 | .name = "dvi", | |
476544ca | 172 | .type = OMAP_DISPLAY_TYPE_DPI, |
89747c91 BW |
173 | .driver_name = "generic_dpi_panel", |
174 | .data = &dvi_panel, | |
476544ca | 175 | .phy.dpi.data_lines = 24, |
476544ca TW |
176 | }; |
177 | ||
178 | static struct omap_dss_device devkit8000_tv_device = { | |
179 | .name = "tv", | |
180 | .driver_name = "venc", | |
181 | .type = OMAP_DISPLAY_TYPE_VENC, | |
182 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
476544ca TW |
183 | }; |
184 | ||
185 | ||
186 | static struct omap_dss_device *devkit8000_dss_devices[] = { | |
187 | &devkit8000_lcd_device, | |
188 | &devkit8000_dvi_device, | |
189 | &devkit8000_tv_device, | |
190 | }; | |
191 | ||
192 | static struct omap_dss_board_info devkit8000_dss_data = { | |
193 | .num_devices = ARRAY_SIZE(devkit8000_dss_devices), | |
194 | .devices = devkit8000_dss_devices, | |
195 | .default_device = &devkit8000_lcd_device, | |
196 | }; | |
197 | ||
1f489f9e TW |
198 | static struct regulator_consumer_supply devkit8000_vdda_dac_supply = |
199 | REGULATOR_SUPPLY("vdda_dac", "omapdss"); | |
476544ca | 200 | |
bead4375 | 201 | static uint32_t board_keymap[] = { |
476544ca TW |
202 | KEY(0, 0, KEY_1), |
203 | KEY(1, 0, KEY_2), | |
204 | KEY(2, 0, KEY_3), | |
205 | KEY(0, 1, KEY_4), | |
206 | KEY(1, 1, KEY_5), | |
207 | KEY(2, 1, KEY_6), | |
208 | KEY(3, 1, KEY_F5), | |
209 | KEY(0, 2, KEY_7), | |
210 | KEY(1, 2, KEY_8), | |
211 | KEY(2, 2, KEY_9), | |
212 | KEY(3, 2, KEY_F6), | |
213 | KEY(0, 3, KEY_F7), | |
214 | KEY(1, 3, KEY_0), | |
215 | KEY(2, 3, KEY_F8), | |
216 | PERSISTENT_KEY(4, 5), | |
217 | KEY(4, 4, KEY_VOLUMEUP), | |
218 | KEY(5, 5, KEY_VOLUMEDOWN), | |
219 | 0 | |
220 | }; | |
221 | ||
222 | static struct matrix_keymap_data board_map_data = { | |
223 | .keymap = board_keymap, | |
224 | .keymap_size = ARRAY_SIZE(board_keymap), | |
225 | }; | |
226 | ||
227 | static struct twl4030_keypad_data devkit8000_kp_data = { | |
228 | .keymap_data = &board_map_data, | |
229 | .rows = 6, | |
230 | .cols = 6, | |
231 | .rep = 1, | |
232 | }; | |
233 | ||
234 | static struct gpio_led gpio_leds[]; | |
235 | ||
236 | static int devkit8000_twl_gpio_setup(struct device *dev, | |
237 | unsigned gpio, unsigned ngpio) | |
238 | { | |
daf7aabc TW |
239 | int ret; |
240 | ||
476544ca TW |
241 | omap_mux_init_gpio(29, OMAP_PIN_INPUT); |
242 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | |
243 | mmc[0].gpio_cd = gpio + 0; | |
244 | omap2_hsmmc_init(mmc); | |
245 | ||
31c73f74 KRC |
246 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ |
247 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | |
248 | ||
daf7aabc TW |
249 | /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ |
250 | devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; | |
251 | ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, | |
252 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN"); | |
253 | if (ret < 0) { | |
254 | devkit8000_lcd_device.reset_gpio = -EINVAL; | |
255 | printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); | |
256 | } | |
40986098 | 257 | |
31c73f74 KRC |
258 | /* gpio + 7 is "DVI_PD" (out, active low) */ |
259 | devkit8000_dvi_device.reset_gpio = gpio + 7; | |
daf7aabc TW |
260 | ret = gpio_request_one(devkit8000_dvi_device.reset_gpio, |
261 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown"); | |
262 | if (ret < 0) { | |
263 | devkit8000_dvi_device.reset_gpio = -EINVAL; | |
264 | printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n"); | |
265 | } | |
31c73f74 | 266 | |
476544ca TW |
267 | return 0; |
268 | } | |
269 | ||
270 | static struct twl4030_gpio_platform_data devkit8000_gpio_data = { | |
271 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
272 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
273 | .irq_end = TWL4030_GPIO_IRQ_END, | |
274 | .use_leds = true, | |
35a78fa4 | 275 | .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13) |
476544ca TW |
276 | | BIT(15) | BIT(16) | BIT(17), |
277 | .setup = devkit8000_twl_gpio_setup, | |
278 | }; | |
279 | ||
1f489f9e TW |
280 | static struct regulator_consumer_supply devkit8000_vpll1_supply = |
281 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"); | |
476544ca TW |
282 | |
283 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | |
284 | static struct regulator_init_data devkit8000_vmmc1 = { | |
285 | .constraints = { | |
286 | .min_uV = 1850000, | |
287 | .max_uV = 3150000, | |
288 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
289 | | REGULATOR_MODE_STANDBY, | |
290 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
291 | | REGULATOR_CHANGE_MODE | |
292 | | REGULATOR_CHANGE_STATUS, | |
293 | }, | |
294 | .num_consumer_supplies = 1, | |
295 | .consumer_supplies = &devkit8000_vmmc1_supply, | |
296 | }; | |
297 | ||
476544ca TW |
298 | /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ |
299 | static struct regulator_init_data devkit8000_vdac = { | |
300 | .constraints = { | |
301 | .min_uV = 1800000, | |
302 | .max_uV = 1800000, | |
303 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
304 | | REGULATOR_MODE_STANDBY, | |
305 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
306 | | REGULATOR_CHANGE_STATUS, | |
307 | }, | |
308 | .num_consumer_supplies = 1, | |
309 | .consumer_supplies = &devkit8000_vdda_dac_supply, | |
310 | }; | |
311 | ||
5fd58b51 TW |
312 | /* VPLL1 for digital video outputs */ |
313 | static struct regulator_init_data devkit8000_vpll1 = { | |
476544ca | 314 | .constraints = { |
476544ca TW |
315 | .min_uV = 1800000, |
316 | .max_uV = 1800000, | |
317 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
318 | | REGULATOR_MODE_STANDBY, | |
319 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
320 | | REGULATOR_CHANGE_STATUS, | |
321 | }, | |
1f489f9e TW |
322 | .num_consumer_supplies = 1, |
323 | .consumer_supplies = &devkit8000_vpll1_supply, | |
5fd58b51 TW |
324 | }; |
325 | ||
326 | /* VAUX4 for ads7846 and nubs */ | |
327 | static struct regulator_init_data devkit8000_vio = { | |
328 | .constraints = { | |
329 | .min_uV = 1800000, | |
330 | .max_uV = 1800000, | |
331 | .apply_uV = true, | |
332 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
333 | | REGULATOR_MODE_STANDBY, | |
334 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
335 | | REGULATOR_CHANGE_STATUS, | |
336 | }, | |
1f489f9e TW |
337 | .num_consumer_supplies = 1, |
338 | .consumer_supplies = &devkit8000_vio_supply, | |
476544ca TW |
339 | }; |
340 | ||
341 | static struct twl4030_usb_data devkit8000_usb_data = { | |
342 | .usb_mode = T2_USB_MODE_ULPI, | |
343 | }; | |
344 | ||
6a58baf8 | 345 | static struct twl4030_codec_audio_data devkit8000_audio_data; |
476544ca TW |
346 | |
347 | static struct twl4030_codec_data devkit8000_codec_data = { | |
348 | .audio_mclk = 26000000, | |
349 | .audio = &devkit8000_audio_data, | |
350 | }; | |
351 | ||
352 | static struct twl4030_platform_data devkit8000_twldata = { | |
353 | .irq_base = TWL4030_IRQ_BASE, | |
354 | .irq_end = TWL4030_IRQ_END, | |
355 | ||
356 | /* platform_data for children goes here */ | |
357 | .usb = &devkit8000_usb_data, | |
358 | .gpio = &devkit8000_gpio_data, | |
359 | .codec = &devkit8000_codec_data, | |
360 | .vmmc1 = &devkit8000_vmmc1, | |
476544ca | 361 | .vdac = &devkit8000_vdac, |
5fd58b51 TW |
362 | .vpll1 = &devkit8000_vpll1, |
363 | .vio = &devkit8000_vio, | |
476544ca TW |
364 | .keypad = &devkit8000_kp_data, |
365 | }; | |
366 | ||
367 | static struct i2c_board_info __initdata devkit8000_i2c_boardinfo[] = { | |
368 | { | |
0cbe70ee | 369 | I2C_BOARD_INFO("tps65930", 0x48), |
476544ca TW |
370 | .flags = I2C_CLIENT_WAKE, |
371 | .irq = INT_34XX_SYS_NIRQ, | |
372 | .platform_data = &devkit8000_twldata, | |
373 | }, | |
374 | }; | |
375 | ||
376 | static int __init devkit8000_i2c_init(void) | |
377 | { | |
378 | omap_register_i2c_bus(1, 2600, devkit8000_i2c_boardinfo, | |
379 | ARRAY_SIZE(devkit8000_i2c_boardinfo)); | |
380 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | |
381 | * projector don't work reliably with 400kHz */ | |
382 | omap_register_i2c_bus(3, 400, NULL, 0); | |
383 | return 0; | |
384 | } | |
385 | ||
386 | static struct gpio_led gpio_leds[] = { | |
387 | { | |
388 | .name = "led1", | |
389 | .default_trigger = "heartbeat", | |
390 | .gpio = 186, | |
391 | .active_low = true, | |
392 | }, | |
393 | { | |
394 | .name = "led2", | |
395 | .default_trigger = "mmc0", | |
396 | .gpio = 163, | |
397 | .active_low = true, | |
398 | }, | |
399 | { | |
400 | .name = "ledB", | |
401 | .default_trigger = "none", | |
402 | .gpio = 153, | |
403 | .active_low = true, | |
404 | }, | |
405 | { | |
406 | .name = "led3", | |
407 | .default_trigger = "none", | |
408 | .gpio = 164, | |
409 | .active_low = true, | |
410 | }, | |
411 | }; | |
412 | ||
413 | static struct gpio_led_platform_data gpio_led_info = { | |
414 | .leds = gpio_leds, | |
415 | .num_leds = ARRAY_SIZE(gpio_leds), | |
416 | }; | |
417 | ||
418 | static struct platform_device leds_gpio = { | |
419 | .name = "leds-gpio", | |
420 | .id = -1, | |
421 | .dev = { | |
422 | .platform_data = &gpio_led_info, | |
423 | }, | |
424 | }; | |
425 | ||
426 | static struct gpio_keys_button gpio_buttons[] = { | |
427 | { | |
428 | .code = BTN_EXTRA, | |
429 | .gpio = 26, | |
430 | .desc = "user", | |
431 | .wakeup = 1, | |
432 | }, | |
433 | }; | |
434 | ||
435 | static struct gpio_keys_platform_data gpio_key_info = { | |
436 | .buttons = gpio_buttons, | |
437 | .nbuttons = ARRAY_SIZE(gpio_buttons), | |
438 | }; | |
439 | ||
440 | static struct platform_device keys_gpio = { | |
441 | .name = "gpio-keys", | |
442 | .id = -1, | |
443 | .dev = { | |
444 | .platform_data = &gpio_key_info, | |
445 | }, | |
446 | }; | |
447 | ||
448 | ||
3dc3bad6 | 449 | static void __init devkit8000_init_early(void) |
476544ca | 450 | { |
4805734b PW |
451 | omap2_init_common_infrastructure(); |
452 | omap2_init_common_devices(mt46h32m32lf6_sdrc_params, | |
453 | mt46h32m32lf6_sdrc_params); | |
3dc3bad6 RKAL |
454 | } |
455 | ||
456 | static void __init devkit8000_init_irq(void) | |
457 | { | |
476544ca TW |
458 | omap_init_irq(); |
459 | #ifdef CONFIG_OMAP_32K_TIMER | |
460 | omap2_gp_clockevent_set_gptimer(12); | |
461 | #endif | |
476544ca TW |
462 | } |
463 | ||
464 | static void __init devkit8000_ads7846_init(void) | |
465 | { | |
466 | int gpio = OMAP3_DEVKIT_TS_GPIO; | |
467 | int ret; | |
468 | ||
469 | ret = gpio_request(gpio, "ads7846_pen_down"); | |
470 | if (ret < 0) { | |
471 | printk(KERN_ERR "Failed to request GPIO %d for " | |
472 | "ads7846 pen down IRQ\n", gpio); | |
473 | return; | |
474 | } | |
475 | ||
476 | gpio_direction_input(gpio); | |
477 | } | |
478 | ||
479 | static int ads7846_get_pendown_state(void) | |
480 | { | |
481 | return !gpio_get_value(OMAP3_DEVKIT_TS_GPIO); | |
482 | } | |
483 | ||
484 | static struct ads7846_platform_data ads7846_config = { | |
485 | .x_max = 0x0fff, | |
486 | .y_max = 0x0fff, | |
487 | .x_plate_ohms = 180, | |
488 | .pressure_max = 255, | |
489 | .debounce_max = 10, | |
490 | .debounce_tol = 5, | |
491 | .debounce_rep = 1, | |
492 | .get_pendown_state = ads7846_get_pendown_state, | |
493 | .keep_vref_on = 1, | |
494 | .settle_delay_usecs = 150, | |
495 | }; | |
496 | ||
497 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | |
498 | .turbo_mode = 0, | |
499 | .single_channel = 1, /* 0: slave, 1: master */ | |
500 | }; | |
501 | ||
502 | static struct spi_board_info devkit8000_spi_board_info[] __initdata = { | |
503 | { | |
504 | .modalias = "ads7846", | |
505 | .bus_num = 2, | |
506 | .chip_select = 0, | |
507 | .max_speed_hz = 1500000, | |
508 | .controller_data = &ads7846_mcspi_config, | |
509 | .irq = OMAP_GPIO_IRQ(OMAP3_DEVKIT_TS_GPIO), | |
510 | .platform_data = &ads7846_config, | |
511 | } | |
512 | }; | |
513 | ||
514 | #define OMAP_DM9000_BASE 0x2c000000 | |
515 | ||
516 | static struct resource omap_dm9000_resources[] = { | |
517 | [0] = { | |
518 | .start = OMAP_DM9000_BASE, | |
519 | .end = (OMAP_DM9000_BASE + 0x4 - 1), | |
520 | .flags = IORESOURCE_MEM, | |
521 | }, | |
522 | [1] = { | |
523 | .start = (OMAP_DM9000_BASE + 0x400), | |
524 | .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1), | |
525 | .flags = IORESOURCE_MEM, | |
526 | }, | |
527 | [2] = { | |
528 | .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ), | |
529 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
530 | }, | |
531 | }; | |
532 | ||
533 | static struct dm9000_plat_data omap_dm9000_platdata = { | |
534 | .flags = DM9000_PLATF_16BITONLY, | |
535 | }; | |
536 | ||
537 | static struct platform_device omap_dm9000_dev = { | |
538 | .name = "dm9000", | |
539 | .id = -1, | |
540 | .num_resources = ARRAY_SIZE(omap_dm9000_resources), | |
541 | .resource = omap_dm9000_resources, | |
542 | .dev = { | |
543 | .platform_data = &omap_dm9000_platdata, | |
544 | }, | |
545 | }; | |
546 | ||
547 | static void __init omap_dm9000_init(void) | |
548 | { | |
f535daed KRC |
549 | unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; |
550 | struct omap_die_id odi; | |
551 | ||
476544ca TW |
552 | if (gpio_request(OMAP_DM9000_GPIO_IRQ, "dm9000 irq") < 0) { |
553 | printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", | |
554 | OMAP_DM9000_GPIO_IRQ); | |
555 | return; | |
556 | } | |
557 | ||
558 | gpio_direction_input(OMAP_DM9000_GPIO_IRQ); | |
f535daed KRC |
559 | |
560 | /* init the mac address using DIE id */ | |
561 | omap_get_die_id(&odi); | |
562 | ||
563 | eth_addr[0] = 0x02; /* locally administered */ | |
564 | eth_addr[1] = odi.id_1 & 0xff; | |
565 | eth_addr[2] = (odi.id_0 & 0xff000000) >> 24; | |
566 | eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16; | |
567 | eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8; | |
568 | eth_addr[5] = (odi.id_0 & 0x000000ff); | |
476544ca TW |
569 | } |
570 | ||
571 | static struct platform_device *devkit8000_devices[] __initdata = { | |
476544ca TW |
572 | &leds_gpio, |
573 | &keys_gpio, | |
574 | &omap_dm9000_dev, | |
575 | }; | |
576 | ||
577 | static void __init devkit8000_flash_init(void) | |
578 | { | |
579 | u8 cs = 0; | |
580 | u8 nandcs = GPMC_CS_NUM + 1; | |
581 | ||
476544ca TW |
582 | /* find out the chip-select on which NAND exists */ |
583 | while (cs < GPMC_CS_NUM) { | |
584 | u32 ret = 0; | |
585 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | |
586 | ||
587 | if ((ret & 0xC00) == 0x800) { | |
588 | printk(KERN_INFO "Found NAND on CS%d\n", cs); | |
589 | if (nandcs > GPMC_CS_NUM) | |
590 | nandcs = cs; | |
591 | } | |
592 | cs++; | |
593 | } | |
594 | ||
595 | if (nandcs > GPMC_CS_NUM) { | |
596 | printk(KERN_INFO "NAND: Unable to find configuration " | |
597 | "in GPMC\n "); | |
598 | return; | |
599 | } | |
600 | ||
601 | if (nandcs < GPMC_CS_NUM) { | |
602 | devkit8000_nand_data.cs = nandcs; | |
476544ca TW |
603 | |
604 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | |
f450d867 | 605 | if (gpmc_nand_init(&devkit8000_nand_data) < 0) |
476544ca TW |
606 | printk(KERN_ERR "Unable to register NAND device\n"); |
607 | } | |
608 | } | |
609 | ||
884b8369 MM |
610 | static struct omap_musb_board_data musb_board_data = { |
611 | .interface_type = MUSB_INTERFACE_ULPI, | |
612 | .mode = MUSB_OTG, | |
613 | .power = 100, | |
614 | }; | |
615 | ||
6f69a181 | 616 | static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { |
476544ca TW |
617 | |
618 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | |
2135bb53 | 619 | .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, |
476544ca TW |
620 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, |
621 | ||
622 | .phy_reset = true, | |
623 | .reset_gpio_port[0] = -EINVAL, | |
2135bb53 | 624 | .reset_gpio_port[1] = -EINVAL, |
476544ca TW |
625 | .reset_gpio_port[2] = -EINVAL |
626 | }; | |
627 | ||
018e075c TW |
628 | static struct omap_board_mux board_mux[] __initdata = { |
629 | /* nCS and IRQ for Devkit8000 ethernet */ | |
630 | OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0), | |
631 | OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), | |
632 | ||
633 | /* McSPI 2*/ | |
634 | OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
635 | OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
636 | OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
637 | OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
638 | OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
639 | ||
640 | /* PENDOWN GPIO */ | |
641 | OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
642 | ||
643 | /* mUSB */ | |
644 | OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
645 | OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
646 | OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
647 | OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
648 | OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
649 | OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
650 | OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
651 | OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
652 | OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
653 | OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
654 | OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
655 | OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
656 | ||
657 | /* USB 1 */ | |
658 | OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
659 | OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT), | |
660 | OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
661 | OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
662 | OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
663 | OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
664 | OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
665 | OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
666 | OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
667 | OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
668 | OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
669 | OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
670 | ||
671 | /* MMC 1 */ | |
672 | OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
673 | OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
674 | OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
675 | OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
676 | OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
677 | OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
678 | OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
679 | OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
680 | OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
681 | OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
682 | ||
683 | /* McBSP 2 */ | |
684 | OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
685 | OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
686 | OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
687 | OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
688 | ||
689 | /* I2C 1 */ | |
690 | OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
691 | OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
692 | ||
693 | /* I2C 2 */ | |
694 | OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
695 | OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
696 | ||
697 | /* I2C 3 */ | |
698 | OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
699 | OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
700 | ||
701 | /* I2C 4 */ | |
702 | OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
703 | OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
704 | ||
705 | /* serial ports */ | |
706 | OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
707 | OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
708 | OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
709 | OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
710 | ||
711 | /* DSS */ | |
712 | OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
713 | OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
714 | OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
715 | OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
716 | OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
717 | OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
718 | OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
719 | OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
720 | OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
721 | OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
722 | OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
723 | OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
724 | OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
725 | OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
726 | OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
727 | OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
728 | OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
729 | OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
730 | OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
731 | OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
732 | OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
733 | OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
734 | OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
735 | OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
736 | OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
737 | OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
738 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
739 | OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
740 | ||
741 | /* expansion port */ | |
742 | /* McSPI 1 */ | |
743 | OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
744 | OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
745 | OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
746 | OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
747 | OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
748 | ||
749 | /* HDQ */ | |
750 | OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
751 | ||
752 | /* McSPI4 */ | |
753 | OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
754 | OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
755 | OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
756 | OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP), | |
757 | ||
758 | /* MMC 2 */ | |
759 | OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
760 | OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
761 | OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
762 | OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
763 | ||
764 | /* I2C3 */ | |
765 | OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
766 | OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
767 | ||
768 | OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
769 | OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
770 | OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
771 | ||
772 | OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
773 | OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
774 | ||
775 | /* TPS IRQ */ | |
776 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \ | |
777 | OMAP_PIN_INPUT_PULLUP), | |
778 | ||
779 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
780 | }; | |
781 | ||
476544ca TW |
782 | static void __init devkit8000_init(void) |
783 | { | |
018e075c | 784 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); |
faec32e5 TW |
785 | omap_serial_init(); |
786 | ||
787 | omap_dm9000_init(); | |
788 | ||
476544ca TW |
789 | devkit8000_i2c_init(); |
790 | platform_add_devices(devkit8000_devices, | |
791 | ARRAY_SIZE(devkit8000_devices)); | |
476544ca | 792 | |
d5e13227 | 793 | omap_display_init(&devkit8000_dss_data); |
476544ca TW |
794 | spi_register_board_info(devkit8000_spi_board_info, |
795 | ARRAY_SIZE(devkit8000_spi_board_info)); | |
796 | ||
476544ca TW |
797 | devkit8000_ads7846_init(); |
798 | ||
884b8369 | 799 | usb_musb_init(&musb_board_data); |
476544ca TW |
800 | usb_ehci_init(&ehci_pdata); |
801 | devkit8000_flash_init(); | |
802 | ||
803 | /* Ensure SDRC pins are mux'd for self-refresh */ | |
3cdc6ee5 TW |
804 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
805 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | |
476544ca TW |
806 | } |
807 | ||
476544ca | 808 | MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") |
476544ca | 809 | .boot_params = 0x80000100, |
71ee7dad | 810 | .reserve = omap_reserve, |
3dc3bad6 RKAL |
811 | .map_io = omap3_map_io, |
812 | .init_early = devkit8000_init_early, | |
476544ca TW |
813 | .init_irq = devkit8000_init_irq, |
814 | .init_machine = devkit8000_init, | |
815 | .timer = &omap_timer, | |
816 | MACHINE_END |