Commit | Line | Data |
---|---|---|
476544ca TW |
1 | /* |
2 | * board-devkit8000.c - TimLL Devkit8000 | |
3 | * | |
4 | * Copyright (C) 2009 Kim Botherway | |
5 | * Copyright (C) 2010 Thomas Weber | |
6 | * | |
7 | * Modified from mach-omap2/board-omap3beagle.c | |
8 | * | |
9 | * Initial code: Syed Mohammed Khasim | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/leds.h> | |
24 | #include <linux/gpio.h> | |
25 | #include <linux/input.h> | |
26 | #include <linux/gpio_keys.h> | |
27 | ||
28 | #include <linux/mtd/mtd.h> | |
29 | #include <linux/mtd/partitions.h> | |
30 | #include <linux/mtd/nand.h> | |
3a63833e | 31 | #include <linux/mmc/host.h> |
476544ca TW |
32 | |
33 | #include <linux/regulator/machine.h> | |
34 | #include <linux/i2c/twl.h> | |
35 | ||
36 | #include <mach/hardware.h> | |
f535daed | 37 | #include <mach/id.h> |
476544ca TW |
38 | #include <asm/mach-types.h> |
39 | #include <asm/mach/arch.h> | |
40 | #include <asm/mach/map.h> | |
41 | #include <asm/mach/flash.h> | |
42 | ||
43 | #include <plat/board.h> | |
4e65331c | 44 | #include "common.h" |
476544ca TW |
45 | #include <plat/gpmc.h> |
46 | #include <plat/nand.h> | |
47 | #include <plat/usb.h> | |
a0b38cc4 | 48 | #include <video/omapdss.h> |
f8ae2f08 | 49 | #include <video/omap-panel-generic-dpi.h> |
1d7a8654 | 50 | #include <video/omap-panel-dvi.h> |
476544ca TW |
51 | |
52 | #include <plat/mcspi.h> | |
53 | #include <linux/input/matrix_keypad.h> | |
54 | #include <linux/spi/spi.h> | |
476544ca TW |
55 | #include <linux/dm9000.h> |
56 | #include <linux/interrupt.h> | |
57 | ||
58 | #include "sdram-micron-mt46h32m32lf-6.h" | |
59 | ||
60 | #include "mux.h" | |
61 | #include "hsmmc.h" | |
96974a24 | 62 | #include "common-board-devices.h" |
476544ca | 63 | |
476544ca TW |
64 | #define OMAP_DM9000_GPIO_IRQ 25 |
65 | #define OMAP3_DEVKIT_TS_GPIO 27 | |
66 | ||
67 | static struct mtd_partition devkit8000_nand_partitions[] = { | |
68 | /* All the partition sizes are listed in terms of NAND block size */ | |
69 | { | |
70 | .name = "X-Loader", | |
71 | .offset = 0, | |
72 | .size = 4 * NAND_BLOCK_SIZE, | |
73 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
74 | }, | |
75 | { | |
76 | .name = "U-Boot", | |
77 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
78 | .size = 15 * NAND_BLOCK_SIZE, | |
79 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
80 | }, | |
81 | { | |
82 | .name = "U-Boot Env", | |
83 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ | |
84 | .size = 1 * NAND_BLOCK_SIZE, | |
85 | }, | |
86 | { | |
87 | .name = "Kernel", | |
88 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | |
89 | .size = 32 * NAND_BLOCK_SIZE, | |
90 | }, | |
91 | { | |
92 | .name = "File System", | |
93 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ | |
94 | .size = MTDPART_SIZ_FULL, | |
95 | }, | |
96 | }; | |
97 | ||
476544ca TW |
98 | static struct omap2_hsmmc_info mmc[] = { |
99 | { | |
100 | .mmc = 1, | |
3a63833e | 101 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
476544ca | 102 | .gpio_wp = 29, |
3b972bf0 | 103 | .deferred = true, |
476544ca TW |
104 | }, |
105 | {} /* Terminator */ | |
106 | }; | |
476544ca TW |
107 | |
108 | static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) | |
109 | { | |
09c0721e | 110 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 111 | gpio_set_value_cansleep(dssdev->reset_gpio, 1); |
476544ca TW |
112 | return 0; |
113 | } | |
114 | ||
115 | static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev) | |
116 | { | |
09c0721e | 117 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 118 | gpio_set_value_cansleep(dssdev->reset_gpio, 0); |
476544ca | 119 | } |
31c73f74 | 120 | |
476544ca TW |
121 | static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev) |
122 | { | |
09c0721e | 123 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 124 | gpio_set_value_cansleep(dssdev->reset_gpio, 1); |
476544ca TW |
125 | return 0; |
126 | } | |
127 | ||
128 | static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) | |
129 | { | |
09c0721e | 130 | if (gpio_is_valid(dssdev->reset_gpio)) |
d858addf | 131 | gpio_set_value_cansleep(dssdev->reset_gpio, 0); |
476544ca TW |
132 | } |
133 | ||
786b01a8 OD |
134 | static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { |
135 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
136 | }; | |
476544ca | 137 | |
5fd58b51 | 138 | /* ads7846 on SPI */ |
786b01a8 OD |
139 | static struct regulator_consumer_supply devkit8000_vio_supply[] = { |
140 | REGULATOR_SUPPLY("vcc", "spi2.0"), | |
141 | }; | |
476544ca | 142 | |
89747c91 | 143 | static struct panel_generic_dpi_data lcd_panel = { |
cc11aaf8 | 144 | .name = "innolux_at070tn83", |
89747c91 BW |
145 | .platform_enable = devkit8000_panel_enable_lcd, |
146 | .platform_disable = devkit8000_panel_disable_lcd, | |
147 | }; | |
148 | ||
476544ca TW |
149 | static struct omap_dss_device devkit8000_lcd_device = { |
150 | .name = "lcd", | |
476544ca | 151 | .type = OMAP_DISPLAY_TYPE_DPI, |
89747c91 BW |
152 | .driver_name = "generic_dpi_panel", |
153 | .data = &lcd_panel, | |
476544ca | 154 | .phy.dpi.data_lines = 24, |
476544ca | 155 | }; |
89747c91 | 156 | |
1d7a8654 | 157 | static struct panel_dvi_platform_data dvi_panel = { |
89747c91 BW |
158 | .platform_enable = devkit8000_panel_enable_dvi, |
159 | .platform_disable = devkit8000_panel_disable_dvi, | |
160 | }; | |
161 | ||
476544ca TW |
162 | static struct omap_dss_device devkit8000_dvi_device = { |
163 | .name = "dvi", | |
476544ca | 164 | .type = OMAP_DISPLAY_TYPE_DPI, |
1d7a8654 | 165 | .driver_name = "dvi", |
89747c91 | 166 | .data = &dvi_panel, |
476544ca | 167 | .phy.dpi.data_lines = 24, |
476544ca TW |
168 | }; |
169 | ||
170 | static struct omap_dss_device devkit8000_tv_device = { | |
171 | .name = "tv", | |
172 | .driver_name = "venc", | |
173 | .type = OMAP_DISPLAY_TYPE_VENC, | |
174 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
476544ca TW |
175 | }; |
176 | ||
177 | ||
178 | static struct omap_dss_device *devkit8000_dss_devices[] = { | |
179 | &devkit8000_lcd_device, | |
180 | &devkit8000_dvi_device, | |
181 | &devkit8000_tv_device, | |
182 | }; | |
183 | ||
184 | static struct omap_dss_board_info devkit8000_dss_data = { | |
185 | .num_devices = ARRAY_SIZE(devkit8000_dss_devices), | |
186 | .devices = devkit8000_dss_devices, | |
187 | .default_device = &devkit8000_lcd_device, | |
188 | }; | |
189 | ||
bead4375 | 190 | static uint32_t board_keymap[] = { |
476544ca TW |
191 | KEY(0, 0, KEY_1), |
192 | KEY(1, 0, KEY_2), | |
193 | KEY(2, 0, KEY_3), | |
194 | KEY(0, 1, KEY_4), | |
195 | KEY(1, 1, KEY_5), | |
196 | KEY(2, 1, KEY_6), | |
197 | KEY(3, 1, KEY_F5), | |
198 | KEY(0, 2, KEY_7), | |
199 | KEY(1, 2, KEY_8), | |
200 | KEY(2, 2, KEY_9), | |
201 | KEY(3, 2, KEY_F6), | |
202 | KEY(0, 3, KEY_F7), | |
203 | KEY(1, 3, KEY_0), | |
204 | KEY(2, 3, KEY_F8), | |
205 | PERSISTENT_KEY(4, 5), | |
206 | KEY(4, 4, KEY_VOLUMEUP), | |
207 | KEY(5, 5, KEY_VOLUMEDOWN), | |
208 | 0 | |
209 | }; | |
210 | ||
211 | static struct matrix_keymap_data board_map_data = { | |
212 | .keymap = board_keymap, | |
213 | .keymap_size = ARRAY_SIZE(board_keymap), | |
214 | }; | |
215 | ||
216 | static struct twl4030_keypad_data devkit8000_kp_data = { | |
217 | .keymap_data = &board_map_data, | |
218 | .rows = 6, | |
219 | .cols = 6, | |
220 | .rep = 1, | |
221 | }; | |
222 | ||
223 | static struct gpio_led gpio_leds[]; | |
224 | ||
225 | static int devkit8000_twl_gpio_setup(struct device *dev, | |
226 | unsigned gpio, unsigned ngpio) | |
227 | { | |
daf7aabc TW |
228 | int ret; |
229 | ||
476544ca TW |
230 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
231 | mmc[0].gpio_cd = gpio + 0; | |
3b972bf0 | 232 | omap_hsmmc_late_init(mmc); |
476544ca | 233 | |
31c73f74 KRC |
234 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ |
235 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | |
236 | ||
daf7aabc TW |
237 | /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ |
238 | devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; | |
239 | ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, | |
bc593f5d | 240 | GPIOF_OUT_INIT_LOW, "LCD_PWREN"); |
daf7aabc TW |
241 | if (ret < 0) { |
242 | devkit8000_lcd_device.reset_gpio = -EINVAL; | |
243 | printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); | |
244 | } | |
40986098 | 245 | |
31c73f74 KRC |
246 | /* gpio + 7 is "DVI_PD" (out, active low) */ |
247 | devkit8000_dvi_device.reset_gpio = gpio + 7; | |
daf7aabc | 248 | ret = gpio_request_one(devkit8000_dvi_device.reset_gpio, |
bc593f5d | 249 | GPIOF_OUT_INIT_LOW, "DVI PowerDown"); |
daf7aabc TW |
250 | if (ret < 0) { |
251 | devkit8000_dvi_device.reset_gpio = -EINVAL; | |
252 | printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n"); | |
253 | } | |
31c73f74 | 254 | |
476544ca TW |
255 | return 0; |
256 | } | |
257 | ||
258 | static struct twl4030_gpio_platform_data devkit8000_gpio_data = { | |
259 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
260 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
261 | .irq_end = TWL4030_GPIO_IRQ_END, | |
262 | .use_leds = true, | |
35a78fa4 | 263 | .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13) |
476544ca TW |
264 | | BIT(15) | BIT(16) | BIT(17), |
265 | .setup = devkit8000_twl_gpio_setup, | |
266 | }; | |
267 | ||
c8aac01b SG |
268 | static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = { |
269 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | |
7c68dd96 | 270 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), |
c8aac01b | 271 | }; |
476544ca TW |
272 | |
273 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | |
274 | static struct regulator_init_data devkit8000_vmmc1 = { | |
275 | .constraints = { | |
276 | .min_uV = 1850000, | |
277 | .max_uV = 3150000, | |
278 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
279 | | REGULATOR_MODE_STANDBY, | |
280 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
281 | | REGULATOR_CHANGE_MODE | |
282 | | REGULATOR_CHANGE_STATUS, | |
283 | }, | |
786b01a8 OD |
284 | .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply), |
285 | .consumer_supplies = devkit8000_vmmc1_supply, | |
476544ca TW |
286 | }; |
287 | ||
5fd58b51 TW |
288 | /* VPLL1 for digital video outputs */ |
289 | static struct regulator_init_data devkit8000_vpll1 = { | |
476544ca | 290 | .constraints = { |
476544ca TW |
291 | .min_uV = 1800000, |
292 | .max_uV = 1800000, | |
293 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
294 | | REGULATOR_MODE_STANDBY, | |
295 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
296 | | REGULATOR_CHANGE_STATUS, | |
297 | }, | |
c8aac01b SG |
298 | .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies), |
299 | .consumer_supplies = devkit8000_vpll1_supplies, | |
5fd58b51 TW |
300 | }; |
301 | ||
302 | /* VAUX4 for ads7846 and nubs */ | |
303 | static struct regulator_init_data devkit8000_vio = { | |
304 | .constraints = { | |
305 | .min_uV = 1800000, | |
306 | .max_uV = 1800000, | |
307 | .apply_uV = true, | |
308 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
309 | | REGULATOR_MODE_STANDBY, | |
310 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
311 | | REGULATOR_CHANGE_STATUS, | |
312 | }, | |
786b01a8 OD |
313 | .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), |
314 | .consumer_supplies = devkit8000_vio_supply, | |
476544ca TW |
315 | }; |
316 | ||
476544ca | 317 | static struct twl4030_platform_data devkit8000_twldata = { |
476544ca | 318 | /* platform_data for children goes here */ |
476544ca | 319 | .gpio = &devkit8000_gpio_data, |
476544ca | 320 | .vmmc1 = &devkit8000_vmmc1, |
5fd58b51 TW |
321 | .vpll1 = &devkit8000_vpll1, |
322 | .vio = &devkit8000_vio, | |
476544ca TW |
323 | .keypad = &devkit8000_kp_data, |
324 | }; | |
325 | ||
476544ca TW |
326 | static int __init devkit8000_i2c_init(void) |
327 | { | |
827ed9ae | 328 | omap3_pmic_get_config(&devkit8000_twldata, |
b252b0ef PU |
329 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, |
330 | TWL_COMMON_REGULATOR_VDAC); | |
fbd8071c | 331 | omap3_pmic_init("tps65930", &devkit8000_twldata); |
476544ca TW |
332 | /* Bus 3 is attached to the DVI port where devices like the pico DLP |
333 | * projector don't work reliably with 400kHz */ | |
334 | omap_register_i2c_bus(3, 400, NULL, 0); | |
335 | return 0; | |
336 | } | |
337 | ||
338 | static struct gpio_led gpio_leds[] = { | |
339 | { | |
340 | .name = "led1", | |
341 | .default_trigger = "heartbeat", | |
342 | .gpio = 186, | |
343 | .active_low = true, | |
344 | }, | |
345 | { | |
346 | .name = "led2", | |
347 | .default_trigger = "mmc0", | |
348 | .gpio = 163, | |
349 | .active_low = true, | |
350 | }, | |
351 | { | |
352 | .name = "ledB", | |
353 | .default_trigger = "none", | |
354 | .gpio = 153, | |
355 | .active_low = true, | |
356 | }, | |
357 | { | |
358 | .name = "led3", | |
359 | .default_trigger = "none", | |
360 | .gpio = 164, | |
361 | .active_low = true, | |
362 | }, | |
363 | }; | |
364 | ||
365 | static struct gpio_led_platform_data gpio_led_info = { | |
366 | .leds = gpio_leds, | |
367 | .num_leds = ARRAY_SIZE(gpio_leds), | |
368 | }; | |
369 | ||
370 | static struct platform_device leds_gpio = { | |
371 | .name = "leds-gpio", | |
372 | .id = -1, | |
373 | .dev = { | |
374 | .platform_data = &gpio_led_info, | |
375 | }, | |
376 | }; | |
377 | ||
378 | static struct gpio_keys_button gpio_buttons[] = { | |
379 | { | |
380 | .code = BTN_EXTRA, | |
381 | .gpio = 26, | |
382 | .desc = "user", | |
383 | .wakeup = 1, | |
384 | }, | |
385 | }; | |
386 | ||
387 | static struct gpio_keys_platform_data gpio_key_info = { | |
388 | .buttons = gpio_buttons, | |
389 | .nbuttons = ARRAY_SIZE(gpio_buttons), | |
390 | }; | |
391 | ||
392 | static struct platform_device keys_gpio = { | |
393 | .name = "gpio-keys", | |
394 | .id = -1, | |
395 | .dev = { | |
396 | .platform_data = &gpio_key_info, | |
397 | }, | |
398 | }; | |
399 | ||
476544ca TW |
400 | #define OMAP_DM9000_BASE 0x2c000000 |
401 | ||
402 | static struct resource omap_dm9000_resources[] = { | |
403 | [0] = { | |
404 | .start = OMAP_DM9000_BASE, | |
405 | .end = (OMAP_DM9000_BASE + 0x4 - 1), | |
406 | .flags = IORESOURCE_MEM, | |
407 | }, | |
408 | [1] = { | |
409 | .start = (OMAP_DM9000_BASE + 0x400), | |
410 | .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1), | |
411 | .flags = IORESOURCE_MEM, | |
412 | }, | |
413 | [2] = { | |
476544ca TW |
414 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
415 | }, | |
416 | }; | |
417 | ||
418 | static struct dm9000_plat_data omap_dm9000_platdata = { | |
419 | .flags = DM9000_PLATF_16BITONLY, | |
420 | }; | |
421 | ||
422 | static struct platform_device omap_dm9000_dev = { | |
423 | .name = "dm9000", | |
424 | .id = -1, | |
425 | .num_resources = ARRAY_SIZE(omap_dm9000_resources), | |
426 | .resource = omap_dm9000_resources, | |
427 | .dev = { | |
428 | .platform_data = &omap_dm9000_platdata, | |
429 | }, | |
430 | }; | |
431 | ||
432 | static void __init omap_dm9000_init(void) | |
433 | { | |
f535daed KRC |
434 | unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; |
435 | struct omap_die_id odi; | |
bc593f5d | 436 | int ret; |
f535daed | 437 | |
bc593f5d IG |
438 | ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq"); |
439 | if (ret < 0) { | |
476544ca TW |
440 | printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", |
441 | OMAP_DM9000_GPIO_IRQ); | |
442 | return; | |
bc593f5d | 443 | } |
f535daed KRC |
444 | |
445 | /* init the mac address using DIE id */ | |
446 | omap_get_die_id(&odi); | |
447 | ||
448 | eth_addr[0] = 0x02; /* locally administered */ | |
449 | eth_addr[1] = odi.id_1 & 0xff; | |
450 | eth_addr[2] = (odi.id_0 & 0xff000000) >> 24; | |
451 | eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16; | |
452 | eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8; | |
453 | eth_addr[5] = (odi.id_0 & 0x000000ff); | |
476544ca TW |
454 | } |
455 | ||
456 | static struct platform_device *devkit8000_devices[] __initdata = { | |
476544ca TW |
457 | &leds_gpio, |
458 | &keys_gpio, | |
459 | &omap_dm9000_dev, | |
460 | }; | |
461 | ||
181b250c | 462 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
476544ca | 463 | |
181b250c KM |
464 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
465 | .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, | |
466 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
476544ca TW |
467 | |
468 | .phy_reset = true, | |
469 | .reset_gpio_port[0] = -EINVAL, | |
2135bb53 | 470 | .reset_gpio_port[1] = -EINVAL, |
476544ca TW |
471 | .reset_gpio_port[2] = -EINVAL |
472 | }; | |
473 | ||
c7ecea24 | 474 | #ifdef CONFIG_OMAP_MUX |
018e075c TW |
475 | static struct omap_board_mux board_mux[] __initdata = { |
476 | /* nCS and IRQ for Devkit8000 ethernet */ | |
477 | OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0), | |
478 | OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), | |
479 | ||
480 | /* McSPI 2*/ | |
481 | OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
482 | OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
483 | OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
484 | OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
485 | OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
486 | ||
487 | /* PENDOWN GPIO */ | |
488 | OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
489 | ||
490 | /* mUSB */ | |
491 | OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
492 | OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
493 | OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
494 | OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
495 | OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
496 | OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
497 | OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
498 | OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
499 | OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
500 | OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
501 | OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
502 | OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
503 | ||
504 | /* USB 1 */ | |
505 | OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
506 | OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT), | |
507 | OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
508 | OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
509 | OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
510 | OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
511 | OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
512 | OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
513 | OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
514 | OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
515 | OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
516 | OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), | |
517 | ||
518 | /* MMC 1 */ | |
519 | OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
520 | OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
521 | OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
522 | OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
523 | OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
524 | OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
525 | OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
526 | OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
527 | OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
528 | OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
529 | ||
530 | /* McBSP 2 */ | |
531 | OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
532 | OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
533 | OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
534 | OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
535 | ||
536 | /* I2C 1 */ | |
537 | OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
538 | OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
539 | ||
540 | /* I2C 2 */ | |
541 | OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
542 | OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
543 | ||
544 | /* I2C 3 */ | |
545 | OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
546 | OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
547 | ||
548 | /* I2C 4 */ | |
549 | OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
550 | OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
551 | ||
552 | /* serial ports */ | |
553 | OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
554 | OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
555 | OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
556 | OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
557 | ||
558 | /* DSS */ | |
559 | OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
560 | OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
561 | OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
562 | OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
563 | OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
564 | OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
565 | OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
566 | OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
567 | OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
568 | OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
569 | OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
570 | OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
571 | OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
572 | OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
573 | OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
574 | OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
575 | OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
576 | OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
577 | OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
578 | OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
579 | OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
580 | OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
581 | OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
582 | OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
583 | OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
584 | OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
585 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
586 | OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
587 | ||
588 | /* expansion port */ | |
589 | /* McSPI 1 */ | |
590 | OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
591 | OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
592 | OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
593 | OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
594 | OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | |
595 | ||
596 | /* HDQ */ | |
597 | OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
598 | ||
599 | /* McSPI4 */ | |
600 | OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
601 | OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
602 | OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
603 | OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP), | |
604 | ||
605 | /* MMC 2 */ | |
606 | OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
607 | OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
608 | OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
609 | OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
610 | ||
611 | /* I2C3 */ | |
612 | OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
613 | OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), | |
614 | ||
615 | OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
616 | OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
617 | OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
618 | ||
619 | OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
620 | OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
621 | ||
622 | /* TPS IRQ */ | |
623 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \ | |
624 | OMAP_PIN_INPUT_PULLUP), | |
625 | ||
626 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
627 | }; | |
c7ecea24 | 628 | #endif |
018e075c | 629 | |
476544ca TW |
630 | static void __init devkit8000_init(void) |
631 | { | |
018e075c | 632 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); |
faec32e5 | 633 | omap_serial_init(); |
a4ca9dbe TL |
634 | omap_sdrc_init(mt46h32m32lf6_sdrc_params, |
635 | mt46h32m32lf6_sdrc_params); | |
faec32e5 TW |
636 | |
637 | omap_dm9000_init(); | |
638 | ||
3b972bf0 | 639 | omap_hsmmc_init(mmc); |
476544ca | 640 | devkit8000_i2c_init(); |
46a0a540 | 641 | omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ); |
476544ca TW |
642 | platform_add_devices(devkit8000_devices, |
643 | ARRAY_SIZE(devkit8000_devices)); | |
476544ca | 644 | |
d5e13227 | 645 | omap_display_init(&devkit8000_dss_data); |
476544ca | 646 | |
96974a24 | 647 | omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL); |
476544ca | 648 | |
9e18630b | 649 | usb_musb_init(NULL); |
9e64bb1e | 650 | usbhs_init(&usbhs_bdata); |
9a3f39ff MR |
651 | omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions, |
652 | ARRAY_SIZE(devkit8000_nand_partitions)); | |
476544ca TW |
653 | |
654 | /* Ensure SDRC pins are mux'd for self-refresh */ | |
3cdc6ee5 TW |
655 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
656 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | |
476544ca TW |
657 | } |
658 | ||
476544ca | 659 | MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") |
5e52b435 | 660 | .atag_offset = 0x100, |
71ee7dad | 661 | .reserve = omap_reserve, |
3dc3bad6 | 662 | .map_io = omap3_map_io, |
8f5b5a41 | 663 | .init_early = omap35xx_init_early, |
be732460 | 664 | .init_irq = omap3_init_irq, |
6b2f55d7 | 665 | .handle_irq = omap3_intc_handle_irq, |
476544ca | 666 | .init_machine = devkit8000_init, |
e74984e4 | 667 | .timer = &omap3_secure_timer, |
baa95883 | 668 | .restart = omap_prcm_restart, |
476544ca | 669 | MACHINE_END |