projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
omap: musb: introduce default board config
[deliverable/linux.git] / arch / arm / mach-omap2 / board-devkit8000.c
CommitLineData
476544ca
TW		 1/*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/leds.h>
24#include <linux/gpio.h>
25#include <linux/input.h>
26#include <linux/gpio_keys.h>
27
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand.h>
3a63833e 31#include <linux/mmc/host.h>
476544ca
TW		 32
33#include <linux/regulator/machine.h>
34#include <linux/i2c/twl.h>
35
36#include <mach/hardware.h>
f535daed 37#include <mach/id.h>
476544ca
TW		 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/flash.h>
42
43#include <plat/board.h>
44#include <plat/common.h>
45#include <plat/gpmc.h>
46#include <plat/nand.h>
47#include <plat/usb.h>
476544ca 48#include <plat/display.h>
89747c91 49#include <plat/panel-generic-dpi.h>
476544ca
TW		 50
51#include <plat/mcspi.h>
52#include <linux/input/matrix_keypad.h>
53#include <linux/spi/spi.h>
476544ca
TW		 54#include <linux/dm9000.h>
55#include <linux/interrupt.h>
56
57#include "sdram-micron-mt46h32m32lf-6.h"
58
59#include "mux.h"
60#include "hsmmc.h"
04aeae77 61#include "timer-gp.h"
96974a24 62#include "common-board-devices.h"
476544ca 63
476544ca
TW		 64#define NAND_BLOCK_SIZE SZ_128K
65
66#define OMAP_DM9000_GPIO_IRQ 25
67#define OMAP3_DEVKIT_TS_GPIO 27
68
69static struct mtd_partition devkit8000_nand_partitions[] = {
70 /* All the partition sizes are listed in terms of NAND block size */
71 {
72 .name = "X-Loader",
73 .offset = 0,
74 .size = 4 * NAND_BLOCK_SIZE,
75 .mask_flags = MTD_WRITEABLE, /* force read-only */
76 },
77 {
78 .name = "U-Boot",
79 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
80 .size = 15 * NAND_BLOCK_SIZE,
81 .mask_flags = MTD_WRITEABLE, /* force read-only */
82 },
83 {
84 .name = "U-Boot Env",
85 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
86 .size = 1 * NAND_BLOCK_SIZE,
87 },
88 {
89 .name = "Kernel",
90 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
91 .size = 32 * NAND_BLOCK_SIZE,
92 },
93 {
94 .name = "File System",
95 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
96 .size = MTDPART_SIZ_FULL,
97 },
98};
99
476544ca
TW		 100static struct omap2_hsmmc_info mmc[] = {
101 {
102 .mmc = 1,
3a63833e 103 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
476544ca
TW		 104 .gpio_wp = 29,
105 },
106 {} /* Terminator */
107};
476544ca
TW		 108
109static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
110{
09c0721e 111 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 112 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
476544ca
TW		 113 return 0;
114}
115
116static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
117{
09c0721e 118 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 119 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
476544ca 120}
31c73f74 121
476544ca
TW		 122static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
123{
09c0721e 124 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 125 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
476544ca
TW		 126 return 0;
127}
128
129static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
130{
09c0721e 131 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 132 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
476544ca
TW		 133}
134
1f489f9e 135static struct regulator_consumer_supply devkit8000_vmmc1_supply =
0005ae73 136 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
1f489f9e 137
476544ca 138
5fd58b51 139/* ads7846 on SPI */
1f489f9e
TW		 140static struct regulator_consumer_supply devkit8000_vio_supply =
141 REGULATOR_SUPPLY("vcc", "spi2.0");
476544ca 142
89747c91
BW		 143static struct panel_generic_dpi_data lcd_panel = {
144 .name = "generic",
145 .platform_enable = devkit8000_panel_enable_lcd,
146 .platform_disable = devkit8000_panel_disable_lcd,
147};
148
476544ca
TW		 149static struct omap_dss_device devkit8000_lcd_device = {
150 .name = "lcd",
476544ca 151 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 152 .driver_name = "generic_dpi_panel",
153 .data = &lcd_panel,
476544ca 154 .phy.dpi.data_lines = 24,
476544ca 155};
89747c91
BW		 156
157static struct panel_generic_dpi_data dvi_panel = {
158 .name = "generic",
159 .platform_enable = devkit8000_panel_enable_dvi,
160 .platform_disable = devkit8000_panel_disable_dvi,
161};
162
476544ca
TW		 163static struct omap_dss_device devkit8000_dvi_device = {
164 .name = "dvi",
476544ca 165 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 166 .driver_name = "generic_dpi_panel",
167 .data = &dvi_panel,
476544ca 168 .phy.dpi.data_lines = 24,
476544ca
TW		 169};
170
171static struct omap_dss_device devkit8000_tv_device = {
172 .name = "tv",
173 .driver_name = "venc",
174 .type = OMAP_DISPLAY_TYPE_VENC,
175 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
476544ca
TW		 176};
177
178
179static struct omap_dss_device *devkit8000_dss_devices[] = {
180 &devkit8000_lcd_device,
181 &devkit8000_dvi_device,
182 &devkit8000_tv_device,
183};
184
185static struct omap_dss_board_info devkit8000_dss_data = {
186 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
187 .devices = devkit8000_dss_devices,
188 .default_device = &devkit8000_lcd_device,
189};
190
1f489f9e 191static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
30ea50c9 192 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
476544ca 193
bead4375 194static uint32_t board_keymap[] = {
476544ca
TW		 195 KEY(0, 0, KEY_1),
196 KEY(1, 0, KEY_2),
197 KEY(2, 0, KEY_3),
198 KEY(0, 1, KEY_4),
199 KEY(1, 1, KEY_5),
200 KEY(2, 1, KEY_6),
201 KEY(3, 1, KEY_F5),
202 KEY(0, 2, KEY_7),
203 KEY(1, 2, KEY_8),
204 KEY(2, 2, KEY_9),
205 KEY(3, 2, KEY_F6),
206 KEY(0, 3, KEY_F7),
207 KEY(1, 3, KEY_0),
208 KEY(2, 3, KEY_F8),
209 PERSISTENT_KEY(4, 5),
210 KEY(4, 4, KEY_VOLUMEUP),
211 KEY(5, 5, KEY_VOLUMEDOWN),
212 0
213};
214
215static struct matrix_keymap_data board_map_data = {
216 .keymap = board_keymap,
217 .keymap_size = ARRAY_SIZE(board_keymap),
218};
219
220static struct twl4030_keypad_data devkit8000_kp_data = {
221 .keymap_data = &board_map_data,
222 .rows = 6,
223 .cols = 6,
224 .rep = 1,
225};
226
227static struct gpio_led gpio_leds[];
228
229static int devkit8000_twl_gpio_setup(struct device *dev,
230 unsigned gpio, unsigned ngpio)
231{
daf7aabc
TW		 232 int ret;
233
476544ca
TW		 234 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
235 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
236 mmc[0].gpio_cd = gpio + 0;
237 omap2_hsmmc_init(mmc);
238
31c73f74
KRC		 239 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
240 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
241
daf7aabc
TW		 242 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
243 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
244 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
245 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
246 if (ret < 0) {
247 devkit8000_lcd_device.reset_gpio = -EINVAL;
248 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
249 }
40986098 250
31c73f74
KRC		 251 /* gpio + 7 is "DVI_PD" (out, active low) */
252 devkit8000_dvi_device.reset_gpio = gpio + 7;
daf7aabc
TW		 253 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
254 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
255 if (ret < 0) {
256 devkit8000_dvi_device.reset_gpio = -EINVAL;
257 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
258 }
31c73f74 259
476544ca
TW		 260 return 0;
261}
262
263static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
264 .gpio_base = OMAP_MAX_GPIO_LINES,
265 .irq_base = TWL4030_GPIO_IRQ_BASE,
266 .irq_end = TWL4030_GPIO_IRQ_END,
267 .use_leds = true,
35a78fa4 268 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
476544ca
TW		 269 | BIT(15) | BIT(16) | BIT(17),
270 .setup = devkit8000_twl_gpio_setup,
271};
272
c8aac01b
SG		 273static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
274 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
275 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
276};
476544ca
TW		 277
278/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
279static struct regulator_init_data devkit8000_vmmc1 = {
280 .constraints = {
281 .min_uV = 1850000,
282 .max_uV = 3150000,
283 .valid_modes_mask = REGULATOR_MODE_NORMAL
284 | REGULATOR_MODE_STANDBY,
285 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
286 | REGULATOR_CHANGE_MODE
287 | REGULATOR_CHANGE_STATUS,
288 },
289 .num_consumer_supplies = 1,
290 .consumer_supplies = &devkit8000_vmmc1_supply,
291};
292
476544ca
TW		 293/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
294static struct regulator_init_data devkit8000_vdac = {
295 .constraints = {
296 .min_uV = 1800000,
297 .max_uV = 1800000,
298 .valid_modes_mask = REGULATOR_MODE_NORMAL
299 | REGULATOR_MODE_STANDBY,
300 .valid_ops_mask = REGULATOR_CHANGE_MODE
301 | REGULATOR_CHANGE_STATUS,
302 },
303 .num_consumer_supplies = 1,
304 .consumer_supplies = &devkit8000_vdda_dac_supply,
305};
306
5fd58b51
TW		 307/* VPLL1 for digital video outputs */
308static struct regulator_init_data devkit8000_vpll1 = {
476544ca 309 .constraints = {
476544ca
TW		 310 .min_uV = 1800000,
311 .max_uV = 1800000,
312 .valid_modes_mask = REGULATOR_MODE_NORMAL
313 | REGULATOR_MODE_STANDBY,
314 .valid_ops_mask = REGULATOR_CHANGE_MODE
315 | REGULATOR_CHANGE_STATUS,
316 },
c8aac01b
SG		 317 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
318 .consumer_supplies = devkit8000_vpll1_supplies,
5fd58b51
TW		 319};
320
321/* VAUX4 for ads7846 and nubs */
322static struct regulator_init_data devkit8000_vio = {
323 .constraints = {
324 .min_uV = 1800000,
325 .max_uV = 1800000,
326 .apply_uV = true,
327 .valid_modes_mask = REGULATOR_MODE_NORMAL
328 | REGULATOR_MODE_STANDBY,
329 .valid_ops_mask = REGULATOR_CHANGE_MODE
330 | REGULATOR_CHANGE_STATUS,
331 },
1f489f9e
TW		 332 .num_consumer_supplies = 1,
333 .consumer_supplies = &devkit8000_vio_supply,
476544ca
TW		 334};
335
336static struct twl4030_usb_data devkit8000_usb_data = {
337 .usb_mode = T2_USB_MODE_ULPI,
338};
339
6a58baf8 340static struct twl4030_codec_audio_data devkit8000_audio_data;
476544ca
TW		 341
342static struct twl4030_codec_data devkit8000_codec_data = {
343 .audio_mclk = 26000000,
344 .audio = &devkit8000_audio_data,
345};
346
347static struct twl4030_platform_data devkit8000_twldata = {
348 .irq_base = TWL4030_IRQ_BASE,
349 .irq_end = TWL4030_IRQ_END,
350
351 /* platform_data for children goes here */
352 .usb = &devkit8000_usb_data,
353 .gpio = &devkit8000_gpio_data,
354 .codec = &devkit8000_codec_data,
355 .vmmc1 = &devkit8000_vmmc1,
476544ca 356 .vdac = &devkit8000_vdac,
5fd58b51
TW		 357 .vpll1 = &devkit8000_vpll1,
358 .vio = &devkit8000_vio,
476544ca
TW		 359 .keypad = &devkit8000_kp_data,
360};
361
476544ca
TW		 362static int __init devkit8000_i2c_init(void)
363{
fbd8071c 364 omap3_pmic_init("tps65930", &devkit8000_twldata);
476544ca
TW		 365 /* Bus 3 is attached to the DVI port where devices like the pico DLP
366 * projector don't work reliably with 400kHz */
367 omap_register_i2c_bus(3, 400, NULL, 0);
368 return 0;
369}
370
371static struct gpio_led gpio_leds[] = {
372 {
373 .name = "led1",
374 .default_trigger = "heartbeat",
375 .gpio = 186,
376 .active_low = true,
377 },
378 {
379 .name = "led2",
380 .default_trigger = "mmc0",
381 .gpio = 163,
382 .active_low = true,
383 },
384 {
385 .name = "ledB",
386 .default_trigger = "none",
387 .gpio = 153,
388 .active_low = true,
389 },
390 {
391 .name = "led3",
392 .default_trigger = "none",
393 .gpio = 164,
394 .active_low = true,
395 },
396};
397
398static struct gpio_led_platform_data gpio_led_info = {
399 .leds = gpio_leds,
400 .num_leds = ARRAY_SIZE(gpio_leds),
401};
402
403static struct platform_device leds_gpio = {
404 .name = "leds-gpio",
405 .id = -1,
406 .dev = {
407 .platform_data = &gpio_led_info,
408 },
409};
410
411static struct gpio_keys_button gpio_buttons[] = {
412 {
413 .code = BTN_EXTRA,
414 .gpio = 26,
415 .desc = "user",
416 .wakeup = 1,
417 },
418};
419
420static struct gpio_keys_platform_data gpio_key_info = {
421 .buttons = gpio_buttons,
422 .nbuttons = ARRAY_SIZE(gpio_buttons),
423};
424
425static struct platform_device keys_gpio = {
426 .name = "gpio-keys",
427 .id = -1,
428 .dev = {
429 .platform_data = &gpio_key_info,
430 },
431};
432
433
3dc3bad6 434static void __init devkit8000_init_early(void)
476544ca 435{
4805734b
PW		 436 omap2_init_common_infrastructure();
437 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
438 mt46h32m32lf6_sdrc_params);
3dc3bad6
RKAL		 439}
440
441static void __init devkit8000_init_irq(void)
442{
476544ca
TW		 443 omap_init_irq();
444#ifdef CONFIG_OMAP_32K_TIMER
445 omap2_gp_clockevent_set_gptimer(12);
446#endif
476544ca
TW		 447}
448
476544ca
TW		 449#define OMAP_DM9000_BASE 0x2c000000
450
451static struct resource omap_dm9000_resources[] = {
452 [0] = {
453 .start = OMAP_DM9000_BASE,
454 .end = (OMAP_DM9000_BASE + 0x4 - 1),
455 .flags = IORESOURCE_MEM,
456 },
457 [1] = {
458 .start = (OMAP_DM9000_BASE + 0x400),
459 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
460 .flags = IORESOURCE_MEM,
461 },
462 [2] = {
463 .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
464 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
465 },
466};
467
468static struct dm9000_plat_data omap_dm9000_platdata = {
469 .flags = DM9000_PLATF_16BITONLY,
470};
471
472static struct platform_device omap_dm9000_dev = {
473 .name = "dm9000",
474 .id = -1,
475 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
476 .resource = omap_dm9000_resources,
477 .dev = {
478 .platform_data = &omap_dm9000_platdata,
479 },
480};
481
482static void __init omap_dm9000_init(void)
483{
f535daed
KRC		 484 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
485 struct omap_die_id odi;
486
476544ca
TW		 487 if (gpio_request(OMAP_DM9000_GPIO_IRQ, "dm9000 irq") < 0) {
488 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
489 OMAP_DM9000_GPIO_IRQ);
490 return;
491 }
492
493 gpio_direction_input(OMAP_DM9000_GPIO_IRQ);
f535daed
KRC		 494
495 /* init the mac address using DIE id */
496 omap_get_die_id(&odi);
497
498 eth_addr[0] = 0x02; /* locally administered */
499 eth_addr[1] = odi.id_1 & 0xff;
500 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
501 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
502 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
503 eth_addr[5] = (odi.id_0 & 0x000000ff);
476544ca
TW		 504}
505
506static struct platform_device *devkit8000_devices[] __initdata = {
476544ca
TW		 507 &leds_gpio,
508 &keys_gpio,
509 &omap_dm9000_dev,
510};
511
181b250c 512static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
476544ca 513
181b250c
KM		 514 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
515 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
516 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
476544ca
TW		 517
518 .phy_reset = true,
519 .reset_gpio_port[0] = -EINVAL,
2135bb53 520 .reset_gpio_port[1] = -EINVAL,
476544ca
TW		 521 .reset_gpio_port[2] = -EINVAL
522};
523
c7ecea24 524#ifdef CONFIG_OMAP_MUX
018e075c
TW		 525static struct omap_board_mux board_mux[] __initdata = {
526 /* nCS and IRQ for Devkit8000 ethernet */
527 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
528 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
529
530 /* McSPI 2*/
531 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
532 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
533 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
534 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
535 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
536
537 /* PENDOWN GPIO */
538 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
539
540 /* mUSB */
541 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
542 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
543 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
544 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
545 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
546 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
547 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
548 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
549 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
550 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
551 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
552 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
553
554 /* USB 1 */
555 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
556 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
557 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
558 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
559 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
560 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
561 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
562 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
563 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
564 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
565 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
566 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
567
568 /* MMC 1 */
569 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
570 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
571 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
572 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
573 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
574 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
575 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
576 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
577 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
578 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
579
580 /* McBSP 2 */
581 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
582 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
583 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
584 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
585
586 /* I2C 1 */
587 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
588 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
589
590 /* I2C 2 */
591 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
592 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
593
594 /* I2C 3 */
595 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
596 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
597
598 /* I2C 4 */
599 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
600 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
601
602 /* serial ports */
603 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
604 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
605 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
606 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
607
608 /* DSS */
609 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
610 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
611 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
612 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
613 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
614 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
615 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
616 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
617 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
618 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
619 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
620 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
621 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
622 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
623 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
624 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
625 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
626 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
627 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
628 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
629 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
630 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
631 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
632 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
633 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
634 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
635 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
636 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
637
638 /* expansion port */
639 /* McSPI 1 */
640 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
641 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
642 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
643 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
644 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
645
646 /* HDQ */
647 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
648
649 /* McSPI4 */
650 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
651 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
652 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
653 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
654
655 /* MMC 2 */
656 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
657 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
658 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
659 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
660
661 /* I2C3 */
662 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
663 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
664
665 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
666 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
667 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
668
669 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
670 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
671
672 /* TPS IRQ */
673 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
674 OMAP_PIN_INPUT_PULLUP),
675
676 { .reg_offset = OMAP_MUX_TERMINATOR },
677};
c7ecea24 678#endif
018e075c 679
476544ca
TW		 680static void __init devkit8000_init(void)
681{
018e075c 682 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
faec32e5
TW		 683 omap_serial_init();
684
685 omap_dm9000_init();
686
476544ca
TW		 687 devkit8000_i2c_init();
688 platform_add_devices(devkit8000_devices,
689 ARRAY_SIZE(devkit8000_devices));
476544ca 690
d5e13227 691 omap_display_init(&devkit8000_dss_data);
476544ca 692
96974a24 693 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
476544ca 694
9e18630b 695 usb_musb_init(NULL);
9e64bb1e 696 usbhs_init(&usbhs_bdata);
9a3f39ff
MR		 697 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
698 ARRAY_SIZE(devkit8000_nand_partitions));
476544ca
TW		 699
700 /* Ensure SDRC pins are mux'd for self-refresh */
3cdc6ee5
TW		 701 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
702 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
476544ca
TW		 703}
704
476544ca 705MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
476544ca 706 .boot_params = 0x80000100,
71ee7dad 707 .reserve = omap_reserve,
3dc3bad6
RKAL		 708 .map_io = omap3_map_io,
709 .init_early = devkit8000_init_early,
476544ca
TW		 710 .init_irq = devkit8000_init_irq,
711 .init_machine = devkit8000_init,
712 .timer = &omap_timer,
713MACHINE_END
Linux kernel - Deliverables
This page took 0.129247 seconds and 5 git commands to generate.