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OMAP4: Move common twl6030 configuration to twl-common
[deliverable/linux.git] / arch / arm / mach-omap2 / board-devkit8000.c
CommitLineData
476544ca
TW		 1/*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/leds.h>
24#include <linux/gpio.h>
25#include <linux/input.h>
26#include <linux/gpio_keys.h>
27
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand.h>
3a63833e 31#include <linux/mmc/host.h>
476544ca
TW		 32
33#include <linux/regulator/machine.h>
34#include <linux/i2c/twl.h>
35
36#include <mach/hardware.h>
f535daed 37#include <mach/id.h>
476544ca
TW		 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/flash.h>
42
43#include <plat/board.h>
44#include <plat/common.h>
45#include <plat/gpmc.h>
46#include <plat/nand.h>
47#include <plat/usb.h>
a0b38cc4 48#include <video/omapdss.h>
f8ae2f08 49#include <video/omap-panel-generic-dpi.h>
476544ca
TW		 50
51#include <plat/mcspi.h>
52#include <linux/input/matrix_keypad.h>
53#include <linux/spi/spi.h>
476544ca
TW		 54#include <linux/dm9000.h>
55#include <linux/interrupt.h>
56
57#include "sdram-micron-mt46h32m32lf-6.h"
58
59#include "mux.h"
60#include "hsmmc.h"
96974a24 61#include "common-board-devices.h"
476544ca 62
476544ca
TW		 63#define OMAP_DM9000_GPIO_IRQ 25
64#define OMAP3_DEVKIT_TS_GPIO 27
65
66static struct mtd_partition devkit8000_nand_partitions[] = {
67 /* All the partition sizes are listed in terms of NAND block size */
68 {
69 .name = "X-Loader",
70 .offset = 0,
71 .size = 4 * NAND_BLOCK_SIZE,
72 .mask_flags = MTD_WRITEABLE, /* force read-only */
73 },
74 {
75 .name = "U-Boot",
76 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
77 .size = 15 * NAND_BLOCK_SIZE,
78 .mask_flags = MTD_WRITEABLE, /* force read-only */
79 },
80 {
81 .name = "U-Boot Env",
82 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
83 .size = 1 * NAND_BLOCK_SIZE,
84 },
85 {
86 .name = "Kernel",
87 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
88 .size = 32 * NAND_BLOCK_SIZE,
89 },
90 {
91 .name = "File System",
92 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
93 .size = MTDPART_SIZ_FULL,
94 },
95};
96
476544ca
TW		 97static struct omap2_hsmmc_info mmc[] = {
98 {
99 .mmc = 1,
3a63833e 100 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
476544ca
TW		 101 .gpio_wp = 29,
102 },
103 {} /* Terminator */
104};
476544ca
TW		 105
106static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
107{
09c0721e 108 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 109 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
476544ca
TW		 110 return 0;
111}
112
113static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
114{
09c0721e 115 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 116 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
476544ca 117}
31c73f74 118
476544ca
TW		 119static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
120{
09c0721e 121 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 122 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
476544ca
TW		 123 return 0;
124}
125
126static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
127{
09c0721e 128 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 129 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
476544ca
TW		 130}
131
786b01a8
OD		 132static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
133 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
134};
476544ca 135
5fd58b51 136/* ads7846 on SPI */
786b01a8
OD		 137static struct regulator_consumer_supply devkit8000_vio_supply[] = {
138 REGULATOR_SUPPLY("vcc", "spi2.0"),
139};
476544ca 140
89747c91
BW		 141static struct panel_generic_dpi_data lcd_panel = {
142 .name = "generic",
143 .platform_enable = devkit8000_panel_enable_lcd,
144 .platform_disable = devkit8000_panel_disable_lcd,
145};
146
476544ca
TW		 147static struct omap_dss_device devkit8000_lcd_device = {
148 .name = "lcd",
476544ca 149 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 150 .driver_name = "generic_dpi_panel",
151 .data = &lcd_panel,
476544ca 152 .phy.dpi.data_lines = 24,
476544ca 153};
89747c91
BW		 154
155static struct panel_generic_dpi_data dvi_panel = {
156 .name = "generic",
157 .platform_enable = devkit8000_panel_enable_dvi,
158 .platform_disable = devkit8000_panel_disable_dvi,
159};
160
476544ca
TW		 161static struct omap_dss_device devkit8000_dvi_device = {
162 .name = "dvi",
476544ca 163 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 164 .driver_name = "generic_dpi_panel",
165 .data = &dvi_panel,
476544ca 166 .phy.dpi.data_lines = 24,
476544ca
TW		 167};
168
169static struct omap_dss_device devkit8000_tv_device = {
170 .name = "tv",
171 .driver_name = "venc",
172 .type = OMAP_DISPLAY_TYPE_VENC,
173 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
476544ca
TW		 174};
175
176
177static struct omap_dss_device *devkit8000_dss_devices[] = {
178 &devkit8000_lcd_device,
179 &devkit8000_dvi_device,
180 &devkit8000_tv_device,
181};
182
183static struct omap_dss_board_info devkit8000_dss_data = {
184 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
185 .devices = devkit8000_dss_devices,
186 .default_device = &devkit8000_lcd_device,
187};
188
786b01a8
OD		 189static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = {
190 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
191};
476544ca 192
bead4375 193static uint32_t board_keymap[] = {
476544ca
TW		 194 KEY(0, 0, KEY_1),
195 KEY(1, 0, KEY_2),
196 KEY(2, 0, KEY_3),
197 KEY(0, 1, KEY_4),
198 KEY(1, 1, KEY_5),
199 KEY(2, 1, KEY_6),
200 KEY(3, 1, KEY_F5),
201 KEY(0, 2, KEY_7),
202 KEY(1, 2, KEY_8),
203 KEY(2, 2, KEY_9),
204 KEY(3, 2, KEY_F6),
205 KEY(0, 3, KEY_F7),
206 KEY(1, 3, KEY_0),
207 KEY(2, 3, KEY_F8),
208 PERSISTENT_KEY(4, 5),
209 KEY(4, 4, KEY_VOLUMEUP),
210 KEY(5, 5, KEY_VOLUMEDOWN),
211 0
212};
213
214static struct matrix_keymap_data board_map_data = {
215 .keymap = board_keymap,
216 .keymap_size = ARRAY_SIZE(board_keymap),
217};
218
219static struct twl4030_keypad_data devkit8000_kp_data = {
220 .keymap_data = &board_map_data,
221 .rows = 6,
222 .cols = 6,
223 .rep = 1,
224};
225
226static struct gpio_led gpio_leds[];
227
228static int devkit8000_twl_gpio_setup(struct device *dev,
229 unsigned gpio, unsigned ngpio)
230{
daf7aabc
TW		 231 int ret;
232
476544ca
TW		 233 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
234 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
235 mmc[0].gpio_cd = gpio + 0;
236 omap2_hsmmc_init(mmc);
237
31c73f74
KRC		 238 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
239 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
240
daf7aabc
TW		 241 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
242 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
243 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
bc593f5d 244 GPIOF_OUT_INIT_LOW, "LCD_PWREN");
daf7aabc
TW		 245 if (ret < 0) {
246 devkit8000_lcd_device.reset_gpio = -EINVAL;
247 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
248 }
40986098 249
31c73f74
KRC		 250 /* gpio + 7 is "DVI_PD" (out, active low) */
251 devkit8000_dvi_device.reset_gpio = gpio + 7;
daf7aabc 252 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
bc593f5d 253 GPIOF_OUT_INIT_LOW, "DVI PowerDown");
daf7aabc
TW		 254 if (ret < 0) {
255 devkit8000_dvi_device.reset_gpio = -EINVAL;
256 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
257 }
31c73f74 258
476544ca
TW		 259 return 0;
260}
261
262static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
263 .gpio_base = OMAP_MAX_GPIO_LINES,
264 .irq_base = TWL4030_GPIO_IRQ_BASE,
265 .irq_end = TWL4030_GPIO_IRQ_END,
266 .use_leds = true,
35a78fa4 267 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
476544ca
TW		 268 | BIT(15) | BIT(16) | BIT(17),
269 .setup = devkit8000_twl_gpio_setup,
270};
271
c8aac01b
SG		 272static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
273 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
274 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
275};
476544ca
TW		 276
277/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
278static struct regulator_init_data devkit8000_vmmc1 = {
279 .constraints = {
280 .min_uV = 1850000,
281 .max_uV = 3150000,
282 .valid_modes_mask = REGULATOR_MODE_NORMAL
283 | REGULATOR_MODE_STANDBY,
284 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
285 | REGULATOR_CHANGE_MODE
286 | REGULATOR_CHANGE_STATUS,
287 },
786b01a8
OD		 288 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
289 .consumer_supplies = devkit8000_vmmc1_supply,
476544ca
TW		 290};
291
476544ca
TW		 292/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
293static struct regulator_init_data devkit8000_vdac = {
294 .constraints = {
295 .min_uV = 1800000,
296 .max_uV = 1800000,
297 .valid_modes_mask = REGULATOR_MODE_NORMAL
298 | REGULATOR_MODE_STANDBY,
299 .valid_ops_mask = REGULATOR_CHANGE_MODE
300 | REGULATOR_CHANGE_STATUS,
301 },
786b01a8
OD		 302 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply),
303 .consumer_supplies = devkit8000_vdda_dac_supply,
476544ca
TW		 304};
305
5fd58b51
TW		 306/* VPLL1 for digital video outputs */
307static struct regulator_init_data devkit8000_vpll1 = {
476544ca 308 .constraints = {
476544ca
TW		 309 .min_uV = 1800000,
310 .max_uV = 1800000,
311 .valid_modes_mask = REGULATOR_MODE_NORMAL
312 | REGULATOR_MODE_STANDBY,
313 .valid_ops_mask = REGULATOR_CHANGE_MODE
314 | REGULATOR_CHANGE_STATUS,
315 },
c8aac01b
SG		 316 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
317 .consumer_supplies = devkit8000_vpll1_supplies,
5fd58b51
TW		 318};
319
320/* VAUX4 for ads7846 and nubs */
321static struct regulator_init_data devkit8000_vio = {
322 .constraints = {
323 .min_uV = 1800000,
324 .max_uV = 1800000,
325 .apply_uV = true,
326 .valid_modes_mask = REGULATOR_MODE_NORMAL
327 | REGULATOR_MODE_STANDBY,
328 .valid_ops_mask = REGULATOR_CHANGE_MODE
329 | REGULATOR_CHANGE_STATUS,
330 },
786b01a8
OD		 331 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
332 .consumer_supplies = devkit8000_vio_supply,
476544ca
TW		 333};
334
335static struct twl4030_usb_data devkit8000_usb_data = {
336 .usb_mode = T2_USB_MODE_ULPI,
337};
338
6a58baf8 339static struct twl4030_codec_audio_data devkit8000_audio_data;
476544ca
TW		 340
341static struct twl4030_codec_data devkit8000_codec_data = {
342 .audio_mclk = 26000000,
343 .audio = &devkit8000_audio_data,
344};
345
346static struct twl4030_platform_data devkit8000_twldata = {
347 .irq_base = TWL4030_IRQ_BASE,
348 .irq_end = TWL4030_IRQ_END,
349
350 /* platform_data for children goes here */
351 .usb = &devkit8000_usb_data,
352 .gpio = &devkit8000_gpio_data,
353 .codec = &devkit8000_codec_data,
354 .vmmc1 = &devkit8000_vmmc1,
476544ca 355 .vdac = &devkit8000_vdac,
5fd58b51
TW		 356 .vpll1 = &devkit8000_vpll1,
357 .vio = &devkit8000_vio,
476544ca
TW		 358 .keypad = &devkit8000_kp_data,
359};
360
476544ca
TW		 361static int __init devkit8000_i2c_init(void)
362{
fbd8071c 363 omap3_pmic_init("tps65930", &devkit8000_twldata);
476544ca
TW		 364 /* Bus 3 is attached to the DVI port where devices like the pico DLP
365 * projector don't work reliably with 400kHz */
366 omap_register_i2c_bus(3, 400, NULL, 0);
367 return 0;
368}
369
370static struct gpio_led gpio_leds[] = {
371 {
372 .name = "led1",
373 .default_trigger = "heartbeat",
374 .gpio = 186,
375 .active_low = true,
376 },
377 {
378 .name = "led2",
379 .default_trigger = "mmc0",
380 .gpio = 163,
381 .active_low = true,
382 },
383 {
384 .name = "ledB",
385 .default_trigger = "none",
386 .gpio = 153,
387 .active_low = true,
388 },
389 {
390 .name = "led3",
391 .default_trigger = "none",
392 .gpio = 164,
393 .active_low = true,
394 },
395};
396
397static struct gpio_led_platform_data gpio_led_info = {
398 .leds = gpio_leds,
399 .num_leds = ARRAY_SIZE(gpio_leds),
400};
401
402static struct platform_device leds_gpio = {
403 .name = "leds-gpio",
404 .id = -1,
405 .dev = {
406 .platform_data = &gpio_led_info,
407 },
408};
409
410static struct gpio_keys_button gpio_buttons[] = {
411 {
412 .code = BTN_EXTRA,
413 .gpio = 26,
414 .desc = "user",
415 .wakeup = 1,
416 },
417};
418
419static struct gpio_keys_platform_data gpio_key_info = {
420 .buttons = gpio_buttons,
421 .nbuttons = ARRAY_SIZE(gpio_buttons),
422};
423
424static struct platform_device keys_gpio = {
425 .name = "gpio-keys",
426 .id = -1,
427 .dev = {
428 .platform_data = &gpio_key_info,
429 },
430};
431
432
3dc3bad6 433static void __init devkit8000_init_early(void)
476544ca 434{
4805734b
PW		 435 omap2_init_common_infrastructure();
436 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
437 mt46h32m32lf6_sdrc_params);
3dc3bad6
RKAL		 438}
439
440static void __init devkit8000_init_irq(void)
441{
741e3a89 442 omap3_init_irq();
476544ca
TW		 443}
444
476544ca
TW		 445#define OMAP_DM9000_BASE 0x2c000000
446
447static struct resource omap_dm9000_resources[] = {
448 [0] = {
449 .start = OMAP_DM9000_BASE,
450 .end = (OMAP_DM9000_BASE + 0x4 - 1),
451 .flags = IORESOURCE_MEM,
452 },
453 [1] = {
454 .start = (OMAP_DM9000_BASE + 0x400),
455 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
456 .flags = IORESOURCE_MEM,
457 },
458 [2] = {
459 .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
460 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
461 },
462};
463
464static struct dm9000_plat_data omap_dm9000_platdata = {
465 .flags = DM9000_PLATF_16BITONLY,
466};
467
468static struct platform_device omap_dm9000_dev = {
469 .name = "dm9000",
470 .id = -1,
471 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
472 .resource = omap_dm9000_resources,
473 .dev = {
474 .platform_data = &omap_dm9000_platdata,
475 },
476};
477
478static void __init omap_dm9000_init(void)
479{
f535daed
KRC		 480 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
481 struct omap_die_id odi;
bc593f5d 482 int ret;
f535daed 483
bc593f5d
IG		 484 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
485 if (ret < 0) {
476544ca
TW		 486 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
487 OMAP_DM9000_GPIO_IRQ);
488 return;
bc593f5d 489 }
f535daed
KRC		 490
491 /* init the mac address using DIE id */
492 omap_get_die_id(&odi);
493
494 eth_addr[0] = 0x02; /* locally administered */
495 eth_addr[1] = odi.id_1 & 0xff;
496 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
497 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
498 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
499 eth_addr[5] = (odi.id_0 & 0x000000ff);
476544ca
TW		 500}
501
502static struct platform_device *devkit8000_devices[] __initdata = {
476544ca
TW		 503 &leds_gpio,
504 &keys_gpio,
505 &omap_dm9000_dev,
506};
507
181b250c 508static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
476544ca 509
181b250c
KM		 510 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
511 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
512 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
476544ca
TW		 513
514 .phy_reset = true,
515 .reset_gpio_port[0] = -EINVAL,
2135bb53 516 .reset_gpio_port[1] = -EINVAL,
476544ca
TW		 517 .reset_gpio_port[2] = -EINVAL
518};
519
c7ecea24 520#ifdef CONFIG_OMAP_MUX
018e075c
TW		 521static struct omap_board_mux board_mux[] __initdata = {
522 /* nCS and IRQ for Devkit8000 ethernet */
523 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
524 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
525
526 /* McSPI 2*/
527 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
528 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
529 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
530 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
531 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
532
533 /* PENDOWN GPIO */
534 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
535
536 /* mUSB */
537 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
538 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
539 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
540 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
541 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
542 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
543 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
544 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
545 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
546 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
547 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
548 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
549
550 /* USB 1 */
551 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
552 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
553 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
554 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
555 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
556 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
557 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
558 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
559 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
560 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
561 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
562 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
563
564 /* MMC 1 */
565 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
566 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
567 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
568 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
569 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
570 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
571 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
572 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
573 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
574 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
575
576 /* McBSP 2 */
577 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
578 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
579 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
580 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
581
582 /* I2C 1 */
583 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
584 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
585
586 /* I2C 2 */
587 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
588 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
589
590 /* I2C 3 */
591 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
592 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
593
594 /* I2C 4 */
595 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
596 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
597
598 /* serial ports */
599 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
600 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
601 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
602 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
603
604 /* DSS */
605 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
606 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
607 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
608 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
609 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
610 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
611 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
612 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
613 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
614 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
615 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
616 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
617 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
618 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
619 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
620 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
621 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
622 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
623 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
624 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
625 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
626 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
627 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
628 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
629 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
630 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
631 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
632 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
633
634 /* expansion port */
635 /* McSPI 1 */
636 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
637 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
638 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
639 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
640 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
641
642 /* HDQ */
643 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
644
645 /* McSPI4 */
646 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
647 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
648 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
649 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
650
651 /* MMC 2 */
652 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
653 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
654 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
655 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
656
657 /* I2C3 */
658 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
659 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
660
661 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
662 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
663 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
664
665 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
666 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
667
668 /* TPS IRQ */
669 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
670 OMAP_PIN_INPUT_PULLUP),
671
672 { .reg_offset = OMAP_MUX_TERMINATOR },
673};
c7ecea24 674#endif
018e075c 675
476544ca
TW		 676static void __init devkit8000_init(void)
677{
018e075c 678 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
faec32e5
TW		 679 omap_serial_init();
680
681 omap_dm9000_init();
682
476544ca
TW		 683 devkit8000_i2c_init();
684 platform_add_devices(devkit8000_devices,
685 ARRAY_SIZE(devkit8000_devices));
476544ca 686
d5e13227 687 omap_display_init(&devkit8000_dss_data);
476544ca 688
96974a24 689 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
476544ca 690
9e18630b 691 usb_musb_init(NULL);
9e64bb1e 692 usbhs_init(&usbhs_bdata);
9a3f39ff
MR		 693 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
694 ARRAY_SIZE(devkit8000_nand_partitions));
476544ca
TW		 695
696 /* Ensure SDRC pins are mux'd for self-refresh */
3cdc6ee5
TW		 697 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
698 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
476544ca
TW		 699}
700
476544ca 701MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
476544ca 702 .boot_params = 0x80000100,
71ee7dad 703 .reserve = omap_reserve,
3dc3bad6
RKAL		 704 .map_io = omap3_map_io,
705 .init_early = devkit8000_init_early,
476544ca
TW		 706 .init_irq = devkit8000_init_irq,
707 .init_machine = devkit8000_init,
e74984e4 708 .timer = &omap3_secure_timer,
476544ca 709MACHINE_END
Linux kernel - Deliverables
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