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Merge branch 'pm-opp' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-devkit8000.c
CommitLineData
476544ca
TW		 1/*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/leds.h>
24#include <linux/gpio.h>
25#include <linux/input.h>
26#include <linux/gpio_keys.h>
27
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand.h>
3a63833e 31#include <linux/mmc/host.h>
476544ca
TW		 32
33#include <linux/regulator/machine.h>
34#include <linux/i2c/twl.h>
35
36#include <mach/hardware.h>
f535daed 37#include <mach/id.h>
476544ca
TW		 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/flash.h>
42
43#include <plat/board.h>
44#include <plat/common.h>
45#include <plat/gpmc.h>
46#include <plat/nand.h>
47#include <plat/usb.h>
476544ca
TW		 48#include <plat/display.h>
49
50#include <plat/mcspi.h>
51#include <linux/input/matrix_keypad.h>
52#include <linux/spi/spi.h>
53#include <linux/spi/ads7846.h>
476544ca
TW		 54#include <linux/dm9000.h>
55#include <linux/interrupt.h>
56
57#include "sdram-micron-mt46h32m32lf-6.h"
58
59#include "mux.h"
60#include "hsmmc.h"
04aeae77 61#include "timer-gp.h"
476544ca 62
476544ca
TW		 63#define NAND_BLOCK_SIZE SZ_128K
64
65#define OMAP_DM9000_GPIO_IRQ 25
66#define OMAP3_DEVKIT_TS_GPIO 27
67
68static struct mtd_partition devkit8000_nand_partitions[] = {
69 /* All the partition sizes are listed in terms of NAND block size */
70 {
71 .name = "X-Loader",
72 .offset = 0,
73 .size = 4 * NAND_BLOCK_SIZE,
74 .mask_flags = MTD_WRITEABLE, /* force read-only */
75 },
76 {
77 .name = "U-Boot",
78 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
79 .size = 15 * NAND_BLOCK_SIZE,
80 .mask_flags = MTD_WRITEABLE, /* force read-only */
81 },
82 {
83 .name = "U-Boot Env",
84 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
85 .size = 1 * NAND_BLOCK_SIZE,
86 },
87 {
88 .name = "Kernel",
89 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
90 .size = 32 * NAND_BLOCK_SIZE,
91 },
92 {
93 .name = "File System",
94 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
95 .size = MTDPART_SIZ_FULL,
96 },
97};
98
99static struct omap_nand_platform_data devkit8000_nand_data = {
100 .options = NAND_BUSWIDTH_16,
101 .parts = devkit8000_nand_partitions,
102 .nr_parts = ARRAY_SIZE(devkit8000_nand_partitions),
103 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
104};
105
476544ca
TW		 106static struct omap2_hsmmc_info mmc[] = {
107 {
108 .mmc = 1,
3a63833e 109 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
476544ca
TW		 110 .gpio_wp = 29,
111 },
112 {} /* Terminator */
113};
476544ca
TW		 114
115static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
116{
117 twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
118 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
119
09c0721e 120 if (gpio_is_valid(dssdev->reset_gpio))
40986098 121 gpio_set_value(dssdev->reset_gpio, 1);
476544ca
TW		 122 return 0;
123}
124
125static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
126{
09c0721e 127 if (gpio_is_valid(dssdev->reset_gpio))
40986098 128 gpio_set_value(dssdev->reset_gpio, 0);
476544ca 129}
31c73f74 130
476544ca
TW		 131static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
132{
09c0721e 133 if (gpio_is_valid(dssdev->reset_gpio))
31c73f74 134 gpio_set_value(dssdev->reset_gpio, 1);
476544ca
TW		 135 return 0;
136}
137
138static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
139{
09c0721e 140 if (gpio_is_valid(dssdev->reset_gpio))
31c73f74 141 gpio_set_value(dssdev->reset_gpio, 0);
476544ca
TW		 142}
143
1f489f9e
TW		 144static struct regulator_consumer_supply devkit8000_vmmc1_supply =
145 REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0");
146
476544ca 147
5fd58b51 148/* ads7846 on SPI */
1f489f9e
TW		 149static struct regulator_consumer_supply devkit8000_vio_supply =
150 REGULATOR_SUPPLY("vcc", "spi2.0");
476544ca
TW		 151
152static struct omap_dss_device devkit8000_lcd_device = {
153 .name = "lcd",
61d07ef4 154 .driver_name = "generic_panel",
476544ca
TW		 155 .type = OMAP_DISPLAY_TYPE_DPI,
156 .phy.dpi.data_lines = 24,
40986098 157 .reset_gpio = -EINVAL, /* will be replaced */
476544ca
TW		 158 .platform_enable = devkit8000_panel_enable_lcd,
159 .platform_disable = devkit8000_panel_disable_lcd,
160};
161static struct omap_dss_device devkit8000_dvi_device = {
162 .name = "dvi",
163 .driver_name = "generic_panel",
164 .type = OMAP_DISPLAY_TYPE_DPI,
165 .phy.dpi.data_lines = 24,
31c73f74 166 .reset_gpio = -EINVAL, /* will be replaced */
476544ca
TW		 167 .platform_enable = devkit8000_panel_enable_dvi,
168 .platform_disable = devkit8000_panel_disable_dvi,
169};
170
171static struct omap_dss_device devkit8000_tv_device = {
172 .name = "tv",
173 .driver_name = "venc",
174 .type = OMAP_DISPLAY_TYPE_VENC,
175 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
476544ca
TW		 176};
177
178
179static struct omap_dss_device *devkit8000_dss_devices[] = {
180 &devkit8000_lcd_device,
181 &devkit8000_dvi_device,
182 &devkit8000_tv_device,
183};
184
185static struct omap_dss_board_info devkit8000_dss_data = {
186 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
187 .devices = devkit8000_dss_devices,
188 .default_device = &devkit8000_lcd_device,
189};
190
191static struct platform_device devkit8000_dss_device = {
192 .name = "omapdss",
193 .id = -1,
194 .dev = {
195 .platform_data = &devkit8000_dss_data,
196 },
197};
198
1f489f9e
TW		 199static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
200 REGULATOR_SUPPLY("vdda_dac", "omapdss");
476544ca 201
bead4375 202static uint32_t board_keymap[] = {
476544ca
TW		 203 KEY(0, 0, KEY_1),
204 KEY(1, 0, KEY_2),
205 KEY(2, 0, KEY_3),
206 KEY(0, 1, KEY_4),
207 KEY(1, 1, KEY_5),
208 KEY(2, 1, KEY_6),
209 KEY(3, 1, KEY_F5),
210 KEY(0, 2, KEY_7),
211 KEY(1, 2, KEY_8),
212 KEY(2, 2, KEY_9),
213 KEY(3, 2, KEY_F6),
214 KEY(0, 3, KEY_F7),
215 KEY(1, 3, KEY_0),
216 KEY(2, 3, KEY_F8),
217 PERSISTENT_KEY(4, 5),
218 KEY(4, 4, KEY_VOLUMEUP),
219 KEY(5, 5, KEY_VOLUMEDOWN),
220 0
221};
222
223static struct matrix_keymap_data board_map_data = {
224 .keymap = board_keymap,
225 .keymap_size = ARRAY_SIZE(board_keymap),
226};
227
228static struct twl4030_keypad_data devkit8000_kp_data = {
229 .keymap_data = &board_map_data,
230 .rows = 6,
231 .cols = 6,
232 .rep = 1,
233};
234
235static struct gpio_led gpio_leds[];
236
237static int devkit8000_twl_gpio_setup(struct device *dev,
238 unsigned gpio, unsigned ngpio)
239{
240 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
241 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
242 mmc[0].gpio_cd = gpio + 0;
243 omap2_hsmmc_init(mmc);
244
31c73f74
KRC		 245 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
246 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
247
40986098
KRC		 248 /* gpio + 1 is "LCD_PWREN" (out, active high) */
249 devkit8000_lcd_device.reset_gpio = gpio + 1;
250 gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN");
251 /* Disable until needed */
252 gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0);
253
31c73f74
KRC		 254 /* gpio + 7 is "DVI_PD" (out, active low) */
255 devkit8000_dvi_device.reset_gpio = gpio + 7;
256 gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown");
257 /* Disable until needed */
258 gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0);
259
476544ca
TW		 260 return 0;
261}
262
263static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
264 .gpio_base = OMAP_MAX_GPIO_LINES,
265 .irq_base = TWL4030_GPIO_IRQ_BASE,
266 .irq_end = TWL4030_GPIO_IRQ_END,
267 .use_leds = true,
268 .pullups = BIT(1),
269 .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
270 | BIT(15) | BIT(16) | BIT(17),
271 .setup = devkit8000_twl_gpio_setup,
272};
273
1f489f9e
TW		 274static struct regulator_consumer_supply devkit8000_vpll1_supply =
275 REGULATOR_SUPPLY("vdds_dsi", "omapdss");
476544ca
TW		 276
277/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
278static struct regulator_init_data devkit8000_vmmc1 = {
279 .constraints = {
280 .min_uV = 1850000,
281 .max_uV = 3150000,
282 .valid_modes_mask = REGULATOR_MODE_NORMAL
283 | REGULATOR_MODE_STANDBY,
284 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
285 | REGULATOR_CHANGE_MODE
286 | REGULATOR_CHANGE_STATUS,
287 },
288 .num_consumer_supplies = 1,
289 .consumer_supplies = &devkit8000_vmmc1_supply,
290};
291
476544ca
TW		 292/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
293static struct regulator_init_data devkit8000_vdac = {
294 .constraints = {
295 .min_uV = 1800000,
296 .max_uV = 1800000,
297 .valid_modes_mask = REGULATOR_MODE_NORMAL
298 | REGULATOR_MODE_STANDBY,
299 .valid_ops_mask = REGULATOR_CHANGE_MODE
300 | REGULATOR_CHANGE_STATUS,
301 },
302 .num_consumer_supplies = 1,
303 .consumer_supplies = &devkit8000_vdda_dac_supply,
304};
305
5fd58b51
TW		 306/* VPLL1 for digital video outputs */
307static struct regulator_init_data devkit8000_vpll1 = {
476544ca 308 .constraints = {
476544ca
TW		 309 .min_uV = 1800000,
310 .max_uV = 1800000,
311 .valid_modes_mask = REGULATOR_MODE_NORMAL
312 | REGULATOR_MODE_STANDBY,
313 .valid_ops_mask = REGULATOR_CHANGE_MODE
314 | REGULATOR_CHANGE_STATUS,
315 },
1f489f9e
TW		 316 .num_consumer_supplies = 1,
317 .consumer_supplies = &devkit8000_vpll1_supply,
5fd58b51
TW		 318};
319
320/* VAUX4 for ads7846 and nubs */
321static struct regulator_init_data devkit8000_vio = {
322 .constraints = {
323 .min_uV = 1800000,
324 .max_uV = 1800000,
325 .apply_uV = true,
326 .valid_modes_mask = REGULATOR_MODE_NORMAL
327 | REGULATOR_MODE_STANDBY,
328 .valid_ops_mask = REGULATOR_CHANGE_MODE
329 | REGULATOR_CHANGE_STATUS,
330 },
1f489f9e
TW		 331 .num_consumer_supplies = 1,
332 .consumer_supplies = &devkit8000_vio_supply,
476544ca
TW		 333};
334
335static struct twl4030_usb_data devkit8000_usb_data = {
336 .usb_mode = T2_USB_MODE_ULPI,
337};
338
339static struct twl4030_codec_audio_data devkit8000_audio_data = {
340 .audio_mclk = 26000000,
341};
342
343static struct twl4030_codec_data devkit8000_codec_data = {
344 .audio_mclk = 26000000,
345 .audio = &devkit8000_audio_data,
346};
347
348static struct twl4030_platform_data devkit8000_twldata = {
349 .irq_base = TWL4030_IRQ_BASE,
350 .irq_end = TWL4030_IRQ_END,
351
352 /* platform_data for children goes here */
353 .usb = &devkit8000_usb_data,
354 .gpio = &devkit8000_gpio_data,
355 .codec = &devkit8000_codec_data,
356 .vmmc1 = &devkit8000_vmmc1,
476544ca 357 .vdac = &devkit8000_vdac,
5fd58b51
TW		 358 .vpll1 = &devkit8000_vpll1,
359 .vio = &devkit8000_vio,
476544ca
TW		 360 .keypad = &devkit8000_kp_data,
361};
362
363static struct i2c_board_info __initdata devkit8000_i2c_boardinfo[] = {
364 {
0cbe70ee 365 I2C_BOARD_INFO("tps65930", 0x48),
476544ca
TW		 366 .flags = I2C_CLIENT_WAKE,
367 .irq = INT_34XX_SYS_NIRQ,
368 .platform_data = &devkit8000_twldata,
369 },
370};
371
372static int __init devkit8000_i2c_init(void)
373{
374 omap_register_i2c_bus(1, 2600, devkit8000_i2c_boardinfo,
375 ARRAY_SIZE(devkit8000_i2c_boardinfo));
376 /* Bus 3 is attached to the DVI port where devices like the pico DLP
377 * projector don't work reliably with 400kHz */
378 omap_register_i2c_bus(3, 400, NULL, 0);
379 return 0;
380}
381
382static struct gpio_led gpio_leds[] = {
383 {
384 .name = "led1",
385 .default_trigger = "heartbeat",
386 .gpio = 186,
387 .active_low = true,
388 },
389 {
390 .name = "led2",
391 .default_trigger = "mmc0",
392 .gpio = 163,
393 .active_low = true,
394 },
395 {
396 .name = "ledB",
397 .default_trigger = "none",
398 .gpio = 153,
399 .active_low = true,
400 },
401 {
402 .name = "led3",
403 .default_trigger = "none",
404 .gpio = 164,
405 .active_low = true,
406 },
407};
408
409static struct gpio_led_platform_data gpio_led_info = {
410 .leds = gpio_leds,
411 .num_leds = ARRAY_SIZE(gpio_leds),
412};
413
414static struct platform_device leds_gpio = {
415 .name = "leds-gpio",
416 .id = -1,
417 .dev = {
418 .platform_data = &gpio_led_info,
419 },
420};
421
422static struct gpio_keys_button gpio_buttons[] = {
423 {
424 .code = BTN_EXTRA,
425 .gpio = 26,
426 .desc = "user",
427 .wakeup = 1,
428 },
429};
430
431static struct gpio_keys_platform_data gpio_key_info = {
432 .buttons = gpio_buttons,
433 .nbuttons = ARRAY_SIZE(gpio_buttons),
434};
435
436static struct platform_device keys_gpio = {
437 .name = "gpio-keys",
438 .id = -1,
439 .dev = {
440 .platform_data = &gpio_key_info,
441 },
442};
443
444
445static void __init devkit8000_init_irq(void)
446{
476544ca
TW		 447 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
448 mt46h32m32lf6_sdrc_params);
449 omap_init_irq();
450#ifdef CONFIG_OMAP_32K_TIMER
451 omap2_gp_clockevent_set_gptimer(12);
452#endif
476544ca
TW		 453}
454
455static void __init devkit8000_ads7846_init(void)
456{
457 int gpio = OMAP3_DEVKIT_TS_GPIO;
458 int ret;
459
460 ret = gpio_request(gpio, "ads7846_pen_down");
461 if (ret < 0) {
462 printk(KERN_ERR "Failed to request GPIO %d for "
463 "ads7846 pen down IRQ\n", gpio);
464 return;
465 }
466
467 gpio_direction_input(gpio);
468}
469
470static int ads7846_get_pendown_state(void)
471{
472 return !gpio_get_value(OMAP3_DEVKIT_TS_GPIO);
473}
474
475static struct ads7846_platform_data ads7846_config = {
476 .x_max = 0x0fff,
477 .y_max = 0x0fff,
478 .x_plate_ohms = 180,
479 .pressure_max = 255,
480 .debounce_max = 10,
481 .debounce_tol = 5,
482 .debounce_rep = 1,
483 .get_pendown_state = ads7846_get_pendown_state,
484 .keep_vref_on = 1,
485 .settle_delay_usecs = 150,
486};
487
488static struct omap2_mcspi_device_config ads7846_mcspi_config = {
489 .turbo_mode = 0,
490 .single_channel = 1, /* 0: slave, 1: master */
491};
492
493static struct spi_board_info devkit8000_spi_board_info[] __initdata = {
494 {
495 .modalias = "ads7846",
496 .bus_num = 2,
497 .chip_select = 0,
498 .max_speed_hz = 1500000,
499 .controller_data = &ads7846_mcspi_config,
500 .irq = OMAP_GPIO_IRQ(OMAP3_DEVKIT_TS_GPIO),
501 .platform_data = &ads7846_config,
502 }
503};
504
505#define OMAP_DM9000_BASE 0x2c000000
506
507static struct resource omap_dm9000_resources[] = {
508 [0] = {
509 .start = OMAP_DM9000_BASE,
510 .end = (OMAP_DM9000_BASE + 0x4 - 1),
511 .flags = IORESOURCE_MEM,
512 },
513 [1] = {
514 .start = (OMAP_DM9000_BASE + 0x400),
515 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
516 .flags = IORESOURCE_MEM,
517 },
518 [2] = {
519 .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
520 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
521 },
522};
523
524static struct dm9000_plat_data omap_dm9000_platdata = {
525 .flags = DM9000_PLATF_16BITONLY,
526};
527
528static struct platform_device omap_dm9000_dev = {
529 .name = "dm9000",
530 .id = -1,
531 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
532 .resource = omap_dm9000_resources,
533 .dev = {
534 .platform_data = &omap_dm9000_platdata,
535 },
536};
537
538static void __init omap_dm9000_init(void)
539{
f535daed
KRC		 540 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
541 struct omap_die_id odi;
542
476544ca
TW		 543 if (gpio_request(OMAP_DM9000_GPIO_IRQ, "dm9000 irq") < 0) {
544 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
545 OMAP_DM9000_GPIO_IRQ);
546 return;
547 }
548
549 gpio_direction_input(OMAP_DM9000_GPIO_IRQ);
f535daed
KRC		 550
551 /* init the mac address using DIE id */
552 omap_get_die_id(&odi);
553
554 eth_addr[0] = 0x02; /* locally administered */
555 eth_addr[1] = odi.id_1 & 0xff;
556 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
557 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
558 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
559 eth_addr[5] = (odi.id_0 & 0x000000ff);
476544ca
TW		 560}
561
562static struct platform_device *devkit8000_devices[] __initdata = {
563 &devkit8000_dss_device,
564 &leds_gpio,
565 &keys_gpio,
566 &omap_dm9000_dev,
567};
568
569static void __init devkit8000_flash_init(void)
570{
571 u8 cs = 0;
572 u8 nandcs = GPMC_CS_NUM + 1;
573
476544ca
TW		 574 /* find out the chip-select on which NAND exists */
575 while (cs < GPMC_CS_NUM) {
576 u32 ret = 0;
577 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
578
579 if ((ret & 0xC00) == 0x800) {
580 printk(KERN_INFO "Found NAND on CS%d\n", cs);
581 if (nandcs > GPMC_CS_NUM)
582 nandcs = cs;
583 }
584 cs++;
585 }
586
587 if (nandcs > GPMC_CS_NUM) {
588 printk(KERN_INFO "NAND: Unable to find configuration "
589 "in GPMC\n ");
590 return;
591 }
592
593 if (nandcs < GPMC_CS_NUM) {
594 devkit8000_nand_data.cs = nandcs;
476544ca
TW		 595
596 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
f450d867 597 if (gpmc_nand_init(&devkit8000_nand_data) < 0)
476544ca
TW		 598 printk(KERN_ERR "Unable to register NAND device\n");
599 }
600}
601
884b8369
MM		 602static struct omap_musb_board_data musb_board_data = {
603 .interface_type = MUSB_INTERFACE_ULPI,
604 .mode = MUSB_OTG,
605 .power = 100,
606};
607
6f69a181 608static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
476544ca
TW		 609
610 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
2135bb53 611 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
476544ca
TW		 612 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
613
614 .phy_reset = true,
615 .reset_gpio_port[0] = -EINVAL,
2135bb53 616 .reset_gpio_port[1] = -EINVAL,
476544ca
TW		 617 .reset_gpio_port[2] = -EINVAL
618};
619
018e075c
TW		 620static struct omap_board_mux board_mux[] __initdata = {
621 /* nCS and IRQ for Devkit8000 ethernet */
622 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
623 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
624
625 /* McSPI 2*/
626 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
627 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
628 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
629 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
630 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
631
632 /* PENDOWN GPIO */
633 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
634
635 /* mUSB */
636 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
637 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
638 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
639 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
640 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
641 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
642 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
643 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
644 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
645 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
646 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
647 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
648
649 /* USB 1 */
650 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
651 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
652 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
653 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
654 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
655 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
656 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
657 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
658 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
659 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
660 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
661 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
662
663 /* MMC 1 */
664 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
665 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
666 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
667 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
668 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
669 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
670 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
671 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
672 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
673 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
674
675 /* McBSP 2 */
676 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
677 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
678 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
679 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
680
681 /* I2C 1 */
682 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
683 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
684
685 /* I2C 2 */
686 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
687 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
688
689 /* I2C 3 */
690 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
691 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
692
693 /* I2C 4 */
694 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
695 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
696
697 /* serial ports */
698 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
699 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
700 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
701 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
702
703 /* DSS */
704 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
705 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
706 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
707 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
708 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
709 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
710 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
711 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
712 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
713 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
714 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
715 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
716 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
717 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
718 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
719 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
720 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
721 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
722 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
723 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
724 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
725 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
726 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
727 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
728 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
729 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
730 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
731 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
732
733 /* expansion port */
734 /* McSPI 1 */
735 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
736 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
737 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
738 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
739 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
740
741 /* HDQ */
742 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
743
744 /* McSPI4 */
745 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
746 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
747 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
748 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
749
750 /* MMC 2 */
751 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
752 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
753 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
754 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
755
756 /* I2C3 */
757 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
758 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
759
760 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
761 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
762 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
763
764 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
765 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
766
767 /* TPS IRQ */
768 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
769 OMAP_PIN_INPUT_PULLUP),
770
771 { .reg_offset = OMAP_MUX_TERMINATOR },
772};
773
476544ca
TW		 774static void __init devkit8000_init(void)
775{
018e075c 776 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
faec32e5
TW		 777 omap_serial_init();
778
779 omap_dm9000_init();
780
476544ca
TW		 781 devkit8000_i2c_init();
782 platform_add_devices(devkit8000_devices,
783 ARRAY_SIZE(devkit8000_devices));
476544ca
TW		 784
785 spi_register_board_info(devkit8000_spi_board_info,
786 ARRAY_SIZE(devkit8000_spi_board_info));
787
476544ca
TW		 788 devkit8000_ads7846_init();
789
884b8369 790 usb_musb_init(&musb_board_data);
476544ca
TW		 791 usb_ehci_init(&ehci_pdata);
792 devkit8000_flash_init();
793
794 /* Ensure SDRC pins are mux'd for self-refresh */
3cdc6ee5
TW		 795 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
796 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
476544ca
TW		 797}
798
476544ca 799MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
476544ca 800 .boot_params = 0x80000100,
869fef41 801 .map_io = omap3_map_io,
71ee7dad 802 .reserve = omap_reserve,
476544ca
TW		 803 .init_irq = devkit8000_init_irq,
804 .init_machine = devkit8000_init,
805 .timer = &omap_timer,
806MACHINE_END
Linux kernel - Deliverables
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