Commit | Line | Data |
---|---|---|
1dbae815 | 1 | /* |
1dbae815 TL |
2 | * Copyright (C) 2005 Nokia Corporation |
3 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
4 | * | |
8d61649d | 5 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
1dbae815 | 6 | * |
8d61649d BC |
7 | * Modified from the original mach-omap/omap2/board-generic.c did by Paul |
8 | * to support the OMAP2+ device tree boards with an unique board file. | |
1dbae815 TL |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
8d61649d | 14 | #include <linux/io.h> |
fbf75da7 | 15 | #include <linux/of_irq.h> |
8d61649d BC |
16 | #include <linux/of_platform.h> |
17 | #include <linux/irqdomain.h> | |
741532c4 | 18 | #include <linux/clk.h> |
1dbae815 | 19 | |
1dbae815 | 20 | #include <asm/mach/arch.h> |
1dbae815 | 21 | |
4e65331c | 22 | #include "common.h" |
a7cbb9b1 | 23 | #include "common-board-devices.h" |
63d5fc0c | 24 | #include "dss-common.h" |
8d61649d | 25 | |
75a57fe9 | 26 | #if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) |
c4082d49 | 27 | #define intc_of_init NULL |
75a57fe9 TL |
28 | #endif |
29 | #ifndef CONFIG_ARCH_OMAP4 | |
30 | #define gic_of_init NULL | |
31 | #endif | |
32 | ||
8d61649d BC |
33 | static struct of_device_id omap_dt_match_table[] __initdata = { |
34 | { .compatible = "simple-bus", }, | |
35 | { .compatible = "ti,omap-infra", }, | |
36 | { } | |
b3c6df3a PW |
37 | }; |
38 | ||
741532c4 RQ |
39 | /* |
40 | * Create alias for USB host PHY clock. | |
41 | * Remove this when clock phandle can be provided via DT | |
42 | */ | |
43 | static void __init legacy_init_ehci_clk(char *clkname) | |
44 | { | |
45 | int ret; | |
46 | ||
47 | ret = clk_add_alias("main_clk", NULL, clkname, NULL); | |
48 | if (ret) { | |
49 | pr_err("%s:Failed to add main_clk alias to %s :%d\n", | |
50 | __func__, clkname, ret); | |
51 | } | |
52 | } | |
53 | ||
1dbae815 TL |
54 | static void __init omap_generic_init(void) |
55 | { | |
a4ca9dbe | 56 | omap_sdrc_init(NULL, NULL); |
1dbae815 | 57 | |
8d61649d | 58 | of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); |
63d5fc0c TV |
59 | |
60 | /* | |
61 | * HACK: call display setup code for selected boards to enable omapdss. | |
62 | * This will be removed when omapdss supports DT. | |
63 | */ | |
741532c4 | 64 | if (of_machine_is_compatible("ti,omap4-panda")) { |
63d5fc0c | 65 | omap4_panda_display_init_of(); |
741532c4 RQ |
66 | legacy_init_ehci_clk("auxclk3_ck"); |
67 | ||
68 | } | |
63d5fc0c TV |
69 | else if (of_machine_is_compatible("ti,omap4-sdp")) |
70 | omap_4430sdp_display_init_of(); | |
741532c4 RQ |
71 | else if (of_machine_is_compatible("ti,omap5-uevm")) |
72 | legacy_init_ehci_clk("auxclk1_ck"); | |
1dbae815 TL |
73 | } |
74 | ||
0e02a8c1 | 75 | #ifdef CONFIG_SOC_OMAP2420 |
8d61649d BC |
76 | static const char *omap242x_boards_compat[] __initdata = { |
77 | "ti,omap2420", | |
78 | NULL, | |
79 | }; | |
80 | ||
81 | DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |
82 | .reserve = omap_reserve, | |
83 | .map_io = omap242x_map_io, | |
84 | .init_early = omap2420_init_early, | |
c4082d49 | 85 | .init_irq = omap_intc_of_init, |
b755706c | 86 | .handle_irq = omap2_intc_handle_irq, |
8d61649d | 87 | .init_machine = omap_generic_init, |
6bb27d73 | 88 | .init_time = omap2_sync32k_timer_init, |
8d61649d | 89 | .dt_compat = omap242x_boards_compat, |
187e3e06 | 90 | .restart = omap2xxx_restart, |
8d61649d BC |
91 | MACHINE_END |
92 | #endif | |
93 | ||
0e02a8c1 | 94 | #ifdef CONFIG_SOC_OMAP2430 |
8d61649d BC |
95 | static const char *omap243x_boards_compat[] __initdata = { |
96 | "ti,omap2430", | |
97 | NULL, | |
98 | }; | |
99 | ||
100 | DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |
71ee7dad | 101 | .reserve = omap_reserve, |
8d61649d BC |
102 | .map_io = omap243x_map_io, |
103 | .init_early = omap2430_init_early, | |
c4082d49 | 104 | .init_irq = omap_intc_of_init, |
6b2f55d7 | 105 | .handle_irq = omap2_intc_handle_irq, |
1dbae815 | 106 | .init_machine = omap_generic_init, |
6bb27d73 | 107 | .init_time = omap2_sync32k_timer_init, |
8d61649d | 108 | .dt_compat = omap243x_boards_compat, |
187e3e06 | 109 | .restart = omap2xxx_restart, |
8d61649d BC |
110 | MACHINE_END |
111 | #endif | |
112 | ||
0e02a8c1 | 113 | #ifdef CONFIG_ARCH_OMAP3 |
8d61649d BC |
114 | static const char *omap3_boards_compat[] __initdata = { |
115 | "ti,omap3", | |
116 | NULL, | |
117 | }; | |
118 | ||
119 | DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |
120 | .reserve = omap_reserve, | |
121 | .map_io = omap3_map_io, | |
122 | .init_early = omap3430_init_early, | |
c4082d49 | 123 | .init_irq = omap_intc_of_init, |
b755706c | 124 | .handle_irq = omap3_intc_handle_irq, |
93651b85 | 125 | .init_machine = omap_generic_init, |
990fa4f5 | 126 | .init_late = omap3_init_late, |
6bb27d73 | 127 | .init_time = omap3_sync32k_timer_init, |
8d61649d | 128 | .dt_compat = omap3_boards_compat, |
187e3e06 | 129 | .restart = omap3xxx_restart, |
8d61649d | 130 | MACHINE_END |
7dd9d502 JH |
131 | |
132 | static const char *omap3_gp_boards_compat[] __initdata = { | |
133 | "ti,omap3-beagle", | |
4bfe6341 | 134 | "timll,omap3-devkit8000", |
7dd9d502 JH |
135 | NULL, |
136 | }; | |
137 | ||
138 | DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | |
139 | .reserve = omap_reserve, | |
140 | .map_io = omap3_map_io, | |
141 | .init_early = omap3430_init_early, | |
142 | .init_irq = omap_intc_of_init, | |
143 | .handle_irq = omap3_intc_handle_irq, | |
144 | .init_machine = omap_generic_init, | |
990fa4f5 | 145 | .init_late = omap3_init_late, |
6bb27d73 | 146 | .init_time = omap3_secure_sync32k_timer_init, |
7dd9d502 | 147 | .dt_compat = omap3_gp_boards_compat, |
d01e4afd | 148 | .restart = omap3xxx_restart, |
8d61649d BC |
149 | MACHINE_END |
150 | #endif | |
151 | ||
08f30989 AM |
152 | #ifdef CONFIG_SOC_AM33XX |
153 | static const char *am33xx_boards_compat[] __initdata = { | |
154 | "ti,am33xx", | |
155 | NULL, | |
156 | }; | |
157 | ||
158 | DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") | |
159 | .reserve = omap_reserve, | |
160 | .map_io = am33xx_map_io, | |
161 | .init_early = am33xx_init_early, | |
c4082d49 | 162 | .init_irq = omap_intc_of_init, |
08f30989 AM |
163 | .handle_irq = omap3_intc_handle_irq, |
164 | .init_machine = omap_generic_init, | |
00ea4d56 | 165 | .init_time = omap3_gptimer_timer_init, |
08f30989 | 166 | .dt_compat = am33xx_boards_compat, |
14e067c1 | 167 | .restart = am33xx_restart, |
08f30989 AM |
168 | MACHINE_END |
169 | #endif | |
170 | ||
0e02a8c1 | 171 | #ifdef CONFIG_ARCH_OMAP4 |
8d61649d BC |
172 | static const char *omap4_boards_compat[] __initdata = { |
173 | "ti,omap4", | |
174 | NULL, | |
175 | }; | |
176 | ||
177 | DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |
178 | .reserve = omap_reserve, | |
06915321 | 179 | .smp = smp_ops(omap4_smp_ops), |
8d61649d BC |
180 | .map_io = omap4_map_io, |
181 | .init_early = omap4430_init_early, | |
c4082d49 | 182 | .init_irq = omap_gic_of_init, |
93651b85 | 183 | .init_machine = omap_generic_init, |
bbd707ac | 184 | .init_late = omap4430_init_late, |
6bb27d73 | 185 | .init_time = omap4_local_timer_init, |
8d61649d | 186 | .dt_compat = omap4_boards_compat, |
187e3e06 | 187 | .restart = omap44xx_restart, |
1dbae815 | 188 | MACHINE_END |
8d61649d | 189 | #endif |
0c1b6fac S |
190 | |
191 | #ifdef CONFIG_SOC_OMAP5 | |
192 | static const char *omap5_boards_compat[] __initdata = { | |
193 | "ti,omap5", | |
194 | NULL, | |
195 | }; | |
196 | ||
197 | DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") | |
198 | .reserve = omap_reserve, | |
06915321 | 199 | .smp = smp_ops(omap4_smp_ops), |
0c1b6fac S |
200 | .map_io = omap5_map_io, |
201 | .init_early = omap5_init_early, | |
202 | .init_irq = omap_gic_of_init, | |
0c1b6fac | 203 | .init_machine = omap_generic_init, |
6bb27d73 | 204 | .init_time = omap5_realtime_timer_init, |
0c1b6fac | 205 | .dt_compat = omap5_boards_compat, |
187e3e06 | 206 | .restart = omap44xx_restart, |
0c1b6fac S |
207 | MACHINE_END |
208 | #endif | |
bb256f80 AM |
209 | |
210 | #ifdef CONFIG_SOC_AM43XX | |
211 | static const char *am43_boards_compat[] __initdata = { | |
212 | "ti,am43", | |
213 | NULL, | |
214 | }; | |
215 | ||
216 | DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") | |
217 | .map_io = am33xx_map_io, | |
218 | .init_early = am43xx_init_early, | |
219 | .init_irq = omap_gic_of_init, | |
220 | .init_machine = omap_generic_init, | |
221 | .init_time = omap3_sync32k_timer_init, | |
222 | .dt_compat = am43_boards_compat, | |
223 | MACHINE_END | |
224 | #endif | |
439bf39e S |
225 | |
226 | #ifdef CONFIG_SOC_DRA7XX | |
227 | static const char *dra7xx_boards_compat[] __initdata = { | |
228 | "ti,dra7", | |
229 | NULL, | |
230 | }; | |
231 | ||
232 | DT_MACHINE_START(DRA7XX_DT, "Generic DRA7XX (Flattened Device Tree)") | |
233 | .reserve = omap_reserve, | |
234 | .smp = smp_ops(omap4_smp_ops), | |
235 | .map_io = omap5_map_io, | |
236 | .init_early = dra7xx_init_early, | |
237 | .init_irq = omap_gic_of_init, | |
238 | .init_machine = omap_generic_init, | |
239 | .init_time = omap5_realtime_timer_init, | |
240 | .dt_compat = dra7xx_boards_compat, | |
1d597b07 | 241 | .restart = omap44xx_restart, |
439bf39e S |
242 | MACHINE_END |
243 | #endif |