Commit | Line | Data |
---|---|---|
1dbae815 | 1 | /* |
1dbae815 TL |
2 | * Copyright (C) 2005 Nokia Corporation |
3 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
4 | * | |
8d61649d | 5 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
1dbae815 | 6 | * |
8d61649d BC |
7 | * Modified from the original mach-omap/omap2/board-generic.c did by Paul |
8 | * to support the OMAP2+ device tree boards with an unique board file. | |
1dbae815 TL |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
8d61649d | 14 | #include <linux/io.h> |
fbf75da7 | 15 | #include <linux/of_irq.h> |
8d61649d BC |
16 | #include <linux/of_platform.h> |
17 | #include <linux/irqdomain.h> | |
1dbae815 | 18 | |
8c51b034 | 19 | #include <asm/setup.h> |
1dbae815 | 20 | #include <asm/mach/arch.h> |
1dbae815 | 21 | |
4e65331c | 22 | #include "common.h" |
8d61649d | 23 | |
31957609 | 24 | static const struct of_device_id omap_dt_match_table[] __initconst = { |
8d61649d BC |
25 | { .compatible = "simple-bus", }, |
26 | { .compatible = "ti,omap-infra", }, | |
27 | { } | |
b3c6df3a PW |
28 | }; |
29 | ||
1dbae815 TL |
30 | static void __init omap_generic_init(void) |
31 | { | |
6a0e6b38 TV |
32 | omapdss_early_init_of(); |
33 | ||
8651bd8c | 34 | pdata_quirks_init(omap_dt_match_table); |
dcdf407b TV |
35 | |
36 | omapdss_init_of(); | |
1dbae815 TL |
37 | } |
38 | ||
0e02a8c1 | 39 | #ifdef CONFIG_SOC_OMAP2420 |
58cda01e | 40 | static const char *const omap242x_boards_compat[] __initconst = { |
8d61649d BC |
41 | "ti,omap2420", |
42 | NULL, | |
43 | }; | |
44 | ||
45 | DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |
46 | .reserve = omap_reserve, | |
47 | .map_io = omap242x_map_io, | |
48 | .init_early = omap2420_init_early, | |
8d61649d | 49 | .init_machine = omap_generic_init, |
6f82e25d | 50 | .init_time = omap_init_time, |
8d61649d | 51 | .dt_compat = omap242x_boards_compat, |
187e3e06 | 52 | .restart = omap2xxx_restart, |
8d61649d BC |
53 | MACHINE_END |
54 | #endif | |
55 | ||
0e02a8c1 | 56 | #ifdef CONFIG_SOC_OMAP2430 |
58cda01e | 57 | static const char *const omap243x_boards_compat[] __initconst = { |
8d61649d BC |
58 | "ti,omap2430", |
59 | NULL, | |
60 | }; | |
61 | ||
62 | DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |
71ee7dad | 63 | .reserve = omap_reserve, |
8d61649d BC |
64 | .map_io = omap243x_map_io, |
65 | .init_early = omap2430_init_early, | |
1dbae815 | 66 | .init_machine = omap_generic_init, |
6f82e25d | 67 | .init_time = omap_init_time, |
8d61649d | 68 | .dt_compat = omap243x_boards_compat, |
187e3e06 | 69 | .restart = omap2xxx_restart, |
8d61649d BC |
70 | MACHINE_END |
71 | #endif | |
72 | ||
0e02a8c1 | 73 | #ifdef CONFIG_ARCH_OMAP3 |
71c4f602 TL |
74 | /* Some boards need board name for legacy userspace in /proc/cpuinfo */ |
75 | static const char *const n900_boards_compat[] __initconst = { | |
76 | "nokia,omap3-n900", | |
77 | NULL, | |
78 | }; | |
79 | ||
8c51b034 ID |
80 | /* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags, |
81 | * save them while the data is still not overwritten | |
82 | */ | |
83 | static void __init rx51_reserve(void) | |
84 | { | |
85 | save_atags((const struct tag *)(PAGE_OFFSET + 0x100)); | |
86 | omap_reserve(); | |
87 | } | |
88 | ||
71c4f602 | 89 | DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board") |
8c51b034 | 90 | .reserve = rx51_reserve, |
71c4f602 TL |
91 | .map_io = omap3_map_io, |
92 | .init_early = omap3430_init_early, | |
93 | .init_machine = omap_generic_init, | |
94 | .init_late = omap3_init_late, | |
6f82e25d | 95 | .init_time = omap_init_time, |
71c4f602 TL |
96 | .dt_compat = n900_boards_compat, |
97 | .restart = omap3xxx_restart, | |
98 | MACHINE_END | |
99 | ||
100 | /* Generic omap3 boards, most boards can use these */ | |
58cda01e | 101 | static const char *const omap3_boards_compat[] __initconst = { |
b83a08fe | 102 | "ti,omap3430", |
8d61649d BC |
103 | "ti,omap3", |
104 | NULL, | |
105 | }; | |
106 | ||
107 | DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |
108 | .reserve = omap_reserve, | |
109 | .map_io = omap3_map_io, | |
110 | .init_early = omap3430_init_early, | |
93651b85 | 111 | .init_machine = omap_generic_init, |
990fa4f5 | 112 | .init_late = omap3_init_late, |
6f82e25d | 113 | .init_time = omap_init_time, |
8d61649d | 114 | .dt_compat = omap3_boards_compat, |
187e3e06 | 115 | .restart = omap3xxx_restart, |
8d61649d | 116 | MACHINE_END |
7dd9d502 | 117 | |
58cda01e | 118 | static const char *const omap36xx_boards_compat[] __initconst = { |
57df5380 | 119 | "ti,omap3630", |
016c12d2 NM |
120 | "ti,omap36xx", |
121 | NULL, | |
122 | }; | |
123 | ||
124 | DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") | |
125 | .reserve = omap_reserve, | |
126 | .map_io = omap3_map_io, | |
127 | .init_early = omap3630_init_early, | |
016c12d2 NM |
128 | .init_machine = omap_generic_init, |
129 | .init_late = omap3_init_late, | |
6f82e25d | 130 | .init_time = omap_init_time, |
016c12d2 NM |
131 | .dt_compat = omap36xx_boards_compat, |
132 | .restart = omap3xxx_restart, | |
133 | MACHINE_END | |
134 | ||
58cda01e | 135 | static const char *const omap3_gp_boards_compat[] __initconst = { |
7dd9d502 | 136 | "ti,omap3-beagle", |
4bfe6341 | 137 | "timll,omap3-devkit8000", |
7dd9d502 JH |
138 | NULL, |
139 | }; | |
140 | ||
141 | DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | |
142 | .reserve = omap_reserve, | |
143 | .map_io = omap3_map_io, | |
144 | .init_early = omap3430_init_early, | |
7dd9d502 | 145 | .init_machine = omap_generic_init, |
990fa4f5 | 146 | .init_late = omap3_init_late, |
6bb27d73 | 147 | .init_time = omap3_secure_sync32k_timer_init, |
7dd9d502 | 148 | .dt_compat = omap3_gp_boards_compat, |
d01e4afd | 149 | .restart = omap3xxx_restart, |
8d61649d | 150 | MACHINE_END |
caef4ee8 | 151 | |
58cda01e | 152 | static const char *const am3517_boards_compat[] __initconst = { |
caef4ee8 NM |
153 | "ti,am3517", |
154 | NULL, | |
155 | }; | |
156 | ||
157 | DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)") | |
158 | .reserve = omap_reserve, | |
159 | .map_io = omap3_map_io, | |
160 | .init_early = am35xx_init_early, | |
caef4ee8 NM |
161 | .init_machine = omap_generic_init, |
162 | .init_late = omap3_init_late, | |
163 | .init_time = omap3_gptimer_timer_init, | |
164 | .dt_compat = am3517_boards_compat, | |
165 | .restart = omap3xxx_restart, | |
166 | MACHINE_END | |
8d61649d BC |
167 | #endif |
168 | ||
abf8cc1d TL |
169 | #ifdef CONFIG_SOC_TI81XX |
170 | static const char *const ti814x_boards_compat[] __initconst = { | |
171 | "ti,dm8148", | |
172 | "ti,dm814", | |
173 | NULL, | |
174 | }; | |
175 | ||
9fd274c0 | 176 | DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)") |
abf8cc1d TL |
177 | .reserve = omap_reserve, |
178 | .map_io = ti81xx_map_io, | |
179 | .init_early = ti814x_init_early, | |
180 | .init_machine = omap_generic_init, | |
181 | .init_late = ti81xx_init_late, | |
182 | .init_time = omap3_gptimer_timer_init, | |
183 | .dt_compat = ti814x_boards_compat, | |
184 | .restart = ti81xx_restart, | |
185 | MACHINE_END | |
186 | ||
187 | static const char *const ti816x_boards_compat[] __initconst = { | |
188 | "ti,dm8168", | |
189 | "ti,dm816", | |
190 | NULL, | |
191 | }; | |
192 | ||
193 | DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)") | |
194 | .reserve = omap_reserve, | |
195 | .map_io = ti81xx_map_io, | |
196 | .init_early = ti816x_init_early, | |
197 | .init_machine = omap_generic_init, | |
198 | .init_late = ti81xx_init_late, | |
199 | .init_time = omap3_gptimer_timer_init, | |
200 | .dt_compat = ti816x_boards_compat, | |
201 | .restart = ti81xx_restart, | |
202 | MACHINE_END | |
203 | #endif | |
204 | ||
08f30989 | 205 | #ifdef CONFIG_SOC_AM33XX |
58cda01e | 206 | static const char *const am33xx_boards_compat[] __initconst = { |
08f30989 AM |
207 | "ti,am33xx", |
208 | NULL, | |
209 | }; | |
210 | ||
211 | DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") | |
212 | .reserve = omap_reserve, | |
213 | .map_io = am33xx_map_io, | |
214 | .init_early = am33xx_init_early, | |
08f30989 | 215 | .init_machine = omap_generic_init, |
765e7a06 | 216 | .init_late = am33xx_init_late, |
00ea4d56 | 217 | .init_time = omap3_gptimer_timer_init, |
08f30989 | 218 | .dt_compat = am33xx_boards_compat, |
14e067c1 | 219 | .restart = am33xx_restart, |
08f30989 AM |
220 | MACHINE_END |
221 | #endif | |
222 | ||
0e02a8c1 | 223 | #ifdef CONFIG_ARCH_OMAP4 |
58cda01e | 224 | static const char *const omap4_boards_compat[] __initconst = { |
b83a08fe NM |
225 | "ti,omap4460", |
226 | "ti,omap4430", | |
8d61649d BC |
227 | "ti,omap4", |
228 | NULL, | |
229 | }; | |
230 | ||
231 | DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |
944e9df1 MS |
232 | .l2c_aux_val = OMAP_L2C_AUX_CTRL, |
233 | .l2c_aux_mask = 0xcf9fffff, | |
234 | .l2c_write_sec = omap4_l2c310_write_sec, | |
8d61649d | 235 | .reserve = omap_reserve, |
06915321 | 236 | .smp = smp_ops(omap4_smp_ops), |
8d61649d BC |
237 | .map_io = omap4_map_io, |
238 | .init_early = omap4430_init_early, | |
c4082d49 | 239 | .init_irq = omap_gic_of_init, |
93651b85 | 240 | .init_machine = omap_generic_init, |
bbd707ac | 241 | .init_late = omap4430_init_late, |
6bb27d73 | 242 | .init_time = omap4_local_timer_init, |
8d61649d | 243 | .dt_compat = omap4_boards_compat, |
187e3e06 | 244 | .restart = omap44xx_restart, |
1dbae815 | 245 | MACHINE_END |
8d61649d | 246 | #endif |
0c1b6fac S |
247 | |
248 | #ifdef CONFIG_SOC_OMAP5 | |
58cda01e | 249 | static const char *const omap5_boards_compat[] __initconst = { |
b83a08fe NM |
250 | "ti,omap5432", |
251 | "ti,omap5430", | |
0c1b6fac S |
252 | "ti,omap5", |
253 | NULL, | |
254 | }; | |
255 | ||
256 | DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") | |
6a3b764b TL |
257 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
258 | .dma_zone_size = SZ_2G, | |
259 | #endif | |
0c1b6fac | 260 | .reserve = omap_reserve, |
06915321 | 261 | .smp = smp_ops(omap4_smp_ops), |
0c1b6fac S |
262 | .map_io = omap5_map_io, |
263 | .init_early = omap5_init_early, | |
264 | .init_irq = omap_gic_of_init, | |
0c1b6fac | 265 | .init_machine = omap_generic_init, |
765e7a06 | 266 | .init_late = omap5_init_late, |
6bb27d73 | 267 | .init_time = omap5_realtime_timer_init, |
0c1b6fac | 268 | .dt_compat = omap5_boards_compat, |
187e3e06 | 269 | .restart = omap44xx_restart, |
0c1b6fac S |
270 | MACHINE_END |
271 | #endif | |
bb256f80 AM |
272 | |
273 | #ifdef CONFIG_SOC_AM43XX | |
58cda01e | 274 | static const char *const am43_boards_compat[] __initconst = { |
b83a08fe | 275 | "ti,am4372", |
bb256f80 AM |
276 | "ti,am43", |
277 | NULL, | |
278 | }; | |
279 | ||
280 | DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") | |
944e9df1 MS |
281 | .l2c_aux_val = OMAP_L2C_AUX_CTRL, |
282 | .l2c_aux_mask = 0xcf9fffff, | |
283 | .l2c_write_sec = omap4_l2c310_write_sec, | |
bb256f80 AM |
284 | .map_io = am33xx_map_io, |
285 | .init_early = am43xx_init_early, | |
765e7a06 | 286 | .init_late = am43xx_init_late, |
bb256f80 AM |
287 | .init_irq = omap_gic_of_init, |
288 | .init_machine = omap_generic_init, | |
55ee7017 | 289 | .init_time = omap4_local_timer_init, |
bb256f80 | 290 | .dt_compat = am43_boards_compat, |
a7daf64a | 291 | .restart = omap44xx_restart, |
bb256f80 AM |
292 | MACHINE_END |
293 | #endif | |
439bf39e S |
294 | |
295 | #ifdef CONFIG_SOC_DRA7XX | |
58cda01e | 296 | static const char *const dra74x_boards_compat[] __initconst = { |
0e0cb99d NM |
297 | "ti,am5728", |
298 | "ti,am5726", | |
44e97ff6 | 299 | "ti,dra742", |
439bf39e S |
300 | "ti,dra7", |
301 | NULL, | |
302 | }; | |
303 | ||
44e97ff6 | 304 | DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)") |
6a3b764b TL |
305 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
306 | .dma_zone_size = SZ_2G, | |
307 | #endif | |
439bf39e S |
308 | .reserve = omap_reserve, |
309 | .smp = smp_ops(omap4_smp_ops), | |
ea827ad5 | 310 | .map_io = dra7xx_map_io, |
439bf39e | 311 | .init_early = dra7xx_init_early, |
765e7a06 | 312 | .init_late = dra7xx_init_late, |
439bf39e S |
313 | .init_irq = omap_gic_of_init, |
314 | .init_machine = omap_generic_init, | |
315 | .init_time = omap5_realtime_timer_init, | |
44e97ff6 RN |
316 | .dt_compat = dra74x_boards_compat, |
317 | .restart = omap44xx_restart, | |
318 | MACHINE_END | |
319 | ||
58cda01e | 320 | static const char *const dra72x_boards_compat[] __initconst = { |
0e0cb99d NM |
321 | "ti,am5718", |
322 | "ti,am5716", | |
44e97ff6 RN |
323 | "ti,dra722", |
324 | NULL, | |
325 | }; | |
326 | ||
327 | DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)") | |
6a3b764b TL |
328 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
329 | .dma_zone_size = SZ_2G, | |
330 | #endif | |
44e97ff6 | 331 | .reserve = omap_reserve, |
ea827ad5 | 332 | .map_io = dra7xx_map_io, |
44e97ff6 RN |
333 | .init_early = dra7xx_init_early, |
334 | .init_late = dra7xx_init_late, | |
335 | .init_irq = omap_gic_of_init, | |
336 | .init_machine = omap_generic_init, | |
337 | .init_time = omap5_realtime_timer_init, | |
338 | .dt_compat = dra72x_boards_compat, | |
1d597b07 | 339 | .restart = omap44xx_restart, |
439bf39e S |
340 | MACHINE_END |
341 | #endif |