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ARM: omap2: make arrays containing machine compatible strings const
[deliverable/linux.git] / arch / arm / mach-omap2 / board-generic.c
CommitLineData
1dbae815 1/*
1dbae815
TL		 2 * Copyright (C) 2005 Nokia Corporation
3 * Author: Paul Mundt <paul.mundt@nokia.com>
4 *
8d61649d 5 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
1dbae815 6 *
8d61649d
BC		 7 * Modified from the original mach-omap/omap2/board-generic.c did by Paul
8 * to support the OMAP2+ device tree boards with an unique board file.
1dbae815
TL		 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
8d61649d 14#include <linux/io.h>
fbf75da7 15#include <linux/of_irq.h>
8d61649d
BC		 16#include <linux/of_platform.h>
17#include <linux/irqdomain.h>
1dbae815 18
1dbae815 19#include <asm/mach/arch.h>
1dbae815 20
4e65331c 21#include "common.h"
8d61649d 22
75a57fe9 23#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
c4082d49 24#define intc_of_init NULL
75a57fe9
TL		 25#endif
26#ifndef CONFIG_ARCH_OMAP4
27#define gic_of_init NULL
28#endif
29
8d61649d
BC		 30static struct of_device_id omap_dt_match_table[] __initdata = {
31 { .compatible = "simple-bus", },
32 { .compatible = "ti,omap-infra", },
33 { }
b3c6df3a
PW		 34};
35
1dbae815
TL		 36static void __init omap_generic_init(void)
37{
6a0e6b38
TV		 38 omapdss_early_init_of();
39
8651bd8c 40 pdata_quirks_init(omap_dt_match_table);
dcdf407b
TV		 41
42 omapdss_init_of();
1dbae815
TL		 43}
44
0e02a8c1 45#ifdef CONFIG_SOC_OMAP2420
58cda01e 46static const char *const omap242x_boards_compat[] __initconst = {
8d61649d
BC		 47 "ti,omap2420",
48 NULL,
49};
50
51DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
52 .reserve = omap_reserve,
53 .map_io = omap242x_map_io,
54 .init_early = omap2420_init_early,
c4082d49 55 .init_irq = omap_intc_of_init,
b755706c 56 .handle_irq = omap2_intc_handle_irq,
8d61649d 57 .init_machine = omap_generic_init,
6bb27d73 58 .init_time = omap2_sync32k_timer_init,
8d61649d 59 .dt_compat = omap242x_boards_compat,
187e3e06 60 .restart = omap2xxx_restart,
8d61649d
BC		 61MACHINE_END
62#endif
63
0e02a8c1 64#ifdef CONFIG_SOC_OMAP2430
58cda01e 65static const char *const omap243x_boards_compat[] __initconst = {
8d61649d
BC		 66 "ti,omap2430",
67 NULL,
68};
69
70DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
71ee7dad 71 .reserve = omap_reserve,
8d61649d
BC		 72 .map_io = omap243x_map_io,
73 .init_early = omap2430_init_early,
c4082d49 74 .init_irq = omap_intc_of_init,
6b2f55d7 75 .handle_irq = omap2_intc_handle_irq,
1dbae815 76 .init_machine = omap_generic_init,
6bb27d73 77 .init_time = omap2_sync32k_timer_init,
8d61649d 78 .dt_compat = omap243x_boards_compat,
187e3e06 79 .restart = omap2xxx_restart,
8d61649d
BC		 80MACHINE_END
81#endif
82
0e02a8c1 83#ifdef CONFIG_ARCH_OMAP3
58cda01e 84static const char *const omap3_boards_compat[] __initconst = {
b83a08fe 85 "ti,omap3430",
8d61649d
BC		 86 "ti,omap3",
87 NULL,
88};
89
90DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
91 .reserve = omap_reserve,
92 .map_io = omap3_map_io,
93 .init_early = omap3430_init_early,
c4082d49 94 .init_irq = omap_intc_of_init,
b755706c 95 .handle_irq = omap3_intc_handle_irq,
93651b85 96 .init_machine = omap_generic_init,
990fa4f5 97 .init_late = omap3_init_late,
6bb27d73 98 .init_time = omap3_sync32k_timer_init,
8d61649d 99 .dt_compat = omap3_boards_compat,
187e3e06 100 .restart = omap3xxx_restart,
8d61649d 101MACHINE_END
7dd9d502 102
58cda01e 103static const char *const omap36xx_boards_compat[] __initconst = {
016c12d2
NM		 104 "ti,omap36xx",
105 NULL,
106};
107
108DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
109 .reserve = omap_reserve,
110 .map_io = omap3_map_io,
111 .init_early = omap3630_init_early,
112 .init_irq = omap_intc_of_init,
113 .handle_irq = omap3_intc_handle_irq,
114 .init_machine = omap_generic_init,
115 .init_late = omap3_init_late,
116 .init_time = omap3_sync32k_timer_init,
117 .dt_compat = omap36xx_boards_compat,
118 .restart = omap3xxx_restart,
119MACHINE_END
120
58cda01e 121static const char *const omap3_gp_boards_compat[] __initconst = {
7dd9d502 122 "ti,omap3-beagle",
4bfe6341 123 "timll,omap3-devkit8000",
7dd9d502
JH		 124 NULL,
125};
126
127DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
128 .reserve = omap_reserve,
129 .map_io = omap3_map_io,
130 .init_early = omap3430_init_early,
131 .init_irq = omap_intc_of_init,
132 .handle_irq = omap3_intc_handle_irq,
133 .init_machine = omap_generic_init,
990fa4f5 134 .init_late = omap3_init_late,
6bb27d73 135 .init_time = omap3_secure_sync32k_timer_init,
7dd9d502 136 .dt_compat = omap3_gp_boards_compat,
d01e4afd 137 .restart = omap3xxx_restart,
8d61649d 138MACHINE_END
caef4ee8 139
58cda01e 140static const char *const am3517_boards_compat[] __initconst = {
caef4ee8
NM		 141 "ti,am3517",
142 NULL,
143};
144
145DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
146 .reserve = omap_reserve,
147 .map_io = omap3_map_io,
148 .init_early = am35xx_init_early,
149 .init_irq = omap_intc_of_init,
150 .handle_irq = omap3_intc_handle_irq,
151 .init_machine = omap_generic_init,
152 .init_late = omap3_init_late,
153 .init_time = omap3_gptimer_timer_init,
154 .dt_compat = am3517_boards_compat,
155 .restart = omap3xxx_restart,
156MACHINE_END
8d61649d
BC		 157#endif
158
08f30989 159#ifdef CONFIG_SOC_AM33XX
58cda01e 160static const char *const am33xx_boards_compat[] __initconst = {
08f30989
AM		 161 "ti,am33xx",
162 NULL,
163};
164
165DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
166 .reserve = omap_reserve,
167 .map_io = am33xx_map_io,
168 .init_early = am33xx_init_early,
c4082d49 169 .init_irq = omap_intc_of_init,
08f30989
AM		 170 .handle_irq = omap3_intc_handle_irq,
171 .init_machine = omap_generic_init,
765e7a06 172 .init_late = am33xx_init_late,
00ea4d56 173 .init_time = omap3_gptimer_timer_init,
08f30989 174 .dt_compat = am33xx_boards_compat,
14e067c1 175 .restart = am33xx_restart,
08f30989
AM		 176MACHINE_END
177#endif
178
0e02a8c1 179#ifdef CONFIG_ARCH_OMAP4
58cda01e 180static const char *const omap4_boards_compat[] __initconst = {
b83a08fe
NM		 181 "ti,omap4460",
182 "ti,omap4430",
8d61649d
BC		 183 "ti,omap4",
184 NULL,
185};
186
187DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
188 .reserve = omap_reserve,
06915321 189 .smp = smp_ops(omap4_smp_ops),
8d61649d
BC		 190 .map_io = omap4_map_io,
191 .init_early = omap4430_init_early,
c4082d49 192 .init_irq = omap_gic_of_init,
93651b85 193 .init_machine = omap_generic_init,
bbd707ac 194 .init_late = omap4430_init_late,
6bb27d73 195 .init_time = omap4_local_timer_init,
8d61649d 196 .dt_compat = omap4_boards_compat,
187e3e06 197 .restart = omap44xx_restart,
1dbae815 198MACHINE_END
8d61649d 199#endif
0c1b6fac
S		 200
201#ifdef CONFIG_SOC_OMAP5
58cda01e 202static const char *const omap5_boards_compat[] __initconst = {
b83a08fe
NM		 203 "ti,omap5432",
204 "ti,omap5430",
0c1b6fac
S		 205 "ti,omap5",
206 NULL,
207};
208
209DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
210 .reserve = omap_reserve,
06915321 211 .smp = smp_ops(omap4_smp_ops),
0c1b6fac
S		 212 .map_io = omap5_map_io,
213 .init_early = omap5_init_early,
214 .init_irq = omap_gic_of_init,
0c1b6fac 215 .init_machine = omap_generic_init,
765e7a06 216 .init_late = omap5_init_late,
6bb27d73 217 .init_time = omap5_realtime_timer_init,
0c1b6fac 218 .dt_compat = omap5_boards_compat,
187e3e06 219 .restart = omap44xx_restart,
0c1b6fac
S		 220MACHINE_END
221#endif
bb256f80
AM		 222
223#ifdef CONFIG_SOC_AM43XX
58cda01e 224static const char *const am43_boards_compat[] __initconst = {
b83a08fe 225 "ti,am4372",
bb256f80
AM		 226 "ti,am43",
227 NULL,
228};
229
230DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
231 .map_io = am33xx_map_io,
232 .init_early = am43xx_init_early,
765e7a06 233 .init_late = am43xx_init_late,
bb256f80
AM		 234 .init_irq = omap_gic_of_init,
235 .init_machine = omap_generic_init,
5b5c0135 236 .init_time = omap3_gptimer_timer_init,
bb256f80 237 .dt_compat = am43_boards_compat,
a7daf64a 238 .restart = omap44xx_restart,
bb256f80
AM		 239MACHINE_END
240#endif
439bf39e
S		 241
242#ifdef CONFIG_SOC_DRA7XX
58cda01e 243static const char *const dra74x_boards_compat[] __initconst = {
44e97ff6 244 "ti,dra742",
439bf39e
S		 245 "ti,dra7",
246 NULL,
247};
248
44e97ff6 249DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
439bf39e
S		 250 .reserve = omap_reserve,
251 .smp = smp_ops(omap4_smp_ops),
252 .map_io = omap5_map_io,
253 .init_early = dra7xx_init_early,
765e7a06 254 .init_late = dra7xx_init_late,
439bf39e
S		 255 .init_irq = omap_gic_of_init,
256 .init_machine = omap_generic_init,
257 .init_time = omap5_realtime_timer_init,
44e97ff6
RN		 258 .dt_compat = dra74x_boards_compat,
259 .restart = omap44xx_restart,
260MACHINE_END
261
58cda01e 262static const char *const dra72x_boards_compat[] __initconst = {
44e97ff6
RN		 263 "ti,dra722",
264 NULL,
265};
266
267DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
268 .reserve = omap_reserve,
269 .map_io = omap5_map_io,
270 .init_early = dra7xx_init_early,
271 .init_late = dra7xx_init_late,
272 .init_irq = omap_gic_of_init,
273 .init_machine = omap_generic_init,
274 .init_time = omap5_realtime_timer_init,
275 .dt_compat = dra72x_boards_compat,
1d597b07 276 .restart = omap44xx_restart,
439bf39e
S		 277MACHINE_END
278#endif
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