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ARM: OMAP2+: Fix n900 board name for legacy user space
[deliverable/linux.git] / arch / arm / mach-omap2 / board-generic.c
CommitLineData
1dbae815 1/*
1dbae815
TL		 2 * Copyright (C) 2005 Nokia Corporation
3 * Author: Paul Mundt <paul.mundt@nokia.com>
4 *
8d61649d 5 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
1dbae815 6 *
8d61649d
BC		 7 * Modified from the original mach-omap/omap2/board-generic.c did by Paul
8 * to support the OMAP2+ device tree boards with an unique board file.
1dbae815
TL		 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
8d61649d 14#include <linux/io.h>
fbf75da7 15#include <linux/of_irq.h>
8d61649d
BC		 16#include <linux/of_platform.h>
17#include <linux/irqdomain.h>
1dbae815 18
1dbae815 19#include <asm/mach/arch.h>
1dbae815 20
4e65331c 21#include "common.h"
8d61649d 22
75a57fe9 23#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
c4082d49 24#define intc_of_init NULL
75a57fe9
TL		 25#endif
26#ifndef CONFIG_ARCH_OMAP4
27#define gic_of_init NULL
28#endif
29
31957609 30static const struct of_device_id omap_dt_match_table[] __initconst = {
8d61649d
BC		 31 { .compatible = "simple-bus", },
32 { .compatible = "ti,omap-infra", },
33 { }
b3c6df3a
PW		 34};
35
1dbae815
TL		 36static void __init omap_generic_init(void)
37{
6a0e6b38
TV		 38 omapdss_early_init_of();
39
8651bd8c 40 pdata_quirks_init(omap_dt_match_table);
dcdf407b
TV		 41
42 omapdss_init_of();
1dbae815
TL		 43}
44
0e02a8c1 45#ifdef CONFIG_SOC_OMAP2420
58cda01e 46static const char *const omap242x_boards_compat[] __initconst = {
8d61649d
BC		 47 "ti,omap2420",
48 NULL,
49};
50
51DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
52 .reserve = omap_reserve,
53 .map_io = omap242x_map_io,
54 .init_early = omap2420_init_early,
8d61649d 55 .init_machine = omap_generic_init,
6bb27d73 56 .init_time = omap2_sync32k_timer_init,
8d61649d 57 .dt_compat = omap242x_boards_compat,
187e3e06 58 .restart = omap2xxx_restart,
8d61649d
BC		 59MACHINE_END
60#endif
61
0e02a8c1 62#ifdef CONFIG_SOC_OMAP2430
58cda01e 63static const char *const omap243x_boards_compat[] __initconst = {
8d61649d
BC		 64 "ti,omap2430",
65 NULL,
66};
67
68DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
71ee7dad 69 .reserve = omap_reserve,
8d61649d
BC		 70 .map_io = omap243x_map_io,
71 .init_early = omap2430_init_early,
1dbae815 72 .init_machine = omap_generic_init,
6bb27d73 73 .init_time = omap2_sync32k_timer_init,
8d61649d 74 .dt_compat = omap243x_boards_compat,
187e3e06 75 .restart = omap2xxx_restart,
8d61649d
BC		 76MACHINE_END
77#endif
78
0e02a8c1 79#ifdef CONFIG_ARCH_OMAP3
71c4f602
TL		 80/* Some boards need board name for legacy userspace in /proc/cpuinfo */
81static const char *const n900_boards_compat[] __initconst = {
82 "nokia,omap3-n900",
83 NULL,
84};
85
86DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
87 .reserve = omap_reserve,
88 .map_io = omap3_map_io,
89 .init_early = omap3430_init_early,
90 .init_machine = omap_generic_init,
91 .init_late = omap3_init_late,
92 .init_time = omap3_sync32k_timer_init,
93 .dt_compat = n900_boards_compat,
94 .restart = omap3xxx_restart,
95MACHINE_END
96
97/* Generic omap3 boards, most boards can use these */
58cda01e 98static const char *const omap3_boards_compat[] __initconst = {
b83a08fe 99 "ti,omap3430",
8d61649d
BC		 100 "ti,omap3",
101 NULL,
102};
103
104DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
105 .reserve = omap_reserve,
106 .map_io = omap3_map_io,
107 .init_early = omap3430_init_early,
93651b85 108 .init_machine = omap_generic_init,
990fa4f5 109 .init_late = omap3_init_late,
6bb27d73 110 .init_time = omap3_sync32k_timer_init,
8d61649d 111 .dt_compat = omap3_boards_compat,
187e3e06 112 .restart = omap3xxx_restart,
8d61649d 113MACHINE_END
7dd9d502 114
58cda01e 115static const char *const omap36xx_boards_compat[] __initconst = {
016c12d2
NM		 116 "ti,omap36xx",
117 NULL,
118};
119
120DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
121 .reserve = omap_reserve,
122 .map_io = omap3_map_io,
123 .init_early = omap3630_init_early,
016c12d2
NM		 124 .init_machine = omap_generic_init,
125 .init_late = omap3_init_late,
126 .init_time = omap3_sync32k_timer_init,
127 .dt_compat = omap36xx_boards_compat,
128 .restart = omap3xxx_restart,
129MACHINE_END
130
58cda01e 131static const char *const omap3_gp_boards_compat[] __initconst = {
7dd9d502 132 "ti,omap3-beagle",
4bfe6341 133 "timll,omap3-devkit8000",
7dd9d502
JH		 134 NULL,
135};
136
137DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
138 .reserve = omap_reserve,
139 .map_io = omap3_map_io,
140 .init_early = omap3430_init_early,
7dd9d502 141 .init_machine = omap_generic_init,
990fa4f5 142 .init_late = omap3_init_late,
6bb27d73 143 .init_time = omap3_secure_sync32k_timer_init,
7dd9d502 144 .dt_compat = omap3_gp_boards_compat,
d01e4afd 145 .restart = omap3xxx_restart,
8d61649d 146MACHINE_END
caef4ee8 147
58cda01e 148static const char *const am3517_boards_compat[] __initconst = {
caef4ee8
NM		 149 "ti,am3517",
150 NULL,
151};
152
153DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
154 .reserve = omap_reserve,
155 .map_io = omap3_map_io,
156 .init_early = am35xx_init_early,
caef4ee8
NM		 157 .init_machine = omap_generic_init,
158 .init_late = omap3_init_late,
159 .init_time = omap3_gptimer_timer_init,
160 .dt_compat = am3517_boards_compat,
161 .restart = omap3xxx_restart,
162MACHINE_END
8d61649d
BC		 163#endif
164
08f30989 165#ifdef CONFIG_SOC_AM33XX
58cda01e 166static const char *const am33xx_boards_compat[] __initconst = {
08f30989
AM		 167 "ti,am33xx",
168 NULL,
169};
170
171DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
172 .reserve = omap_reserve,
173 .map_io = am33xx_map_io,
174 .init_early = am33xx_init_early,
08f30989 175 .init_machine = omap_generic_init,
765e7a06 176 .init_late = am33xx_init_late,
00ea4d56 177 .init_time = omap3_gptimer_timer_init,
08f30989 178 .dt_compat = am33xx_boards_compat,
14e067c1 179 .restart = am33xx_restart,
08f30989
AM		 180MACHINE_END
181#endif
182
0e02a8c1 183#ifdef CONFIG_ARCH_OMAP4
58cda01e 184static const char *const omap4_boards_compat[] __initconst = {
b83a08fe
NM		 185 "ti,omap4460",
186 "ti,omap4430",
8d61649d
BC		 187 "ti,omap4",
188 NULL,
189};
190
191DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
192 .reserve = omap_reserve,
06915321 193 .smp = smp_ops(omap4_smp_ops),
8d61649d
BC		 194 .map_io = omap4_map_io,
195 .init_early = omap4430_init_early,
c4082d49 196 .init_irq = omap_gic_of_init,
93651b85 197 .init_machine = omap_generic_init,
bbd707ac 198 .init_late = omap4430_init_late,
6bb27d73 199 .init_time = omap4_local_timer_init,
8d61649d 200 .dt_compat = omap4_boards_compat,
187e3e06 201 .restart = omap44xx_restart,
1dbae815 202MACHINE_END
8d61649d 203#endif
0c1b6fac
S		 204
205#ifdef CONFIG_SOC_OMAP5
58cda01e 206static const char *const omap5_boards_compat[] __initconst = {
b83a08fe
NM		 207 "ti,omap5432",
208 "ti,omap5430",
0c1b6fac
S		 209 "ti,omap5",
210 NULL,
211};
212
213DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
214 .reserve = omap_reserve,
06915321 215 .smp = smp_ops(omap4_smp_ops),
0c1b6fac
S		 216 .map_io = omap5_map_io,
217 .init_early = omap5_init_early,
218 .init_irq = omap_gic_of_init,
0c1b6fac 219 .init_machine = omap_generic_init,
765e7a06 220 .init_late = omap5_init_late,
6bb27d73 221 .init_time = omap5_realtime_timer_init,
0c1b6fac 222 .dt_compat = omap5_boards_compat,
187e3e06 223 .restart = omap44xx_restart,
0c1b6fac
S		 224MACHINE_END
225#endif
bb256f80
AM		 226
227#ifdef CONFIG_SOC_AM43XX
58cda01e 228static const char *const am43_boards_compat[] __initconst = {
b83a08fe 229 "ti,am4372",
bb256f80
AM		 230 "ti,am43",
231 NULL,
232};
233
234DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
235 .map_io = am33xx_map_io,
236 .init_early = am43xx_init_early,
765e7a06 237 .init_late = am43xx_init_late,
bb256f80
AM		 238 .init_irq = omap_gic_of_init,
239 .init_machine = omap_generic_init,
5b5c0135 240 .init_time = omap3_gptimer_timer_init,
bb256f80 241 .dt_compat = am43_boards_compat,
a7daf64a 242 .restart = omap44xx_restart,
bb256f80
AM		 243MACHINE_END
244#endif
439bf39e
S		 245
246#ifdef CONFIG_SOC_DRA7XX
58cda01e 247static const char *const dra74x_boards_compat[] __initconst = {
0e0cb99d
NM		 248 "ti,am5728",
249 "ti,am5726",
44e97ff6 250 "ti,dra742",
439bf39e
S		 251 "ti,dra7",
252 NULL,
253};
254
44e97ff6 255DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
439bf39e
S		 256 .reserve = omap_reserve,
257 .smp = smp_ops(omap4_smp_ops),
258 .map_io = omap5_map_io,
259 .init_early = dra7xx_init_early,
765e7a06 260 .init_late = dra7xx_init_late,
439bf39e
S		 261 .init_irq = omap_gic_of_init,
262 .init_machine = omap_generic_init,
263 .init_time = omap5_realtime_timer_init,
44e97ff6
RN		 264 .dt_compat = dra74x_boards_compat,
265 .restart = omap44xx_restart,
266MACHINE_END
267
58cda01e 268static const char *const dra72x_boards_compat[] __initconst = {
0e0cb99d
NM		 269 "ti,am5718",
270 "ti,am5716",
44e97ff6
RN		 271 "ti,dra722",
272 NULL,
273};
274
275DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
276 .reserve = omap_reserve,
277 .map_io = omap5_map_io,
278 .init_early = dra7xx_init_early,
279 .init_late = dra7xx_init_late,
280 .init_irq = omap_gic_of_init,
281 .init_machine = omap_generic_init,
282 .init_time = omap5_realtime_timer_init,
283 .dt_compat = dra72x_boards_compat,
1d597b07 284 .restart = omap44xx_restart,
439bf39e
S		 285MACHINE_END
286#endif
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