Commit | Line | Data |
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1dbae815 | 1 | /* |
1dbae815 TL |
2 | * Copyright (C) 2005 Nokia Corporation |
3 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
4 | * | |
8d61649d | 5 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
1dbae815 | 6 | * |
8d61649d BC |
7 | * Modified from the original mach-omap/omap2/board-generic.c did by Paul |
8 | * to support the OMAP2+ device tree boards with an unique board file. | |
1dbae815 TL |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
8d61649d | 14 | #include <linux/io.h> |
fbf75da7 | 15 | #include <linux/of_irq.h> |
8d61649d BC |
16 | #include <linux/of_platform.h> |
17 | #include <linux/irqdomain.h> | |
1dbae815 | 18 | |
b755706c | 19 | #include <asm/hardware/gic.h> |
1dbae815 | 20 | #include <asm/mach/arch.h> |
1dbae815 | 21 | |
4e65331c | 22 | #include "common.h" |
a7cbb9b1 | 23 | #include "common-board-devices.h" |
63d5fc0c | 24 | #include "dss-common.h" |
8d61649d | 25 | |
75a57fe9 | 26 | #if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) |
c4082d49 | 27 | #define intc_of_init NULL |
75a57fe9 TL |
28 | #endif |
29 | #ifndef CONFIG_ARCH_OMAP4 | |
30 | #define gic_of_init NULL | |
31 | #endif | |
32 | ||
8d61649d BC |
33 | static struct of_device_id omap_dt_match_table[] __initdata = { |
34 | { .compatible = "simple-bus", }, | |
35 | { .compatible = "ti,omap-infra", }, | |
36 | { } | |
b3c6df3a PW |
37 | }; |
38 | ||
1dbae815 TL |
39 | static void __init omap_generic_init(void) |
40 | { | |
a4ca9dbe | 41 | omap_sdrc_init(NULL, NULL); |
1dbae815 | 42 | |
8d61649d | 43 | of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); |
63d5fc0c TV |
44 | |
45 | /* | |
46 | * HACK: call display setup code for selected boards to enable omapdss. | |
47 | * This will be removed when omapdss supports DT. | |
48 | */ | |
49 | if (of_machine_is_compatible("ti,omap4-panda")) | |
50 | omap4_panda_display_init_of(); | |
51 | else if (of_machine_is_compatible("ti,omap4-sdp")) | |
52 | omap_4430sdp_display_init_of(); | |
1dbae815 TL |
53 | } |
54 | ||
0e02a8c1 | 55 | #ifdef CONFIG_SOC_OMAP2420 |
8d61649d BC |
56 | static const char *omap242x_boards_compat[] __initdata = { |
57 | "ti,omap2420", | |
58 | NULL, | |
59 | }; | |
60 | ||
61 | DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |
62 | .reserve = omap_reserve, | |
63 | .map_io = omap242x_map_io, | |
64 | .init_early = omap2420_init_early, | |
c4082d49 | 65 | .init_irq = omap_intc_of_init, |
b755706c | 66 | .handle_irq = omap2_intc_handle_irq, |
8d61649d BC |
67 | .init_machine = omap_generic_init, |
68 | .timer = &omap2_timer, | |
69 | .dt_compat = omap242x_boards_compat, | |
187e3e06 | 70 | .restart = omap2xxx_restart, |
8d61649d BC |
71 | MACHINE_END |
72 | #endif | |
73 | ||
0e02a8c1 | 74 | #ifdef CONFIG_SOC_OMAP2430 |
8d61649d BC |
75 | static const char *omap243x_boards_compat[] __initdata = { |
76 | "ti,omap2430", | |
77 | NULL, | |
78 | }; | |
79 | ||
80 | DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |
71ee7dad | 81 | .reserve = omap_reserve, |
8d61649d BC |
82 | .map_io = omap243x_map_io, |
83 | .init_early = omap2430_init_early, | |
c4082d49 | 84 | .init_irq = omap_intc_of_init, |
6b2f55d7 | 85 | .handle_irq = omap2_intc_handle_irq, |
1dbae815 | 86 | .init_machine = omap_generic_init, |
13340b2a | 87 | .timer = &omap2_timer, |
8d61649d | 88 | .dt_compat = omap243x_boards_compat, |
187e3e06 | 89 | .restart = omap2xxx_restart, |
8d61649d BC |
90 | MACHINE_END |
91 | #endif | |
92 | ||
0e02a8c1 | 93 | #ifdef CONFIG_ARCH_OMAP3 |
8d61649d BC |
94 | static const char *omap3_boards_compat[] __initdata = { |
95 | "ti,omap3", | |
96 | NULL, | |
97 | }; | |
98 | ||
99 | DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |
100 | .reserve = omap_reserve, | |
101 | .map_io = omap3_map_io, | |
102 | .init_early = omap3430_init_early, | |
c4082d49 | 103 | .init_irq = omap_intc_of_init, |
b755706c | 104 | .handle_irq = omap3_intc_handle_irq, |
93651b85 | 105 | .init_machine = omap_generic_init, |
8d61649d BC |
106 | .timer = &omap3_timer, |
107 | .dt_compat = omap3_boards_compat, | |
187e3e06 | 108 | .restart = omap3xxx_restart, |
8d61649d | 109 | MACHINE_END |
7dd9d502 JH |
110 | |
111 | static const char *omap3_gp_boards_compat[] __initdata = { | |
112 | "ti,omap3-beagle", | |
113 | NULL, | |
114 | }; | |
115 | ||
116 | DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | |
117 | .reserve = omap_reserve, | |
118 | .map_io = omap3_map_io, | |
119 | .init_early = omap3430_init_early, | |
120 | .init_irq = omap_intc_of_init, | |
121 | .handle_irq = omap3_intc_handle_irq, | |
122 | .init_machine = omap_generic_init, | |
123 | .timer = &omap3_secure_timer, | |
124 | .dt_compat = omap3_gp_boards_compat, | |
d01e4afd | 125 | .restart = omap3xxx_restart, |
8d61649d BC |
126 | MACHINE_END |
127 | #endif | |
128 | ||
08f30989 AM |
129 | #ifdef CONFIG_SOC_AM33XX |
130 | static const char *am33xx_boards_compat[] __initdata = { | |
131 | "ti,am33xx", | |
132 | NULL, | |
133 | }; | |
134 | ||
135 | DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") | |
136 | .reserve = omap_reserve, | |
137 | .map_io = am33xx_map_io, | |
138 | .init_early = am33xx_init_early, | |
c4082d49 | 139 | .init_irq = omap_intc_of_init, |
08f30989 AM |
140 | .handle_irq = omap3_intc_handle_irq, |
141 | .init_machine = omap_generic_init, | |
142 | .timer = &omap3_am33xx_timer, | |
143 | .dt_compat = am33xx_boards_compat, | |
144 | MACHINE_END | |
145 | #endif | |
146 | ||
0e02a8c1 | 147 | #ifdef CONFIG_ARCH_OMAP4 |
8d61649d BC |
148 | static const char *omap4_boards_compat[] __initdata = { |
149 | "ti,omap4", | |
150 | NULL, | |
151 | }; | |
152 | ||
153 | DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |
154 | .reserve = omap_reserve, | |
06915321 | 155 | .smp = smp_ops(omap4_smp_ops), |
8d61649d BC |
156 | .map_io = omap4_map_io, |
157 | .init_early = omap4430_init_early, | |
c4082d49 | 158 | .init_irq = omap_gic_of_init, |
b755706c | 159 | .handle_irq = gic_handle_irq, |
93651b85 | 160 | .init_machine = omap_generic_init, |
bbd707ac | 161 | .init_late = omap4430_init_late, |
8d61649d BC |
162 | .timer = &omap4_timer, |
163 | .dt_compat = omap4_boards_compat, | |
187e3e06 | 164 | .restart = omap44xx_restart, |
1dbae815 | 165 | MACHINE_END |
8d61649d | 166 | #endif |
0c1b6fac S |
167 | |
168 | #ifdef CONFIG_SOC_OMAP5 | |
169 | static const char *omap5_boards_compat[] __initdata = { | |
170 | "ti,omap5", | |
171 | NULL, | |
172 | }; | |
173 | ||
174 | DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") | |
175 | .reserve = omap_reserve, | |
06915321 | 176 | .smp = smp_ops(omap4_smp_ops), |
0c1b6fac S |
177 | .map_io = omap5_map_io, |
178 | .init_early = omap5_init_early, | |
179 | .init_irq = omap_gic_of_init, | |
180 | .handle_irq = gic_handle_irq, | |
181 | .init_machine = omap_generic_init, | |
182 | .timer = &omap5_timer, | |
183 | .dt_compat = omap5_boards_compat, | |
187e3e06 | 184 | .restart = omap44xx_restart, |
0c1b6fac S |
185 | MACHINE_END |
186 | #endif |