Commit | Line | Data |
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1dbae815 | 1 | /* |
f30c2269 | 2 | * linux/arch/arm/mach-omap2/board-h4.c |
1dbae815 TL |
3 | * |
4 | * Copyright (C) 2005 Nokia Corporation | |
5 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap/omap1/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
2f8163ba | 13 | #include <linux/gpio.h> |
1dbae815 TL |
14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/mtd/mtd.h> | |
18 | #include <linux/mtd/partitions.h> | |
561b036a | 19 | #include <linux/mtd/physmap.h> |
1dbae815 | 20 | #include <linux/delay.h> |
9b6553cd | 21 | #include <linux/workqueue.h> |
9df013b3 | 22 | #include <linux/i2c.h> |
6a769ed4 | 23 | #include <linux/i2c/at24.h> |
9b6553cd | 24 | #include <linux/input.h> |
44595982 PW |
25 | #include <linux/err.h> |
26 | #include <linux/clk.h> | |
fced80c7 | 27 | #include <linux/io.h> |
41eb2d81 | 28 | #include <linux/input/matrix_keypad.h> |
1dbae815 | 29 | |
a09e64fb | 30 | #include <mach/hardware.h> |
1dbae815 TL |
31 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | |
33 | #include <asm/mach/map.h> | |
1dbae815 | 34 | |
4e65331c | 35 | #include "common.h" |
ce491cf8 TL |
36 | #include <plat/menelaus.h> |
37 | #include <plat/dma.h> | |
38 | #include <plat/gpmc.h> | |
801475cc | 39 | #include <plat/debug-devices.h> |
1dbae815 | 40 | |
cbf1455b TV |
41 | #include <video/omapdss.h> |
42 | #include <video/omap-panel-generic-dpi.h> | |
43 | ||
23275d45 | 44 | #include "mux.h" |
4814ced5 | 45 | #include "control.h" |
23275d45 | 46 | |
44595982 PW |
47 | #define H4_FLASH_CS 0 |
48 | #define H4_SMC91X_CS 1 | |
49 | ||
40662d77 TL |
50 | #define H4_ETHR_GPIO_IRQ 92 |
51 | ||
41eb2d81 TL |
52 | #if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE) |
53 | static const uint32_t board_matrix_keys[] = { | |
9b6553cd | 54 | KEY(0, 0, KEY_LEFT), |
da1f026b JK |
55 | KEY(1, 0, KEY_RIGHT), |
56 | KEY(2, 0, KEY_A), | |
57 | KEY(3, 0, KEY_B), | |
58 | KEY(4, 0, KEY_C), | |
59 | KEY(0, 1, KEY_DOWN), | |
9b6553cd | 60 | KEY(1, 1, KEY_UP), |
da1f026b JK |
61 | KEY(2, 1, KEY_E), |
62 | KEY(3, 1, KEY_F), | |
63 | KEY(4, 1, KEY_G), | |
64 | KEY(0, 2, KEY_ENTER), | |
65 | KEY(1, 2, KEY_I), | |
9b6553cd | 66 | KEY(2, 2, KEY_J), |
da1f026b JK |
67 | KEY(3, 2, KEY_K), |
68 | KEY(4, 2, KEY_3), | |
69 | KEY(0, 3, KEY_M), | |
70 | KEY(1, 3, KEY_N), | |
71 | KEY(2, 3, KEY_O), | |
9b6553cd | 72 | KEY(3, 3, KEY_P), |
da1f026b JK |
73 | KEY(4, 3, KEY_Q), |
74 | KEY(0, 4, KEY_R), | |
75 | KEY(1, 4, KEY_4), | |
76 | KEY(2, 4, KEY_T), | |
77 | KEY(3, 4, KEY_U), | |
9b6553cd | 78 | KEY(4, 4, KEY_ENTER), |
da1f026b JK |
79 | KEY(0, 5, KEY_V), |
80 | KEY(1, 5, KEY_W), | |
81 | KEY(2, 5, KEY_L), | |
82 | KEY(3, 5, KEY_S), | |
83 | KEY(4, 5, KEY_ENTER), | |
9b6553cd TL |
84 | }; |
85 | ||
41eb2d81 TL |
86 | static const struct matrix_keymap_data board_keymap_data = { |
87 | .keymap = board_matrix_keys, | |
88 | .keymap_size = ARRAY_SIZE(board_matrix_keys), | |
89 | }; | |
90 | ||
91 | static unsigned int board_keypad_row_gpios[] = { | |
92 | 88, 89, 124, 11, 6, 96 | |
93 | }; | |
94 | ||
95 | static unsigned int board_keypad_col_gpios[] = { | |
96 | 90, 91, 100, 36, 12, 97, 98 | |
97 | }; | |
98 | ||
99 | static struct matrix_keypad_platform_data board_keypad_platform_data = { | |
100 | .keymap_data = &board_keymap_data, | |
101 | .row_gpios = board_keypad_row_gpios, | |
102 | .num_row_gpios = ARRAY_SIZE(board_keypad_row_gpios), | |
103 | .col_gpios = board_keypad_col_gpios, | |
104 | .num_col_gpios = ARRAY_SIZE(board_keypad_col_gpios), | |
105 | .active_low = 1, | |
106 | ||
107 | .debounce_ms = 20, | |
108 | .col_scan_delay_us = 5, | |
109 | }; | |
110 | ||
111 | static struct platform_device board_keyboard = { | |
112 | .name = "matrix-keypad", | |
113 | .id = -1, | |
114 | .dev = { | |
115 | .platform_data = &board_keypad_platform_data, | |
116 | }, | |
117 | }; | |
118 | static void __init board_mkp_init(void) | |
119 | { | |
120 | omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP); | |
121 | omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP); | |
122 | omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP); | |
123 | omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP); | |
124 | if (omap_has_menelaus()) { | |
125 | omap_mux_init_signal("sdrc_a14.gpio0", | |
126 | OMAP_PULL_ENA | OMAP_PULL_UP); | |
127 | omap_mux_init_signal("vlynq_rx0.gpio_15", 0); | |
128 | omap_mux_init_signal("gpio_98", 0); | |
129 | board_keypad_row_gpios[5] = 0; | |
130 | board_keypad_col_gpios[2] = 15; | |
131 | board_keypad_col_gpios[6] = 18; | |
132 | } else { | |
133 | omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP); | |
134 | omap_mux_init_signal("gpio_100", 0); | |
135 | omap_mux_init_signal("gpio_98", 0); | |
136 | } | |
137 | omap_mux_init_signal("gpio_90", 0); | |
138 | omap_mux_init_signal("gpio_91", 0); | |
139 | omap_mux_init_signal("gpio_36", 0); | |
140 | omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); | |
141 | omap_mux_init_signal("gpio_97", 0); | |
142 | ||
143 | platform_device_register(&board_keyboard); | |
144 | } | |
145 | #else | |
146 | static inline void board_mkp_init(void) | |
147 | { | |
148 | } | |
149 | #endif | |
150 | ||
1dbae815 TL |
151 | static struct mtd_partition h4_partitions[] = { |
152 | /* bootloader (U-Boot, etc) in first sector */ | |
153 | { | |
154 | .name = "bootloader", | |
155 | .offset = 0, | |
156 | .size = SZ_128K, | |
157 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
158 | }, | |
159 | /* bootloader params in the next sector */ | |
160 | { | |
161 | .name = "params", | |
162 | .offset = MTDPART_OFS_APPEND, | |
163 | .size = SZ_128K, | |
164 | .mask_flags = 0, | |
165 | }, | |
166 | /* kernel */ | |
167 | { | |
168 | .name = "kernel", | |
169 | .offset = MTDPART_OFS_APPEND, | |
170 | .size = SZ_2M, | |
171 | .mask_flags = 0 | |
172 | }, | |
173 | /* file system */ | |
174 | { | |
175 | .name = "filesystem", | |
176 | .offset = MTDPART_OFS_APPEND, | |
177 | .size = MTDPART_SIZ_FULL, | |
178 | .mask_flags = 0 | |
179 | } | |
180 | }; | |
181 | ||
561b036a | 182 | static struct physmap_flash_data h4_flash_data = { |
1dbae815 TL |
183 | .width = 2, |
184 | .parts = h4_partitions, | |
185 | .nr_parts = ARRAY_SIZE(h4_partitions), | |
186 | }; | |
187 | ||
188 | static struct resource h4_flash_resource = { | |
1dbae815 TL |
189 | .flags = IORESOURCE_MEM, |
190 | }; | |
191 | ||
192 | static struct platform_device h4_flash_device = { | |
561b036a | 193 | .name = "physmap-flash", |
1dbae815 TL |
194 | .id = 0, |
195 | .dev = { | |
196 | .platform_data = &h4_flash_data, | |
197 | }, | |
198 | .num_resources = 1, | |
199 | .resource = &h4_flash_resource, | |
200 | }; | |
201 | ||
1dbae815 | 202 | static struct platform_device *h4_devices[] __initdata = { |
1dbae815 | 203 | &h4_flash_device, |
cbf1455b TV |
204 | }; |
205 | ||
206 | static struct panel_generic_dpi_data h4_panel_data = { | |
207 | .name = "h4", | |
208 | }; | |
209 | ||
210 | static struct omap_dss_device h4_lcd_device = { | |
211 | .name = "lcd", | |
212 | .driver_name = "generic_dpi_panel", | |
213 | .type = OMAP_DISPLAY_TYPE_DPI, | |
214 | .phy.dpi.data_lines = 16, | |
215 | .data = &h4_panel_data, | |
216 | }; | |
217 | ||
218 | static struct omap_dss_device *h4_dss_devices[] = { | |
9b6553cd | 219 | &h4_lcd_device, |
1dbae815 TL |
220 | }; |
221 | ||
cbf1455b TV |
222 | static struct omap_dss_board_info h4_dss_data = { |
223 | .num_devices = ARRAY_SIZE(h4_dss_devices), | |
224 | .devices = h4_dss_devices, | |
225 | .default_device = &h4_lcd_device, | |
226 | }; | |
227 | ||
44595982 PW |
228 | /* 2420 Sysboot setup (2430 is different) */ |
229 | static u32 get_sysboot_value(void) | |
230 | { | |
231 | return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS) & | |
232 | (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK | | |
233 | OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK | | |
234 | OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK)); | |
235 | } | |
236 | ||
237 | /* H4-2420's always used muxed mode, H4-2422's always use non-muxed | |
238 | * | |
239 | * Note: OMAP-GIT doesn't correctly do is_cpu_omap2422 and is_cpu_omap2423 | |
240 | * correctly. The macro needs to look at production_id not just hawkeye. | |
241 | */ | |
242 | static u32 is_gpmc_muxed(void) | |
243 | { | |
244 | u32 mux; | |
245 | mux = get_sysboot_value(); | |
246 | if ((mux & 0xF) == 0xd) | |
247 | return 1; /* NAND config (could be either) */ | |
248 | if (mux & 0x2) /* if mux'ed */ | |
249 | return 1; | |
250 | else | |
251 | return 0; | |
252 | } | |
253 | ||
f6049312 | 254 | static inline void __init h4_init_debug(void) |
1dbae815 | 255 | { |
44595982 PW |
256 | int eth_cs; |
257 | unsigned long cs_mem_base; | |
258 | unsigned int muxed, rate; | |
259 | struct clk *gpmc_fck; | |
260 | ||
261 | eth_cs = H4_SMC91X_CS; | |
262 | ||
263 | gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ | |
264 | if (IS_ERR(gpmc_fck)) { | |
265 | WARN_ON(1); | |
266 | return; | |
267 | } | |
268 | ||
269 | clk_enable(gpmc_fck); | |
270 | rate = clk_get_rate(gpmc_fck); | |
271 | clk_disable(gpmc_fck); | |
272 | clk_put(gpmc_fck); | |
273 | ||
274 | if (is_gpmc_muxed()) | |
275 | muxed = 0x200; | |
276 | else | |
277 | muxed = 0; | |
278 | ||
1dbae815 | 279 | /* Make sure CS1 timings are correct */ |
44595982 PW |
280 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, |
281 | 0x00011000 | muxed); | |
282 | ||
283 | if (rate >= 160000000) { | |
284 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01); | |
285 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803); | |
286 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a); | |
287 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
288 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
289 | } else if (rate >= 130000000) { | |
290 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
291 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
292 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
293 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
294 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
295 | } else {/* rate = 100000000 */ | |
296 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
297 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
298 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
299 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F); | |
300 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2); | |
301 | } | |
302 | ||
303 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | |
304 | printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); | |
305 | goto out; | |
306 | } | |
307 | ||
1dbae815 TL |
308 | udelay(100); |
309 | ||
f99bf16d | 310 | omap_mux_init_gpio(92, 0); |
40662d77 | 311 | if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0) |
f6049312 | 312 | gpmc_cs_free(eth_cs); |
44595982 PW |
313 | |
314 | out: | |
315 | clk_disable(gpmc_fck); | |
316 | clk_put(gpmc_fck); | |
317 | } | |
318 | ||
319 | static void __init h4_init_flash(void) | |
320 | { | |
321 | unsigned long base; | |
322 | ||
323 | if (gpmc_cs_request(H4_FLASH_CS, SZ_64M, &base) < 0) { | |
324 | printk("Can't request GPMC CS for flash\n"); | |
325 | return; | |
326 | } | |
327 | h4_flash_resource.start = base; | |
328 | h4_flash_resource.end = base + SZ_64M - 1; | |
1dbae815 TL |
329 | } |
330 | ||
6a769ed4 DB |
331 | static struct at24_platform_data m24c01 = { |
332 | .byte_len = SZ_1K / 8, | |
333 | .page_size = 16, | |
334 | }; | |
335 | ||
9df013b3 JD |
336 | static struct i2c_board_info __initdata h4_i2c_board_info[] = { |
337 | { | |
338 | I2C_BOARD_INFO("isp1301_omap", 0x2d), | |
9df013b3 | 339 | }, |
6a769ed4 DB |
340 | { /* EEPROM on mainboard */ |
341 | I2C_BOARD_INFO("24c01", 0x52), | |
342 | .platform_data = &m24c01, | |
343 | }, | |
344 | { /* EEPROM on cpu card */ | |
345 | I2C_BOARD_INFO("24c01", 0x57), | |
346 | .platform_data = &m24c01, | |
347 | }, | |
9df013b3 JD |
348 | }; |
349 | ||
23275d45 TL |
350 | #ifdef CONFIG_OMAP_MUX |
351 | static struct omap_board_mux board_mux[] __initdata = { | |
352 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
353 | }; | |
23275d45 TL |
354 | #endif |
355 | ||
1dbae815 TL |
356 | static void __init omap_h4_init(void) |
357 | { | |
23275d45 TL |
358 | omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAF); |
359 | ||
1dbae815 TL |
360 | /* |
361 | * Make sure the serial ports are muxed on at this point. | |
362 | * You have to mux them off in device drivers later on | |
363 | * if not needed. | |
364 | */ | |
9b6553cd | 365 | |
41eb2d81 | 366 | board_mkp_init(); |
46a0a540 | 367 | h4_i2c_board_info[0].irq = gpio_to_irq(125); |
9df013b3 JD |
368 | i2c_register_board_info(1, h4_i2c_board_info, |
369 | ARRAY_SIZE(h4_i2c_board_info)); | |
370 | ||
1dbae815 | 371 | platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); |
1dbae815 | 372 | omap_serial_init(); |
a4ca9dbe | 373 | omap_sdrc_init(NULL, NULL); |
42924355 | 374 | h4_init_flash(); |
cbf1455b TV |
375 | |
376 | omap_display_init(&h4_dss_data); | |
1dbae815 TL |
377 | } |
378 | ||
1dbae815 TL |
379 | MACHINE_START(OMAP_H4, "OMAP2420 H4 board") |
380 | /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ | |
5e52b435 | 381 | .atag_offset = 0x100, |
71ee7dad | 382 | .reserve = omap_reserve, |
e990a406 | 383 | .map_io = omap242x_map_io, |
8f5b5a41 | 384 | .init_early = omap2420_init_early, |
be732460 | 385 | .init_irq = omap2_init_irq, |
6b2f55d7 | 386 | .handle_irq = omap2_intc_handle_irq, |
1dbae815 | 387 | .init_machine = omap_h4_init, |
bbd707ac | 388 | .init_late = omap2420_init_late, |
e74984e4 | 389 | .timer = &omap2_timer, |
baa95883 | 390 | .restart = omap_prcm_restart, |
1dbae815 | 391 | MACHINE_END |