Commit | Line | Data |
---|---|---|
1dbae815 | 1 | /* |
f30c2269 | 2 | * linux/arch/arm/mach-omap2/board-h4.c |
1dbae815 TL |
3 | * |
4 | * Copyright (C) 2005 Nokia Corporation | |
5 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap/omap1/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
2f8163ba | 13 | #include <linux/gpio.h> |
1dbae815 TL |
14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/mtd/mtd.h> | |
18 | #include <linux/mtd/partitions.h> | |
561b036a | 19 | #include <linux/mtd/physmap.h> |
1dbae815 | 20 | #include <linux/delay.h> |
9b6553cd | 21 | #include <linux/workqueue.h> |
9df013b3 | 22 | #include <linux/i2c.h> |
6a769ed4 | 23 | #include <linux/i2c/at24.h> |
9b6553cd | 24 | #include <linux/input.h> |
44595982 PW |
25 | #include <linux/err.h> |
26 | #include <linux/clk.h> | |
fced80c7 | 27 | #include <linux/io.h> |
41eb2d81 | 28 | #include <linux/input/matrix_keypad.h> |
7bd3b618 | 29 | #include <linux/mfd/menelaus.h> |
1dbae815 | 30 | |
1dbae815 TL |
31 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | |
33 | #include <asm/mach/map.h> | |
1dbae815 | 34 | |
45c3eb7d | 35 | #include <linux/omap-dma.h> |
32dee01e | 36 | #include <plat/debug-devices.h> |
1dbae815 | 37 | |
cbf1455b TV |
38 | #include <video/omapdss.h> |
39 | #include <video/omap-panel-generic-dpi.h> | |
40 | ||
dbc04161 | 41 | #include "common.h" |
23275d45 | 42 | #include "mux.h" |
4814ced5 | 43 | #include "control.h" |
3ef5d007 | 44 | #include "gpmc.h" |
23275d45 | 45 | |
44595982 PW |
46 | #define H4_FLASH_CS 0 |
47 | #define H4_SMC91X_CS 1 | |
48 | ||
40662d77 TL |
49 | #define H4_ETHR_GPIO_IRQ 92 |
50 | ||
41eb2d81 TL |
51 | #if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE) |
52 | static const uint32_t board_matrix_keys[] = { | |
9b6553cd | 53 | KEY(0, 0, KEY_LEFT), |
da1f026b JK |
54 | KEY(1, 0, KEY_RIGHT), |
55 | KEY(2, 0, KEY_A), | |
56 | KEY(3, 0, KEY_B), | |
57 | KEY(4, 0, KEY_C), | |
58 | KEY(0, 1, KEY_DOWN), | |
9b6553cd | 59 | KEY(1, 1, KEY_UP), |
da1f026b JK |
60 | KEY(2, 1, KEY_E), |
61 | KEY(3, 1, KEY_F), | |
62 | KEY(4, 1, KEY_G), | |
63 | KEY(0, 2, KEY_ENTER), | |
64 | KEY(1, 2, KEY_I), | |
9b6553cd | 65 | KEY(2, 2, KEY_J), |
da1f026b JK |
66 | KEY(3, 2, KEY_K), |
67 | KEY(4, 2, KEY_3), | |
68 | KEY(0, 3, KEY_M), | |
69 | KEY(1, 3, KEY_N), | |
70 | KEY(2, 3, KEY_O), | |
9b6553cd | 71 | KEY(3, 3, KEY_P), |
da1f026b JK |
72 | KEY(4, 3, KEY_Q), |
73 | KEY(0, 4, KEY_R), | |
74 | KEY(1, 4, KEY_4), | |
75 | KEY(2, 4, KEY_T), | |
76 | KEY(3, 4, KEY_U), | |
9b6553cd | 77 | KEY(4, 4, KEY_ENTER), |
da1f026b JK |
78 | KEY(0, 5, KEY_V), |
79 | KEY(1, 5, KEY_W), | |
80 | KEY(2, 5, KEY_L), | |
81 | KEY(3, 5, KEY_S), | |
82 | KEY(4, 5, KEY_ENTER), | |
9b6553cd TL |
83 | }; |
84 | ||
41eb2d81 TL |
85 | static const struct matrix_keymap_data board_keymap_data = { |
86 | .keymap = board_matrix_keys, | |
87 | .keymap_size = ARRAY_SIZE(board_matrix_keys), | |
88 | }; | |
89 | ||
90 | static unsigned int board_keypad_row_gpios[] = { | |
91 | 88, 89, 124, 11, 6, 96 | |
92 | }; | |
93 | ||
94 | static unsigned int board_keypad_col_gpios[] = { | |
95 | 90, 91, 100, 36, 12, 97, 98 | |
96 | }; | |
97 | ||
98 | static struct matrix_keypad_platform_data board_keypad_platform_data = { | |
99 | .keymap_data = &board_keymap_data, | |
100 | .row_gpios = board_keypad_row_gpios, | |
101 | .num_row_gpios = ARRAY_SIZE(board_keypad_row_gpios), | |
102 | .col_gpios = board_keypad_col_gpios, | |
103 | .num_col_gpios = ARRAY_SIZE(board_keypad_col_gpios), | |
104 | .active_low = 1, | |
105 | ||
106 | .debounce_ms = 20, | |
107 | .col_scan_delay_us = 5, | |
108 | }; | |
109 | ||
110 | static struct platform_device board_keyboard = { | |
111 | .name = "matrix-keypad", | |
112 | .id = -1, | |
113 | .dev = { | |
114 | .platform_data = &board_keypad_platform_data, | |
115 | }, | |
116 | }; | |
117 | static void __init board_mkp_init(void) | |
118 | { | |
119 | omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP); | |
120 | omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP); | |
121 | omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP); | |
122 | omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP); | |
123 | if (omap_has_menelaus()) { | |
124 | omap_mux_init_signal("sdrc_a14.gpio0", | |
125 | OMAP_PULL_ENA | OMAP_PULL_UP); | |
126 | omap_mux_init_signal("vlynq_rx0.gpio_15", 0); | |
127 | omap_mux_init_signal("gpio_98", 0); | |
128 | board_keypad_row_gpios[5] = 0; | |
129 | board_keypad_col_gpios[2] = 15; | |
130 | board_keypad_col_gpios[6] = 18; | |
131 | } else { | |
132 | omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP); | |
133 | omap_mux_init_signal("gpio_100", 0); | |
134 | omap_mux_init_signal("gpio_98", 0); | |
135 | } | |
136 | omap_mux_init_signal("gpio_90", 0); | |
137 | omap_mux_init_signal("gpio_91", 0); | |
138 | omap_mux_init_signal("gpio_36", 0); | |
139 | omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); | |
140 | omap_mux_init_signal("gpio_97", 0); | |
141 | ||
142 | platform_device_register(&board_keyboard); | |
143 | } | |
144 | #else | |
145 | static inline void board_mkp_init(void) | |
146 | { | |
147 | } | |
148 | #endif | |
149 | ||
1dbae815 TL |
150 | static struct mtd_partition h4_partitions[] = { |
151 | /* bootloader (U-Boot, etc) in first sector */ | |
152 | { | |
153 | .name = "bootloader", | |
154 | .offset = 0, | |
155 | .size = SZ_128K, | |
156 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
157 | }, | |
158 | /* bootloader params in the next sector */ | |
159 | { | |
160 | .name = "params", | |
161 | .offset = MTDPART_OFS_APPEND, | |
162 | .size = SZ_128K, | |
163 | .mask_flags = 0, | |
164 | }, | |
165 | /* kernel */ | |
166 | { | |
167 | .name = "kernel", | |
168 | .offset = MTDPART_OFS_APPEND, | |
169 | .size = SZ_2M, | |
170 | .mask_flags = 0 | |
171 | }, | |
172 | /* file system */ | |
173 | { | |
174 | .name = "filesystem", | |
175 | .offset = MTDPART_OFS_APPEND, | |
176 | .size = MTDPART_SIZ_FULL, | |
177 | .mask_flags = 0 | |
178 | } | |
179 | }; | |
180 | ||
561b036a | 181 | static struct physmap_flash_data h4_flash_data = { |
1dbae815 TL |
182 | .width = 2, |
183 | .parts = h4_partitions, | |
184 | .nr_parts = ARRAY_SIZE(h4_partitions), | |
185 | }; | |
186 | ||
187 | static struct resource h4_flash_resource = { | |
1dbae815 TL |
188 | .flags = IORESOURCE_MEM, |
189 | }; | |
190 | ||
191 | static struct platform_device h4_flash_device = { | |
561b036a | 192 | .name = "physmap-flash", |
1dbae815 TL |
193 | .id = 0, |
194 | .dev = { | |
195 | .platform_data = &h4_flash_data, | |
196 | }, | |
197 | .num_resources = 1, | |
198 | .resource = &h4_flash_resource, | |
199 | }; | |
200 | ||
1dbae815 | 201 | static struct platform_device *h4_devices[] __initdata = { |
1dbae815 | 202 | &h4_flash_device, |
cbf1455b TV |
203 | }; |
204 | ||
205 | static struct panel_generic_dpi_data h4_panel_data = { | |
206 | .name = "h4", | |
207 | }; | |
208 | ||
209 | static struct omap_dss_device h4_lcd_device = { | |
210 | .name = "lcd", | |
211 | .driver_name = "generic_dpi_panel", | |
212 | .type = OMAP_DISPLAY_TYPE_DPI, | |
213 | .phy.dpi.data_lines = 16, | |
214 | .data = &h4_panel_data, | |
215 | }; | |
216 | ||
217 | static struct omap_dss_device *h4_dss_devices[] = { | |
9b6553cd | 218 | &h4_lcd_device, |
1dbae815 TL |
219 | }; |
220 | ||
cbf1455b TV |
221 | static struct omap_dss_board_info h4_dss_data = { |
222 | .num_devices = ARRAY_SIZE(h4_dss_devices), | |
223 | .devices = h4_dss_devices, | |
224 | .default_device = &h4_lcd_device, | |
225 | }; | |
226 | ||
44595982 PW |
227 | /* 2420 Sysboot setup (2430 is different) */ |
228 | static u32 get_sysboot_value(void) | |
229 | { | |
230 | return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS) & | |
231 | (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK | | |
232 | OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK | | |
233 | OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK)); | |
234 | } | |
235 | ||
236 | /* H4-2420's always used muxed mode, H4-2422's always use non-muxed | |
237 | * | |
238 | * Note: OMAP-GIT doesn't correctly do is_cpu_omap2422 and is_cpu_omap2423 | |
239 | * correctly. The macro needs to look at production_id not just hawkeye. | |
240 | */ | |
241 | static u32 is_gpmc_muxed(void) | |
242 | { | |
243 | u32 mux; | |
244 | mux = get_sysboot_value(); | |
245 | if ((mux & 0xF) == 0xd) | |
246 | return 1; /* NAND config (could be either) */ | |
247 | if (mux & 0x2) /* if mux'ed */ | |
248 | return 1; | |
249 | else | |
250 | return 0; | |
251 | } | |
252 | ||
f6049312 | 253 | static inline void __init h4_init_debug(void) |
1dbae815 | 254 | { |
44595982 PW |
255 | int eth_cs; |
256 | unsigned long cs_mem_base; | |
257 | unsigned int muxed, rate; | |
258 | struct clk *gpmc_fck; | |
259 | ||
260 | eth_cs = H4_SMC91X_CS; | |
261 | ||
262 | gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ | |
263 | if (IS_ERR(gpmc_fck)) { | |
264 | WARN_ON(1); | |
265 | return; | |
266 | } | |
267 | ||
4d7cb45e | 268 | clk_prepare_enable(gpmc_fck); |
44595982 | 269 | rate = clk_get_rate(gpmc_fck); |
4d7cb45e | 270 | clk_disable_unprepare(gpmc_fck); |
44595982 PW |
271 | clk_put(gpmc_fck); |
272 | ||
273 | if (is_gpmc_muxed()) | |
274 | muxed = 0x200; | |
275 | else | |
276 | muxed = 0; | |
277 | ||
1dbae815 | 278 | /* Make sure CS1 timings are correct */ |
44595982 PW |
279 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, |
280 | 0x00011000 | muxed); | |
281 | ||
282 | if (rate >= 160000000) { | |
283 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01); | |
284 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803); | |
285 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a); | |
286 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
287 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
288 | } else if (rate >= 130000000) { | |
289 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
290 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
291 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
292 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
293 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
294 | } else {/* rate = 100000000 */ | |
295 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
296 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
297 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
298 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F); | |
299 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2); | |
300 | } | |
301 | ||
302 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | |
303 | printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); | |
304 | goto out; | |
305 | } | |
306 | ||
1dbae815 TL |
307 | udelay(100); |
308 | ||
f99bf16d | 309 | omap_mux_init_gpio(92, 0); |
40662d77 | 310 | if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0) |
f6049312 | 311 | gpmc_cs_free(eth_cs); |
44595982 PW |
312 | |
313 | out: | |
4d7cb45e | 314 | clk_disable_unprepare(gpmc_fck); |
44595982 PW |
315 | clk_put(gpmc_fck); |
316 | } | |
317 | ||
318 | static void __init h4_init_flash(void) | |
319 | { | |
320 | unsigned long base; | |
321 | ||
322 | if (gpmc_cs_request(H4_FLASH_CS, SZ_64M, &base) < 0) { | |
323 | printk("Can't request GPMC CS for flash\n"); | |
324 | return; | |
325 | } | |
326 | h4_flash_resource.start = base; | |
327 | h4_flash_resource.end = base + SZ_64M - 1; | |
1dbae815 TL |
328 | } |
329 | ||
6a769ed4 DB |
330 | static struct at24_platform_data m24c01 = { |
331 | .byte_len = SZ_1K / 8, | |
332 | .page_size = 16, | |
333 | }; | |
334 | ||
9df013b3 JD |
335 | static struct i2c_board_info __initdata h4_i2c_board_info[] = { |
336 | { | |
337 | I2C_BOARD_INFO("isp1301_omap", 0x2d), | |
9df013b3 | 338 | }, |
6a769ed4 DB |
339 | { /* EEPROM on mainboard */ |
340 | I2C_BOARD_INFO("24c01", 0x52), | |
341 | .platform_data = &m24c01, | |
342 | }, | |
343 | { /* EEPROM on cpu card */ | |
344 | I2C_BOARD_INFO("24c01", 0x57), | |
345 | .platform_data = &m24c01, | |
346 | }, | |
9df013b3 JD |
347 | }; |
348 | ||
23275d45 TL |
349 | #ifdef CONFIG_OMAP_MUX |
350 | static struct omap_board_mux board_mux[] __initdata = { | |
351 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
352 | }; | |
23275d45 TL |
353 | #endif |
354 | ||
1dbae815 TL |
355 | static void __init omap_h4_init(void) |
356 | { | |
23275d45 TL |
357 | omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAF); |
358 | ||
1dbae815 TL |
359 | /* |
360 | * Make sure the serial ports are muxed on at this point. | |
361 | * You have to mux them off in device drivers later on | |
362 | * if not needed. | |
363 | */ | |
9b6553cd | 364 | |
41eb2d81 | 365 | board_mkp_init(); |
46a0a540 | 366 | h4_i2c_board_info[0].irq = gpio_to_irq(125); |
9df013b3 JD |
367 | i2c_register_board_info(1, h4_i2c_board_info, |
368 | ARRAY_SIZE(h4_i2c_board_info)); | |
369 | ||
1dbae815 | 370 | platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); |
1dbae815 | 371 | omap_serial_init(); |
a4ca9dbe | 372 | omap_sdrc_init(NULL, NULL); |
42924355 | 373 | h4_init_flash(); |
cbf1455b TV |
374 | |
375 | omap_display_init(&h4_dss_data); | |
1dbae815 TL |
376 | } |
377 | ||
1dbae815 TL |
378 | MACHINE_START(OMAP_H4, "OMAP2420 H4 board") |
379 | /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ | |
5e52b435 | 380 | .atag_offset = 0x100, |
71ee7dad | 381 | .reserve = omap_reserve, |
e990a406 | 382 | .map_io = omap242x_map_io, |
8f5b5a41 | 383 | .init_early = omap2420_init_early, |
be732460 | 384 | .init_irq = omap2_init_irq, |
6b2f55d7 | 385 | .handle_irq = omap2_intc_handle_irq, |
1dbae815 | 386 | .init_machine = omap_h4_init, |
bbd707ac | 387 | .init_late = omap2420_init_late, |
e74984e4 | 388 | .timer = &omap2_timer, |
187e3e06 | 389 | .restart = omap2xxx_restart, |
1dbae815 | 390 | MACHINE_END |