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1dbae815 | 1 | /* |
f30c2269 | 2 | * linux/arch/arm/mach-omap2/board-h4.c |
1dbae815 TL |
3 | * |
4 | * Copyright (C) 2005 Nokia Corporation | |
5 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap/omap1/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/mtd/mtd.h> | |
18 | #include <linux/mtd/partitions.h> | |
19 | #include <linux/delay.h> | |
9b6553cd TL |
20 | #include <linux/workqueue.h> |
21 | #include <linux/input.h> | |
44595982 PW |
22 | #include <linux/err.h> |
23 | #include <linux/clk.h> | |
1dbae815 | 24 | |
a09e64fb | 25 | #include <mach/hardware.h> |
1dbae815 TL |
26 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | |
28 | #include <asm/mach/map.h> | |
29 | #include <asm/mach/flash.h> | |
30 | ||
a09e64fb RK |
31 | #include <mach/control.h> |
32 | #include <mach/gpio.h> | |
33 | #include <mach/gpioexpander.h> | |
34 | #include <mach/mux.h> | |
35 | #include <mach/usb.h> | |
36 | #include <mach/irda.h> | |
37 | #include <mach/board.h> | |
38 | #include <mach/common.h> | |
39 | #include <mach/keypad.h> | |
40 | #include <mach/menelaus.h> | |
41 | #include <mach/dma.h> | |
42 | #include <mach/gpmc.h> | |
1dbae815 TL |
43 | |
44 | #include <asm/io.h> | |
1dbae815 | 45 | |
44595982 PW |
46 | #define H4_FLASH_CS 0 |
47 | #define H4_SMC91X_CS 1 | |
48 | ||
9b6553cd TL |
49 | static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; |
50 | static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; | |
51 | ||
52 | static int h4_keymap[] = { | |
53 | KEY(0, 0, KEY_LEFT), | |
54 | KEY(0, 1, KEY_RIGHT), | |
55 | KEY(0, 2, KEY_A), | |
56 | KEY(0, 3, KEY_B), | |
57 | KEY(0, 4, KEY_C), | |
58 | KEY(1, 0, KEY_DOWN), | |
59 | KEY(1, 1, KEY_UP), | |
60 | KEY(1, 2, KEY_E), | |
61 | KEY(1, 3, KEY_F), | |
62 | KEY(1, 4, KEY_G), | |
63 | KEY(2, 0, KEY_ENTER), | |
64 | KEY(2, 1, KEY_I), | |
65 | KEY(2, 2, KEY_J), | |
66 | KEY(2, 3, KEY_K), | |
67 | KEY(2, 4, KEY_3), | |
68 | KEY(3, 0, KEY_M), | |
69 | KEY(3, 1, KEY_N), | |
70 | KEY(3, 2, KEY_O), | |
71 | KEY(3, 3, KEY_P), | |
72 | KEY(3, 4, KEY_Q), | |
73 | KEY(4, 0, KEY_R), | |
74 | KEY(4, 1, KEY_4), | |
75 | KEY(4, 2, KEY_T), | |
76 | KEY(4, 3, KEY_U), | |
77 | KEY(4, 4, KEY_ENTER), | |
78 | KEY(5, 0, KEY_V), | |
79 | KEY(5, 1, KEY_W), | |
80 | KEY(5, 2, KEY_L), | |
81 | KEY(5, 3, KEY_S), | |
82 | KEY(5, 4, KEY_ENTER), | |
83 | 0 | |
84 | }; | |
85 | ||
1dbae815 TL |
86 | static struct mtd_partition h4_partitions[] = { |
87 | /* bootloader (U-Boot, etc) in first sector */ | |
88 | { | |
89 | .name = "bootloader", | |
90 | .offset = 0, | |
91 | .size = SZ_128K, | |
92 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
93 | }, | |
94 | /* bootloader params in the next sector */ | |
95 | { | |
96 | .name = "params", | |
97 | .offset = MTDPART_OFS_APPEND, | |
98 | .size = SZ_128K, | |
99 | .mask_flags = 0, | |
100 | }, | |
101 | /* kernel */ | |
102 | { | |
103 | .name = "kernel", | |
104 | .offset = MTDPART_OFS_APPEND, | |
105 | .size = SZ_2M, | |
106 | .mask_flags = 0 | |
107 | }, | |
108 | /* file system */ | |
109 | { | |
110 | .name = "filesystem", | |
111 | .offset = MTDPART_OFS_APPEND, | |
112 | .size = MTDPART_SIZ_FULL, | |
113 | .mask_flags = 0 | |
114 | } | |
115 | }; | |
116 | ||
117 | static struct flash_platform_data h4_flash_data = { | |
118 | .map_name = "cfi_probe", | |
119 | .width = 2, | |
120 | .parts = h4_partitions, | |
121 | .nr_parts = ARRAY_SIZE(h4_partitions), | |
122 | }; | |
123 | ||
124 | static struct resource h4_flash_resource = { | |
1dbae815 TL |
125 | .flags = IORESOURCE_MEM, |
126 | }; | |
127 | ||
128 | static struct platform_device h4_flash_device = { | |
129 | .name = "omapflash", | |
130 | .id = 0, | |
131 | .dev = { | |
132 | .platform_data = &h4_flash_data, | |
133 | }, | |
134 | .num_resources = 1, | |
135 | .resource = &h4_flash_resource, | |
136 | }; | |
137 | ||
9b6553cd TL |
138 | /* Select between the IrDA and aGPS module |
139 | */ | |
140 | static int h4_select_irda(struct device *dev, int state) | |
141 | { | |
142 | unsigned char expa; | |
143 | int err = 0; | |
144 | ||
145 | if ((err = read_gpio_expa(&expa, 0x21))) { | |
146 | printk(KERN_ERR "Error reading from I/O expander\n"); | |
147 | return err; | |
148 | } | |
149 | ||
150 | /* 'P6' enable/disable IRDA_TX and IRDA_RX */ | |
151 | if (state & IR_SEL) { /* IrDa */ | |
152 | if ((err = write_gpio_expa(expa | 0x01, 0x21))) { | |
153 | printk(KERN_ERR "Error writing to I/O expander\n"); | |
154 | return err; | |
155 | } | |
156 | } else { | |
157 | if ((err = write_gpio_expa(expa & ~0x01, 0x21))) { | |
158 | printk(KERN_ERR "Error writing to I/O expander\n"); | |
159 | return err; | |
160 | } | |
161 | } | |
162 | return err; | |
163 | } | |
164 | ||
060ebf97 | 165 | static void set_trans_mode(struct work_struct *work) |
9b6553cd | 166 | { |
060ebf97 DB |
167 | struct omap_irda_config *irda_config = |
168 | container_of(work, struct omap_irda_config, gpio_expa.work); | |
169 | int mode = irda_config->mode; | |
9b6553cd TL |
170 | unsigned char expa; |
171 | int err = 0; | |
172 | ||
173 | if ((err = read_gpio_expa(&expa, 0x20)) != 0) { | |
174 | printk(KERN_ERR "Error reading from I/O expander\n"); | |
175 | } | |
176 | ||
177 | expa &= ~0x01; | |
178 | ||
060ebf97 | 179 | if (!(mode & IR_SIRMODE)) { /* MIR/FIR */ |
9b6553cd TL |
180 | expa |= 0x01; |
181 | } | |
182 | ||
183 | if ((err = write_gpio_expa(expa, 0x20)) != 0) { | |
184 | printk(KERN_ERR "Error writing to I/O expander\n"); | |
185 | } | |
186 | } | |
187 | ||
188 | static int h4_transceiver_mode(struct device *dev, int mode) | |
189 | { | |
190 | struct omap_irda_config *irda_config = dev->platform_data; | |
191 | ||
060ebf97 | 192 | irda_config->mode = mode; |
9b6553cd | 193 | cancel_delayed_work(&irda_config->gpio_expa); |
060ebf97 | 194 | PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode); |
6d5aefb8 | 195 | schedule_delayed_work(&irda_config->gpio_expa, 0); |
9b6553cd TL |
196 | |
197 | return 0; | |
198 | } | |
199 | ||
200 | static struct omap_irda_config h4_irda_data = { | |
201 | .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, | |
202 | .transceiver_mode = h4_transceiver_mode, | |
203 | .select_irda = h4_select_irda, | |
204 | .rx_channel = OMAP24XX_DMA_UART3_RX, | |
205 | .tx_channel = OMAP24XX_DMA_UART3_TX, | |
206 | .dest_start = OMAP_UART3_BASE, | |
207 | .src_start = OMAP_UART3_BASE, | |
208 | .tx_trigger = OMAP24XX_DMA_UART3_TX, | |
209 | .rx_trigger = OMAP24XX_DMA_UART3_RX, | |
210 | }; | |
211 | ||
212 | static struct resource h4_irda_resources[] = { | |
213 | [0] = { | |
214 | .start = INT_24XX_UART3_IRQ, | |
215 | .end = INT_24XX_UART3_IRQ, | |
216 | .flags = IORESOURCE_IRQ, | |
217 | }, | |
218 | }; | |
219 | ||
220 | static struct platform_device h4_irda_device = { | |
221 | .name = "omapirda", | |
222 | .id = -1, | |
223 | .dev = { | |
224 | .platform_data = &h4_irda_data, | |
225 | }, | |
226 | .num_resources = 1, | |
227 | .resource = h4_irda_resources, | |
228 | }; | |
229 | ||
230 | static struct omap_kp_platform_data h4_kp_data = { | |
231 | .rows = 6, | |
232 | .cols = 7, | |
233 | .keymap = h4_keymap, | |
4d24607b | 234 | .keymapsize = ARRAY_SIZE(h4_keymap), |
9b6553cd TL |
235 | .rep = 1, |
236 | .row_gpios = row_gpios, | |
237 | .col_gpios = col_gpios, | |
238 | }; | |
239 | ||
240 | static struct platform_device h4_kp_device = { | |
241 | .name = "omap-keypad", | |
242 | .id = -1, | |
243 | .dev = { | |
244 | .platform_data = &h4_kp_data, | |
245 | }, | |
246 | }; | |
247 | ||
248 | static struct platform_device h4_lcd_device = { | |
249 | .name = "lcd_h4", | |
250 | .id = -1, | |
251 | }; | |
252 | ||
1dbae815 | 253 | static struct platform_device *h4_devices[] __initdata = { |
1dbae815 | 254 | &h4_flash_device, |
9b6553cd TL |
255 | &h4_irda_device, |
256 | &h4_kp_device, | |
257 | &h4_lcd_device, | |
1dbae815 TL |
258 | }; |
259 | ||
44595982 PW |
260 | /* 2420 Sysboot setup (2430 is different) */ |
261 | static u32 get_sysboot_value(void) | |
262 | { | |
263 | return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS) & | |
264 | (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK | | |
265 | OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK | | |
266 | OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK)); | |
267 | } | |
268 | ||
269 | /* H4-2420's always used muxed mode, H4-2422's always use non-muxed | |
270 | * | |
271 | * Note: OMAP-GIT doesn't correctly do is_cpu_omap2422 and is_cpu_omap2423 | |
272 | * correctly. The macro needs to look at production_id not just hawkeye. | |
273 | */ | |
274 | static u32 is_gpmc_muxed(void) | |
275 | { | |
276 | u32 mux; | |
277 | mux = get_sysboot_value(); | |
278 | if ((mux & 0xF) == 0xd) | |
279 | return 1; /* NAND config (could be either) */ | |
280 | if (mux & 0x2) /* if mux'ed */ | |
281 | return 1; | |
282 | else | |
283 | return 0; | |
284 | } | |
285 | ||
f6049312 | 286 | static inline void __init h4_init_debug(void) |
1dbae815 | 287 | { |
44595982 PW |
288 | int eth_cs; |
289 | unsigned long cs_mem_base; | |
290 | unsigned int muxed, rate; | |
291 | struct clk *gpmc_fck; | |
292 | ||
293 | eth_cs = H4_SMC91X_CS; | |
294 | ||
295 | gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ | |
296 | if (IS_ERR(gpmc_fck)) { | |
297 | WARN_ON(1); | |
298 | return; | |
299 | } | |
300 | ||
301 | clk_enable(gpmc_fck); | |
302 | rate = clk_get_rate(gpmc_fck); | |
303 | clk_disable(gpmc_fck); | |
304 | clk_put(gpmc_fck); | |
305 | ||
306 | if (is_gpmc_muxed()) | |
307 | muxed = 0x200; | |
308 | else | |
309 | muxed = 0; | |
310 | ||
1dbae815 | 311 | /* Make sure CS1 timings are correct */ |
44595982 PW |
312 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, |
313 | 0x00011000 | muxed); | |
314 | ||
315 | if (rate >= 160000000) { | |
316 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01); | |
317 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803); | |
318 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a); | |
319 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
320 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
321 | } else if (rate >= 130000000) { | |
322 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
323 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
324 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
325 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
326 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
327 | } else {/* rate = 100000000 */ | |
328 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
329 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
330 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
331 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F); | |
332 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2); | |
333 | } | |
334 | ||
335 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | |
336 | printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); | |
337 | goto out; | |
338 | } | |
339 | ||
1dbae815 TL |
340 | udelay(100); |
341 | ||
342 | omap_cfg_reg(M15_24XX_GPIO92); | |
f6049312 DB |
343 | if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0) |
344 | gpmc_cs_free(eth_cs); | |
44595982 PW |
345 | |
346 | out: | |
347 | clk_disable(gpmc_fck); | |
348 | clk_put(gpmc_fck); | |
349 | } | |
350 | ||
351 | static void __init h4_init_flash(void) | |
352 | { | |
353 | unsigned long base; | |
354 | ||
355 | if (gpmc_cs_request(H4_FLASH_CS, SZ_64M, &base) < 0) { | |
356 | printk("Can't request GPMC CS for flash\n"); | |
357 | return; | |
358 | } | |
359 | h4_flash_resource.start = base; | |
360 | h4_flash_resource.end = base + SZ_64M - 1; | |
1dbae815 TL |
361 | } |
362 | ||
363 | static void __init omap_h4_init_irq(void) | |
364 | { | |
18f49ea2 | 365 | omap2_init_common_hw(); |
1dbae815 TL |
366 | omap_init_irq(); |
367 | omap_gpio_init(); | |
44595982 | 368 | h4_init_flash(); |
1dbae815 TL |
369 | } |
370 | ||
371 | static struct omap_uart_config h4_uart_config __initdata = { | |
372 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | |
373 | }; | |
374 | ||
375 | static struct omap_mmc_config h4_mmc_config __initdata = { | |
376 | .mmc [0] = { | |
377 | .enabled = 1, | |
378 | .wire4 = 1, | |
379 | .wp_pin = -1, | |
380 | .power_pin = -1, | |
381 | .switch_pin = -1, | |
382 | }, | |
383 | }; | |
384 | ||
385 | static struct omap_lcd_config h4_lcd_config __initdata = { | |
1dbae815 TL |
386 | .ctrl_name = "internal", |
387 | }; | |
388 | ||
389 | static struct omap_board_config_kernel h4_config[] = { | |
390 | { OMAP_TAG_UART, &h4_uart_config }, | |
391 | { OMAP_TAG_MMC, &h4_mmc_config }, | |
392 | { OMAP_TAG_LCD, &h4_lcd_config }, | |
393 | }; | |
394 | ||
395 | static void __init omap_h4_init(void) | |
396 | { | |
397 | /* | |
398 | * Make sure the serial ports are muxed on at this point. | |
399 | * You have to mux them off in device drivers later on | |
400 | * if not needed. | |
401 | */ | |
9b6553cd TL |
402 | #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) |
403 | omap_cfg_reg(K15_24XX_UART3_TX); | |
404 | omap_cfg_reg(K14_24XX_UART3_RX); | |
405 | #endif | |
406 | ||
407 | #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE) | |
408 | if (omap_has_menelaus()) { | |
409 | row_gpios[5] = 0; | |
410 | col_gpios[2] = 15; | |
411 | col_gpios[6] = 18; | |
412 | } | |
413 | #endif | |
414 | ||
1dbae815 TL |
415 | platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); |
416 | omap_board_config = h4_config; | |
417 | omap_board_config_size = ARRAY_SIZE(h4_config); | |
418 | omap_serial_init(); | |
419 | } | |
420 | ||
421 | static void __init omap_h4_map_io(void) | |
422 | { | |
c8d2eb8e | 423 | omap2_set_globals_242x(); |
18f49ea2 | 424 | omap2_map_common_io(); |
1dbae815 TL |
425 | } |
426 | ||
427 | MACHINE_START(OMAP_H4, "OMAP2420 H4 board") | |
428 | /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ | |
1dbae815 TL |
429 | .phys_io = 0x48000000, |
430 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | |
431 | .boot_params = 0x80000100, | |
432 | .map_io = omap_h4_map_io, | |
433 | .init_irq = omap_h4_init_irq, | |
434 | .init_machine = omap_h4_init, | |
435 | .timer = &omap_timer, | |
436 | MACHINE_END |