Commit | Line | Data |
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58e11162 EBS |
1 | /* |
2 | * Copyright (C) 2009 Integration Software and Electronic Engineering. | |
3 | * | |
4 | * Modified from mach-omap2/board-generic.c | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/clk.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/gpio.h> | |
19 | #include <linux/interrupt.h> | |
18cbc7d9 | 20 | #include <linux/input.h> |
51482be9 | 21 | #include <linux/usb/phy.h> |
58e11162 EBS |
22 | |
23 | #include <linux/regulator/machine.h> | |
da07c0cf | 24 | #include <linux/regulator/fixed.h> |
ebeb53e1 | 25 | #include <linux/i2c/twl.h> |
3a63833e | 26 | #include <linux/mmc/host.h> |
58e11162 | 27 | |
a42cf2c6 JMC |
28 | #include <linux/mtd/nand.h> |
29 | ||
58e11162 EBS |
30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | |
32 | ||
a0b38cc4 | 33 | #include <video/omapdss.h> |
a0d8dde9 | 34 | #include <video/omap-panel-data.h> |
2203747c | 35 | #include <linux/platform_data/mtd-onenand-omap2.h> |
58e11162 | 36 | |
6d02643d TL |
37 | #include "common.h" |
38 | #include "gpmc.h" | |
ca5742bd | 39 | #include "mux.h" |
d02a900b | 40 | #include "hsmmc.h" |
22f1baac | 41 | #include "sdram-numonyx-m65kxxxxam.h" |
fbd8071c | 42 | #include "common-board-devices.h" |
a42cf2c6 JMC |
43 | #include "board-flash.h" |
44 | #include "control.h" | |
b6ab13e7 | 45 | #include "gpmc-onenand.h" |
58e11162 EBS |
46 | |
47 | #define IGEP2_SMSC911X_CS 5 | |
48 | #define IGEP2_SMSC911X_GPIO 176 | |
49 | #define IGEP2_GPIO_USBH_NRESET 24 | |
5a9fcc99 EBS |
50 | #define IGEP2_GPIO_LED0_GREEN 26 |
51 | #define IGEP2_GPIO_LED0_RED 27 | |
52 | #define IGEP2_GPIO_LED1_RED 28 | |
53 | #define IGEP2_GPIO_DVI_PUP 170 | |
54 | ||
55 | #define IGEP2_RB_GPIO_WIFI_NPD 94 | |
56 | #define IGEP2_RB_GPIO_WIFI_NRESET 95 | |
57 | #define IGEP2_RB_GPIO_BT_NRESET 137 | |
58 | #define IGEP2_RC_GPIO_WIFI_NPD 138 | |
59 | #define IGEP2_RC_GPIO_WIFI_NRESET 139 | |
60 | #define IGEP2_RC_GPIO_BT_NRESET 137 | |
58e11162 | 61 | |
2a60997a MR |
62 | #define IGEP3_GPIO_LED0_GREEN 54 |
63 | #define IGEP3_GPIO_LED0_RED 53 | |
64 | #define IGEP3_GPIO_LED1_RED 16 | |
65 | #define IGEP3_GPIO_USBH_NRESET 183 | |
66 | ||
a42cf2c6 JMC |
67 | #define IGEP_SYSBOOT_MASK 0x1f |
68 | #define IGEP_SYSBOOT_NAND 0x0f | |
69 | #define IGEP_SYSBOOT_ONENAND 0x10 | |
70 | ||
3f8c48d9 EBS |
71 | /* |
72 | * IGEP2 Hardware Revision Table | |
73 | * | |
5a9fcc99 EBS |
74 | * -------------------------------------------------------------------------- |
75 | * | Id. | Hw Rev. | HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET | | |
76 | * -------------------------------------------------------------------------- | |
77 | * | 0 | B | high | gpio94 | gpio95 | - | | |
78 | * | 0 | B/C (B-compatible) | high | gpio94 | gpio95 | gpio137 | | |
79 | * | 1 | C | low | gpio138 | gpio139 | gpio137 | | |
80 | * -------------------------------------------------------------------------- | |
3f8c48d9 EBS |
81 | */ |
82 | ||
83 | #define IGEP2_BOARD_HWREV_B 0 | |
84 | #define IGEP2_BOARD_HWREV_C 1 | |
2a60997a | 85 | #define IGEP3_BOARD_HWREV 2 |
3f8c48d9 EBS |
86 | |
87 | static u8 hwrev; | |
88 | ||
89 | static void __init igep2_get_revision(void) | |
90 | { | |
91 | u8 ret; | |
92 | ||
2a60997a MR |
93 | if (machine_is_igep0030()) { |
94 | hwrev = IGEP3_BOARD_HWREV; | |
95 | return; | |
96 | } | |
97 | ||
3f8c48d9 EBS |
98 | omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT); |
99 | ||
bc593f5d | 100 | if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) { |
3f8c48d9 EBS |
101 | pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n"); |
102 | pr_err("IGEP2: Unknown Hardware Revision\n"); | |
bc593f5d IG |
103 | return; |
104 | } | |
105 | ||
106 | ret = gpio_get_value(IGEP2_GPIO_LED1_RED); | |
107 | if (ret == 0) { | |
108 | pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n"); | |
109 | hwrev = IGEP2_BOARD_HWREV_C; | |
110 | } else if (ret == 1) { | |
111 | pr_info("IGEP2: Hardware Revision B/C (B compatible)\n"); | |
112 | hwrev = IGEP2_BOARD_HWREV_B; | |
113 | } else { | |
114 | pr_err("IGEP2: Unknown Hardware Revision\n"); | |
115 | hwrev = -1; | |
3f8c48d9 EBS |
116 | } |
117 | ||
118 | gpio_free(IGEP2_GPIO_LED1_RED); | |
119 | } | |
58e11162 | 120 | |
a42cf2c6 JMC |
121 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
122 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \ | |
123 | defined(CONFIG_MTD_NAND_OMAP2) || \ | |
124 | defined(CONFIG_MTD_NAND_OMAP2_MODULE) | |
cddb483a EBS |
125 | |
126 | #define ONENAND_MAP 0x20000000 | |
127 | ||
128 | /* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY ) | |
129 | * Since the device is equipped with two DataRAMs, and two-plane NAND | |
130 | * Flash memory array, these two component enables simultaneous program | |
131 | * of 4KiB. Plane1 has only even blocks such as block0, block2, block4 | |
132 | * while Plane2 has only odd blocks such as block1, block3, block5. | |
133 | * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048) | |
134 | */ | |
135 | ||
a42cf2c6 | 136 | static struct mtd_partition igep_flash_partitions[] = { |
cddb483a EBS |
137 | { |
138 | .name = "X-Loader", | |
139 | .offset = 0, | |
140 | .size = 2 * (64*(2*2048)) | |
141 | }, | |
142 | { | |
143 | .name = "U-Boot", | |
144 | .offset = MTDPART_OFS_APPEND, | |
145 | .size = 6 * (64*(2*2048)), | |
146 | }, | |
147 | { | |
148 | .name = "Environment", | |
149 | .offset = MTDPART_OFS_APPEND, | |
150 | .size = 2 * (64*(2*2048)), | |
151 | }, | |
152 | { | |
153 | .name = "Kernel", | |
154 | .offset = MTDPART_OFS_APPEND, | |
155 | .size = 12 * (64*(2*2048)), | |
156 | }, | |
157 | { | |
158 | .name = "File System", | |
159 | .offset = MTDPART_OFS_APPEND, | |
160 | .size = MTDPART_SIZ_FULL, | |
161 | }, | |
162 | }; | |
163 | ||
a42cf2c6 JMC |
164 | static inline u32 igep_get_sysboot_value(void) |
165 | { | |
166 | return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) & IGEP_SYSBOOT_MASK; | |
167 | } | |
cddb483a | 168 | |
fdfb03ba | 169 | static void __init igep_flash_init(void) |
cddb483a | 170 | { |
a42cf2c6 JMC |
171 | u32 mux; |
172 | mux = igep_get_sysboot_value(); | |
173 | ||
174 | if (mux == IGEP_SYSBOOT_NAND) { | |
175 | pr_info("IGEP: initializing NAND memory device\n"); | |
176 | board_nand_init(igep_flash_partitions, | |
177 | ARRAY_SIZE(igep_flash_partitions), | |
2e618261 | 178 | 0, NAND_BUSWIDTH_16, nand_default_timings); |
a42cf2c6 JMC |
179 | } else if (mux == IGEP_SYSBOOT_ONENAND) { |
180 | pr_info("IGEP: initializing OneNAND memory device\n"); | |
181 | board_onenand_init(igep_flash_partitions, | |
182 | ARRAY_SIZE(igep_flash_partitions), 0); | |
183 | } else { | |
184 | pr_err("IGEP: Flash: unsupported sysboot sequence found\n"); | |
cddb483a | 185 | } |
cddb483a EBS |
186 | } |
187 | ||
188 | #else | |
fdfb03ba | 189 | static void __init igep_flash_init(void) {} |
cddb483a EBS |
190 | #endif |
191 | ||
58e11162 EBS |
192 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
193 | ||
194 | #include <linux/smsc911x.h> | |
ac839b3c | 195 | #include "gpmc-smsc911x.h" |
58e11162 | 196 | |
21b42731 MR |
197 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
198 | .cs = IGEP2_SMSC911X_CS, | |
199 | .gpio_irq = IGEP2_SMSC911X_GPIO, | |
200 | .gpio_reset = -EINVAL, | |
201 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | |
58e11162 EBS |
202 | }; |
203 | ||
204 | static inline void __init igep2_init_smsc911x(void) | |
205 | { | |
21b42731 | 206 | gpmc_smsc911x_init(&smsc911x_cfg); |
58e11162 EBS |
207 | } |
208 | ||
209 | #else | |
210 | static inline void __init igep2_init_smsc911x(void) { } | |
211 | #endif | |
212 | ||
786b01a8 OD |
213 | static struct regulator_consumer_supply igep_vmmc1_supply[] = { |
214 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
215 | }; | |
58e11162 EBS |
216 | |
217 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | |
fdfb03ba | 218 | static struct regulator_init_data igep_vmmc1 = { |
58e11162 EBS |
219 | .constraints = { |
220 | .min_uV = 1850000, | |
221 | .max_uV = 3150000, | |
222 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
223 | | REGULATOR_MODE_STANDBY, | |
224 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
225 | | REGULATOR_CHANGE_MODE | |
226 | | REGULATOR_CHANGE_STATUS, | |
227 | }, | |
786b01a8 OD |
228 | .num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply), |
229 | .consumer_supplies = igep_vmmc1_supply, | |
58e11162 EBS |
230 | }; |
231 | ||
786b01a8 OD |
232 | static struct regulator_consumer_supply igep_vio_supply[] = { |
233 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | |
234 | }; | |
da07c0cf | 235 | |
fdfb03ba | 236 | static struct regulator_init_data igep_vio = { |
da07c0cf MZ |
237 | .constraints = { |
238 | .min_uV = 1800000, | |
239 | .max_uV = 1800000, | |
240 | .apply_uV = 1, | |
241 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
242 | | REGULATOR_MODE_STANDBY, | |
243 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
244 | | REGULATOR_CHANGE_MODE | |
245 | | REGULATOR_CHANGE_STATUS, | |
246 | }, | |
786b01a8 OD |
247 | .num_consumer_supplies = ARRAY_SIZE(igep_vio_supply), |
248 | .consumer_supplies = igep_vio_supply, | |
da07c0cf MZ |
249 | }; |
250 | ||
786b01a8 OD |
251 | static struct regulator_consumer_supply igep_vmmc2_supply[] = { |
252 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | |
253 | }; | |
da07c0cf | 254 | |
fdfb03ba | 255 | static struct regulator_init_data igep_vmmc2 = { |
da07c0cf MZ |
256 | .constraints = { |
257 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | |
258 | .always_on = 1, | |
259 | }, | |
786b01a8 OD |
260 | .num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply), |
261 | .consumer_supplies = igep_vmmc2_supply, | |
da07c0cf MZ |
262 | }; |
263 | ||
fdfb03ba | 264 | static struct fixed_voltage_config igep_vwlan = { |
da07c0cf MZ |
265 | .supply_name = "vwlan", |
266 | .microvolts = 3300000, | |
267 | .gpio = -EINVAL, | |
268 | .enabled_at_boot = 1, | |
fdfb03ba | 269 | .init_data = &igep_vmmc2, |
da07c0cf MZ |
270 | }; |
271 | ||
fdfb03ba | 272 | static struct platform_device igep_vwlan_device = { |
da07c0cf MZ |
273 | .name = "reg-fixed-voltage", |
274 | .id = 0, | |
275 | .dev = { | |
fdfb03ba | 276 | .platform_data = &igep_vwlan, |
da07c0cf MZ |
277 | }, |
278 | }; | |
279 | ||
68ff0423 | 280 | static struct omap2_hsmmc_info mmc[] = { |
58e11162 EBS |
281 | { |
282 | .mmc = 1, | |
3a63833e | 283 | .caps = MMC_CAP_4_BIT_DATA, |
58e11162 EBS |
284 | .gpio_cd = -EINVAL, |
285 | .gpio_wp = -EINVAL, | |
3b972bf0 | 286 | .deferred = true, |
58e11162 | 287 | }, |
5a9fcc99 | 288 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) |
58e11162 EBS |
289 | { |
290 | .mmc = 2, | |
3a63833e | 291 | .caps = MMC_CAP_4_BIT_DATA, |
58e11162 EBS |
292 | .gpio_cd = -EINVAL, |
293 | .gpio_wp = -EINVAL, | |
294 | }, | |
5a9fcc99 | 295 | #endif |
58e11162 EBS |
296 | {} /* Terminator */ |
297 | }; | |
298 | ||
bee15390 EBS |
299 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) |
300 | #include <linux/leds.h> | |
301 | ||
fdfb03ba | 302 | static struct gpio_led igep_gpio_leds[] = { |
bee15390 | 303 | [0] = { |
8310f9d2 JMC |
304 | .name = "omap3:red:user0", |
305 | .default_state = 0, | |
bee15390 EBS |
306 | }, |
307 | [1] = { | |
8310f9d2 JMC |
308 | .name = "omap3:green:boot", |
309 | .default_state = 1, | |
bee15390 EBS |
310 | }, |
311 | [2] = { | |
8310f9d2 JMC |
312 | .name = "omap3:red:user1", |
313 | .default_state = 0, | |
bee15390 EBS |
314 | }, |
315 | [3] = { | |
8310f9d2 JMC |
316 | .name = "omap3:green:user1", |
317 | .default_state = 0, | |
bee15390 | 318 | .gpio = -EINVAL, /* gets replaced */ |
70e77760 | 319 | .active_low = 1, |
bee15390 EBS |
320 | }, |
321 | }; | |
322 | ||
fdfb03ba MR |
323 | static struct gpio_led_platform_data igep_led_pdata = { |
324 | .leds = igep_gpio_leds, | |
325 | .num_leds = ARRAY_SIZE(igep_gpio_leds), | |
bee15390 EBS |
326 | }; |
327 | ||
fdfb03ba | 328 | static struct platform_device igep_led_device = { |
bee15390 EBS |
329 | .name = "leds-gpio", |
330 | .id = -1, | |
331 | .dev = { | |
fdfb03ba | 332 | .platform_data = &igep_led_pdata, |
bee15390 EBS |
333 | }, |
334 | }; | |
335 | ||
fdfb03ba | 336 | static void __init igep_leds_init(void) |
bee15390 | 337 | { |
2a60997a MR |
338 | if (machine_is_igep0020()) { |
339 | igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED; | |
340 | igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN; | |
341 | igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED; | |
342 | } else { | |
343 | igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED; | |
344 | igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN; | |
345 | igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED; | |
346 | } | |
0d4ab9a5 | 347 | |
fdfb03ba | 348 | platform_device_register(&igep_led_device); |
bee15390 EBS |
349 | } |
350 | ||
351 | #else | |
fdfb03ba | 352 | static struct gpio igep_gpio_leds[] __initdata = { |
2a60997a MR |
353 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d0" }, |
354 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:green:d0" }, | |
355 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d1" }, | |
bc593f5d IG |
356 | }; |
357 | ||
fdfb03ba | 358 | static inline void igep_leds_init(void) |
bee15390 | 359 | { |
0d4ab9a5 | 360 | int i; |
bee15390 | 361 | |
2a60997a MR |
362 | if (machine_is_igep0020()) { |
363 | igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED; | |
364 | igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN; | |
365 | igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED; | |
366 | } else { | |
367 | igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED; | |
368 | igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN; | |
369 | igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED; | |
370 | } | |
bee15390 | 371 | |
fdfb03ba | 372 | if (gpio_request_array(igep_gpio_leds, ARRAY_SIZE(igep_gpio_leds))) { |
bc593f5d IG |
373 | pr_warning("IGEP v2: Could not obtain leds gpios\n"); |
374 | return; | |
375 | } | |
bee15390 | 376 | |
0d4ab9a5 MR |
377 | for (i = 0; i < ARRAY_SIZE(igep_gpio_leds); i++) |
378 | gpio_export(igep_gpio_leds[i].gpio, 0); | |
bee15390 EBS |
379 | } |
380 | #endif | |
381 | ||
bc593f5d IG |
382 | static struct gpio igep2_twl_gpios[] = { |
383 | { -EINVAL, GPIOF_IN, "GPIO_EHCI_NOC" }, | |
384 | { -EINVAL, GPIOF_OUT_INIT_LOW, "GPIO_USBH_CPEN" }, | |
385 | }; | |
386 | ||
fdfb03ba | 387 | static int igep_twl_gpio_setup(struct device *dev, |
58e11162 EBS |
388 | unsigned gpio, unsigned ngpio) |
389 | { | |
bc593f5d IG |
390 | int ret; |
391 | ||
58e11162 EBS |
392 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
393 | mmc[0].gpio_cd = gpio + 0; | |
3b972bf0 | 394 | omap_hsmmc_late_init(mmc); |
58e11162 | 395 | |
bee15390 EBS |
396 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
397 | #if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) | |
0d4ab9a5 MR |
398 | ret = gpio_request_one(gpio + TWL4030_GPIO_MAX + 1, GPIOF_OUT_INIT_HIGH, |
399 | "gpio-led:green:d1"); | |
400 | if (ret == 0) | |
bee15390 | 401 | gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0); |
62d8e9e2 | 402 | else |
0d4ab9a5 | 403 | pr_warning("IGEP: Could not obtain gpio GPIO_LED1_GREEN\n"); |
bee15390 | 404 | #else |
0d4ab9a5 | 405 | igep_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1; |
bee15390 | 406 | #endif |
58e11162 | 407 | |
2a60997a MR |
408 | if (machine_is_igep0030()) |
409 | return 0; | |
410 | ||
61e118dd EBS |
411 | /* |
412 | * REVISIT: need ehci-omap hooks for external VBUS | |
413 | * power switch and overcurrent detect | |
414 | */ | |
bc593f5d | 415 | igep2_twl_gpios[0].gpio = gpio + 1; |
61e118dd | 416 | |
bc593f5d IG |
417 | /* TWL4030_GPIO_MAX + 0 == ledA, GPIO_USBH_CPEN (out, active low) */ |
418 | igep2_twl_gpios[1].gpio = gpio + TWL4030_GPIO_MAX; | |
419 | ||
420 | ret = gpio_request_array(igep2_twl_gpios, ARRAY_SIZE(igep2_twl_gpios)); | |
421 | if (ret < 0) | |
61e118dd EBS |
422 | pr_err("IGEP2: Could not obtain gpio for USBH_CPEN"); |
423 | ||
58e11162 EBS |
424 | return 0; |
425 | }; | |
426 | ||
fdfb03ba | 427 | static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { |
bee15390 | 428 | .use_leds = true, |
fdfb03ba | 429 | .setup = igep_twl_gpio_setup, |
58e11162 EBS |
430 | }; |
431 | ||
55086423 TV |
432 | static struct connector_dvi_platform_data omap3stalker_dvi_connector_pdata = { |
433 | .name = "dvi", | |
434 | .source = "tfp410.0", | |
435 | .i2c_bus_num = 3, | |
89747c91 BW |
436 | }; |
437 | ||
55086423 TV |
438 | static struct platform_device omap3stalker_dvi_connector_device = { |
439 | .name = "connector-dvi", | |
440 | .id = 0, | |
441 | .dev.platform_data = &omap3stalker_dvi_connector_pdata, | |
691de27f EBS |
442 | }; |
443 | ||
55086423 TV |
444 | static struct encoder_tfp410_platform_data omap3stalker_tfp410_pdata = { |
445 | .name = "tfp410.0", | |
446 | .source = "dpi.0", | |
447 | .data_lines = 24, | |
448 | .power_down_gpio = IGEP2_GPIO_DVI_PUP, | |
449 | }; | |
450 | ||
451 | static struct platform_device omap3stalker_tfp410_device = { | |
452 | .name = "tfp410", | |
453 | .id = 0, | |
454 | .dev.platform_data = &omap3stalker_tfp410_pdata, | |
691de27f EBS |
455 | }; |
456 | ||
457 | static struct omap_dss_board_info igep2_dss_data = { | |
55086423 | 458 | .default_display_name = "dvi", |
691de27f EBS |
459 | }; |
460 | ||
fdfb03ba MR |
461 | static struct platform_device *igep_devices[] __initdata = { |
462 | &igep_vwlan_device, | |
55086423 TV |
463 | &omap3stalker_tfp410_device, |
464 | &omap3stalker_dvi_connector_device, | |
691de27f EBS |
465 | }; |
466 | ||
18cbc7d9 EBS |
467 | static int igep2_keymap[] = { |
468 | KEY(0, 0, KEY_LEFT), | |
469 | KEY(0, 1, KEY_RIGHT), | |
470 | KEY(0, 2, KEY_A), | |
471 | KEY(0, 3, KEY_B), | |
472 | KEY(1, 0, KEY_DOWN), | |
473 | KEY(1, 1, KEY_UP), | |
474 | KEY(1, 2, KEY_E), | |
475 | KEY(1, 3, KEY_F), | |
476 | KEY(2, 0, KEY_ENTER), | |
477 | KEY(2, 1, KEY_I), | |
478 | KEY(2, 2, KEY_J), | |
479 | KEY(2, 3, KEY_K), | |
480 | KEY(3, 0, KEY_M), | |
481 | KEY(3, 1, KEY_N), | |
482 | KEY(3, 2, KEY_O), | |
483 | KEY(3, 3, KEY_P) | |
484 | }; | |
485 | ||
486 | static struct matrix_keymap_data igep2_keymap_data = { | |
487 | .keymap = igep2_keymap, | |
488 | .keymap_size = ARRAY_SIZE(igep2_keymap), | |
489 | }; | |
490 | ||
491 | static struct twl4030_keypad_data igep2_keypad_pdata = { | |
492 | .keymap_data = &igep2_keymap_data, | |
493 | .rows = 4, | |
494 | .cols = 4, | |
495 | .rep = 1, | |
496 | }; | |
497 | ||
fdfb03ba | 498 | static struct twl4030_platform_data igep_twldata = { |
58e11162 | 499 | /* platform_data for children goes here */ |
fdfb03ba | 500 | .gpio = &igep_twl4030_gpio_pdata, |
fdfb03ba | 501 | .vmmc1 = &igep_vmmc1, |
fdfb03ba | 502 | .vio = &igep_vio, |
58e11162 EBS |
503 | }; |
504 | ||
91d139cf EBS |
505 | static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = { |
506 | { | |
507 | I2C_BOARD_INFO("eeprom", 0x50), | |
508 | }, | |
509 | }; | |
510 | ||
fdfb03ba | 511 | static void __init igep_i2c_init(void) |
58e11162 | 512 | { |
91d139cf EBS |
513 | int ret; |
514 | ||
b2f44dc2 LP |
515 | omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, |
516 | TWL_COMMON_REGULATOR_VPLL2); | |
517 | igep_twldata.vpll2->constraints.apply_uV = true; | |
518 | igep_twldata.vpll2->constraints.name = "VDVI"; | |
827ed9ae | 519 | |
2a60997a MR |
520 | if (machine_is_igep0020()) { |
521 | /* | |
522 | * Bus 3 is attached to the DVI port where devices like the | |
523 | * pico DLP projector don't work reliably with 400kHz | |
524 | */ | |
525 | ret = omap_register_i2c_bus(3, 100, igep2_i2c3_boardinfo, | |
526 | ARRAY_SIZE(igep2_i2c3_boardinfo)); | |
527 | if (ret) | |
528 | pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); | |
529 | ||
2a60997a | 530 | igep_twldata.keypad = &igep2_keypad_pdata; |
b252b0ef | 531 | /* Get common pmic data */ |
b2f44dc2 | 532 | omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); |
2a60997a | 533 | } |
91d139cf | 534 | |
0d4ab9a5 | 535 | omap3_pmic_init("twl4030", &igep_twldata); |
58e11162 EBS |
536 | } |
537 | ||
9c4d678e RQ |
538 | static struct usbhs_phy_data igep2_phy_data[] __initdata = { |
539 | { | |
540 | .port = 1, | |
541 | .reset_gpio = IGEP2_GPIO_USBH_NRESET, | |
542 | .vcc_gpio = -EINVAL, | |
543 | }, | |
544 | }; | |
545 | ||
546 | static struct usbhs_phy_data igep3_phy_data[] __initdata = { | |
547 | { | |
548 | .port = 2, | |
549 | .reset_gpio = IGEP3_GPIO_USBH_NRESET, | |
550 | .vcc_gpio = -EINVAL, | |
551 | }, | |
552 | }; | |
553 | ||
42973159 | 554 | static struct usbhs_omap_platform_data igep2_usbhs_bdata __initdata = { |
181b250c | 555 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
d0885486 EBS |
556 | }; |
557 | ||
42973159 | 558 | static struct usbhs_omap_platform_data igep3_usbhs_bdata __initdata = { |
2a60997a | 559 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, |
2a60997a MR |
560 | }; |
561 | ||
ca5742bd TL |
562 | #ifdef CONFIG_OMAP_MUX |
563 | static struct omap_board_mux board_mux[] __initdata = { | |
e94eb1ac EBS |
564 | /* Display Sub System */ |
565 | OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
566 | OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
567 | OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
568 | OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
569 | OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
570 | OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
571 | OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
572 | OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
573 | OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
574 | OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
575 | OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
576 | OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
577 | OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
578 | OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
579 | OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
580 | OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
581 | OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
582 | OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
583 | OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
584 | OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
585 | OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
586 | OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
587 | OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
588 | OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
589 | OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
590 | OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
591 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
592 | OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), | |
593 | /* TFP410 PanelBus DVI Transmitte (GPIO_170) */ | |
594 | OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
a71eb61c JMC |
595 | /* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */ |
596 | OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
ca5742bd TL |
597 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
598 | }; | |
ca5742bd TL |
599 | #endif |
600 | ||
5a9fcc99 | 601 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) |
fdfb03ba | 602 | static struct gpio igep_wlan_bt_gpios[] __initdata = { |
bc593f5d IG |
603 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NPD" }, |
604 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NRESET" }, | |
605 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_BT_NRESET" }, | |
606 | }; | |
5a9fcc99 | 607 | |
fdfb03ba | 608 | static void __init igep_wlan_bt_init(void) |
5a9fcc99 | 609 | { |
bc593f5d | 610 | int err; |
5a9fcc99 EBS |
611 | |
612 | /* GPIO's for WLAN-BT combo depends on hardware revision */ | |
613 | if (hwrev == IGEP2_BOARD_HWREV_B) { | |
fdfb03ba MR |
614 | igep_wlan_bt_gpios[0].gpio = IGEP2_RB_GPIO_WIFI_NPD; |
615 | igep_wlan_bt_gpios[1].gpio = IGEP2_RB_GPIO_WIFI_NRESET; | |
616 | igep_wlan_bt_gpios[2].gpio = IGEP2_RB_GPIO_BT_NRESET; | |
2a60997a | 617 | } else if (hwrev == IGEP2_BOARD_HWREV_C || machine_is_igep0030()) { |
fdfb03ba MR |
618 | igep_wlan_bt_gpios[0].gpio = IGEP2_RC_GPIO_WIFI_NPD; |
619 | igep_wlan_bt_gpios[1].gpio = IGEP2_RC_GPIO_WIFI_NRESET; | |
620 | igep_wlan_bt_gpios[2].gpio = IGEP2_RC_GPIO_BT_NRESET; | |
5a9fcc99 EBS |
621 | } else |
622 | return; | |
623 | ||
cbf6bae1 AH |
624 | /* Make sure that the GPIO pins are muxed correctly */ |
625 | omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT); | |
626 | omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT); | |
627 | omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT); | |
628 | ||
fdfb03ba MR |
629 | err = gpio_request_array(igep_wlan_bt_gpios, |
630 | ARRAY_SIZE(igep_wlan_bt_gpios)); | |
bc593f5d IG |
631 | if (err) { |
632 | pr_warning("IGEP2: Could not obtain WIFI/BT gpios\n"); | |
633 | return; | |
634 | } | |
635 | ||
fdfb03ba MR |
636 | gpio_export(igep_wlan_bt_gpios[0].gpio, 0); |
637 | gpio_export(igep_wlan_bt_gpios[1].gpio, 0); | |
638 | gpio_export(igep_wlan_bt_gpios[2].gpio, 0); | |
bc593f5d | 639 | |
fdfb03ba | 640 | gpio_set_value(igep_wlan_bt_gpios[1].gpio, 0); |
bc593f5d | 641 | udelay(10); |
fdfb03ba | 642 | gpio_set_value(igep_wlan_bt_gpios[1].gpio, 1); |
5a9fcc99 | 643 | |
5a9fcc99 EBS |
644 | } |
645 | #else | |
fdfb03ba | 646 | static inline void __init igep_wlan_bt_init(void) { } |
5a9fcc99 EBS |
647 | #endif |
648 | ||
5b3689f4 RD |
649 | static struct regulator_consumer_supply dummy_supplies[] = { |
650 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | |
651 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | |
652 | }; | |
653 | ||
fdfb03ba | 654 | static void __init igep_init(void) |
58e11162 | 655 | { |
1a21932e | 656 | regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies)); |
ca5742bd | 657 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
3f8c48d9 EBS |
658 | |
659 | /* Get IGEP2 hardware revision */ | |
660 | igep2_get_revision(); | |
3b972bf0 TL |
661 | |
662 | omap_hsmmc_init(mmc); | |
663 | ||
91d139cf | 664 | /* Register I2C busses and drivers */ |
fdfb03ba MR |
665 | igep_i2c_init(); |
666 | platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); | |
58e11162 | 667 | omap_serial_init(); |
a4ca9dbe TL |
668 | omap_sdrc_init(m65kxxxxam_sdrc_params, |
669 | m65kxxxxam_sdrc_params); | |
51482be9 | 670 | usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); |
9e18630b | 671 | usb_musb_init(NULL); |
58e11162 | 672 | |
fdfb03ba MR |
673 | igep_flash_init(); |
674 | igep_leds_init(); | |
40234bf7 | 675 | omap_twl4030_audio_init("igep2", NULL); |
58e11162 | 676 | |
5a9fcc99 | 677 | /* |
25985edc | 678 | * WLAN-BT combo module from MuRata which has a Marvell WLAN |
5a9fcc99 EBS |
679 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. |
680 | */ | |
fdfb03ba | 681 | igep_wlan_bt_init(); |
c67b0d98 | 682 | |
2a60997a MR |
683 | if (machine_is_igep0020()) { |
684 | omap_display_init(&igep2_dss_data); | |
2a60997a | 685 | igep2_init_smsc911x(); |
9c4d678e | 686 | usbhs_init_phys(igep2_phy_data, ARRAY_SIZE(igep2_phy_data)); |
2a60997a MR |
687 | usbhs_init(&igep2_usbhs_bdata); |
688 | } else { | |
9c4d678e | 689 | usbhs_init_phys(igep3_phy_data, ARRAY_SIZE(igep3_phy_data)); |
2a60997a MR |
690 | usbhs_init(&igep3_usbhs_bdata); |
691 | } | |
58e11162 EBS |
692 | } |
693 | ||
58e11162 | 694 | MACHINE_START(IGEP0020, "IGEP v2 board") |
5e52b435 | 695 | .atag_offset = 0x100, |
71ee7dad | 696 | .reserve = omap_reserve, |
3dc3bad6 | 697 | .map_io = omap3_map_io, |
8f5b5a41 | 698 | .init_early = omap35xx_init_early, |
741e3a89 | 699 | .init_irq = omap3_init_irq, |
6b2f55d7 | 700 | .handle_irq = omap3_intc_handle_irq, |
fdfb03ba | 701 | .init_machine = igep_init, |
bbd707ac | 702 | .init_late = omap35xx_init_late, |
6bb27d73 | 703 | .init_time = omap3_sync32k_timer_init, |
187e3e06 | 704 | .restart = omap3xxx_restart, |
58e11162 | 705 | MACHINE_END |
2a60997a MR |
706 | |
707 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") | |
5e52b435 | 708 | .atag_offset = 0x100, |
2a60997a MR |
709 | .reserve = omap_reserve, |
710 | .map_io = omap3_map_io, | |
8f5b5a41 | 711 | .init_early = omap35xx_init_early, |
741e3a89 | 712 | .init_irq = omap3_init_irq, |
6b2f55d7 | 713 | .handle_irq = omap3_intc_handle_irq, |
2a60997a | 714 | .init_machine = igep_init, |
bbd707ac | 715 | .init_late = omap35xx_init_late, |
6bb27d73 | 716 | .init_time = omap3_sync32k_timer_init, |
187e3e06 | 717 | .restart = omap3xxx_restart, |
58e11162 | 718 | MACHINE_END |