Commit | Line | Data |
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49265651 NK |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-ldp.c | |
3 | * | |
4 | * Copyright (C) 2008 Texas Instruments Inc. | |
5 | * Nishant Kamat <nskamat@ti.com> | |
6 | * | |
7 | * Modified from mach-omap2/board-3430sdp.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
2f8163ba | 13 | #include <linux/gpio.h> |
49265651 NK |
14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/input.h> | |
6135434a | 19 | #include <linux/input/matrix_keypad.h> |
4a899d5e | 20 | #include <linux/gpio_keys.h> |
49265651 NK |
21 | #include <linux/workqueue.h> |
22 | #include <linux/err.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/spi/spi.h> | |
5b3689f4 | 25 | #include <linux/regulator/fixed.h> |
4a899d5e | 26 | #include <linux/regulator/machine.h> |
b07682b6 | 27 | #include <linux/i2c/twl.h> |
99730225 | 28 | #include <linux/io.h> |
1c0e147e | 29 | #include <linux/smsc911x.h> |
3a63833e | 30 | #include <linux/mmc/host.h> |
51482be9 | 31 | #include <linux/usb/phy.h> |
2203747c | 32 | #include <linux/platform_data/spi-omap2-mcspi.h> |
49265651 | 33 | |
49265651 NK |
34 | #include <asm/mach-types.h> |
35 | #include <asm/mach/arch.h> | |
36 | #include <asm/mach/map.h> | |
37 | ||
4e65331c | 38 | #include "common.h" |
6d02643d | 39 | #include "gpmc.h" |
ac839b3c | 40 | #include "gpmc-smsc911x.h" |
49265651 | 41 | |
14dd72d8 | 42 | #include <video/omapdss.h> |
a0d8dde9 | 43 | #include <video/omap-panel-data.h> |
14dd72d8 | 44 | |
04aeae77 | 45 | #include "board-flash.h" |
ca5742bd | 46 | #include "mux.h" |
d02a900b | 47 | #include "hsmmc.h" |
4814ced5 | 48 | #include "control.h" |
96974a24 | 49 | #include "common-board-devices.h" |
90c62bf0 | 50 | |
1c0e147e SG |
51 | #define LDP_SMSC911X_CS 1 |
52 | #define LDP_SMSC911X_GPIO 152 | |
ec7558a6 TL |
53 | #define DEBUG_BASE 0x08000000 |
54 | #define LDP_ETHR_START DEBUG_BASE | |
b1c056d2 | 55 | |
bead4375 | 56 | static uint32_t board_keymap[] = { |
4a899d5e TL |
57 | KEY(0, 0, KEY_1), |
58 | KEY(1, 0, KEY_2), | |
59 | KEY(2, 0, KEY_3), | |
60 | KEY(0, 1, KEY_4), | |
61 | KEY(1, 1, KEY_5), | |
62 | KEY(2, 1, KEY_6), | |
63 | KEY(3, 1, KEY_F5), | |
64 | KEY(0, 2, KEY_7), | |
65 | KEY(1, 2, KEY_8), | |
66 | KEY(2, 2, KEY_9), | |
67 | KEY(3, 2, KEY_F6), | |
68 | KEY(0, 3, KEY_F7), | |
69 | KEY(1, 3, KEY_0), | |
70 | KEY(2, 3, KEY_F8), | |
71 | PERSISTENT_KEY(4, 5), | |
72 | KEY(4, 4, KEY_VOLUMEUP), | |
73 | KEY(5, 5, KEY_VOLUMEDOWN), | |
74 | 0 | |
75 | }; | |
76 | ||
4f543332 TL |
77 | static struct matrix_keymap_data board_map_data = { |
78 | .keymap = board_keymap, | |
79 | .keymap_size = ARRAY_SIZE(board_keymap), | |
80 | }; | |
81 | ||
4a899d5e | 82 | static struct twl4030_keypad_data ldp_kp_twl4030_data = { |
4f543332 | 83 | .keymap_data = &board_map_data, |
4a899d5e TL |
84 | .rows = 6, |
85 | .cols = 6, | |
4a899d5e TL |
86 | .rep = 1, |
87 | }; | |
88 | ||
89 | static struct gpio_keys_button ldp_gpio_keys_buttons[] = { | |
90 | [0] = { | |
91 | .code = KEY_ENTER, | |
92 | .gpio = 101, | |
93 | .desc = "enter sw", | |
94 | .active_low = 1, | |
95 | .debounce_interval = 30, | |
96 | }, | |
97 | [1] = { | |
98 | .code = KEY_F1, | |
99 | .gpio = 102, | |
100 | .desc = "func 1", | |
101 | .active_low = 1, | |
102 | .debounce_interval = 30, | |
103 | }, | |
104 | [2] = { | |
105 | .code = KEY_F2, | |
106 | .gpio = 103, | |
107 | .desc = "func 2", | |
108 | .active_low = 1, | |
109 | .debounce_interval = 30, | |
110 | }, | |
111 | [3] = { | |
112 | .code = KEY_F3, | |
113 | .gpio = 104, | |
114 | .desc = "func 3", | |
115 | .active_low = 1, | |
116 | .debounce_interval = 30, | |
117 | }, | |
118 | [4] = { | |
119 | .code = KEY_F4, | |
120 | .gpio = 105, | |
121 | .desc = "func 4", | |
122 | .active_low = 1, | |
123 | .debounce_interval = 30, | |
124 | }, | |
125 | [5] = { | |
126 | .code = KEY_LEFT, | |
127 | .gpio = 106, | |
128 | .desc = "left sw", | |
129 | .active_low = 1, | |
130 | .debounce_interval = 30, | |
131 | }, | |
132 | [6] = { | |
133 | .code = KEY_RIGHT, | |
134 | .gpio = 107, | |
135 | .desc = "right sw", | |
136 | .active_low = 1, | |
137 | .debounce_interval = 30, | |
138 | }, | |
139 | [7] = { | |
140 | .code = KEY_UP, | |
141 | .gpio = 108, | |
142 | .desc = "up sw", | |
143 | .active_low = 1, | |
144 | .debounce_interval = 30, | |
145 | }, | |
146 | [8] = { | |
147 | .code = KEY_DOWN, | |
148 | .gpio = 109, | |
149 | .desc = "down sw", | |
150 | .active_low = 1, | |
151 | .debounce_interval = 30, | |
152 | }, | |
153 | }; | |
154 | ||
155 | static struct gpio_keys_platform_data ldp_gpio_keys = { | |
156 | .buttons = ldp_gpio_keys_buttons, | |
157 | .nbuttons = ARRAY_SIZE(ldp_gpio_keys_buttons), | |
158 | .rep = 1, | |
159 | }; | |
160 | ||
161 | static struct platform_device ldp_gpio_keys_device = { | |
162 | .name = "gpio-keys", | |
163 | .id = -1, | |
164 | .dev = { | |
165 | .platform_data = &ldp_gpio_keys, | |
166 | }, | |
167 | }; | |
168 | ||
21b42731 MR |
169 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
170 | .cs = LDP_SMSC911X_CS, | |
171 | .gpio_irq = LDP_SMSC911X_GPIO, | |
172 | .gpio_reset = -EINVAL, | |
173 | .flags = SMSC911X_USE_32BIT, | |
174 | }; | |
175 | ||
1c0e147e | 176 | static inline void __init ldp_init_smsc911x(void) |
b1c056d2 | 177 | { |
21b42731 | 178 | gpmc_smsc911x_init(&smsc911x_cfg); |
b1c056d2 SM |
179 | } |
180 | ||
14dd72d8 TV |
181 | /* LCD */ |
182 | ||
14dd72d8 TV |
183 | #define LCD_PANEL_RESET_GPIO 55 |
184 | #define LCD_PANEL_QVGA_GPIO 56 | |
185 | ||
f23248d4 TV |
186 | static const struct display_timing ldp_lcd_videomode = { |
187 | .pixelclock = { 0, 5400000, 0 }, | |
188 | ||
189 | .hactive = { 0, 240, 0 }, | |
190 | .hfront_porch = { 0, 3, 0 }, | |
191 | .hback_porch = { 0, 39, 0 }, | |
192 | .hsync_len = { 0, 3, 0 }, | |
193 | ||
194 | .vactive = { 0, 320, 0 }, | |
195 | .vfront_porch = { 0, 2, 0 }, | |
196 | .vback_porch = { 0, 7, 0 }, | |
197 | .vsync_len = { 0, 1, 0 }, | |
198 | ||
199 | .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW | | |
200 | DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE, | |
49adf465 ID |
201 | }; |
202 | ||
f23248d4 TV |
203 | static struct panel_dpi_platform_data ldp_lcd_pdata = { |
204 | .name = "lcd", | |
205 | .source = "dpi.0", | |
206 | ||
207 | .data_lines = 18, | |
208 | ||
209 | .display_timing = &ldp_lcd_videomode, | |
210 | ||
211 | .enable_gpio = -1, /* filled in code */ | |
212 | .backlight_gpio = -1, /* filled in code */ | |
14dd72d8 TV |
213 | }; |
214 | ||
f23248d4 TV |
215 | static struct platform_device ldp_lcd_device = { |
216 | .name = "panel-dpi", | |
217 | .id = 0, | |
218 | .dev.platform_data = &ldp_lcd_pdata, | |
49adf465 ID |
219 | }; |
220 | ||
14dd72d8 | 221 | static struct omap_dss_board_info ldp_dss_data = { |
f23248d4 | 222 | .default_display_name = "lcd", |
49265651 NK |
223 | }; |
224 | ||
14dd72d8 TV |
225 | static void __init ldp_display_init(void) |
226 | { | |
f23248d4 TV |
227 | int r; |
228 | ||
229 | static struct gpio gpios[] __initdata = { | |
230 | {LCD_PANEL_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "LCD RESET"}, | |
231 | {LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "LCD QVGA"}, | |
232 | }; | |
233 | ||
234 | r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); | |
235 | if (r) { | |
236 | pr_err("Cannot request LCD GPIOs, error %d\n", r); | |
237 | return; | |
238 | } | |
14dd72d8 TV |
239 | |
240 | omap_display_init(&ldp_dss_data); | |
241 | } | |
242 | ||
14dd72d8 TV |
243 | static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) |
244 | { | |
7e367c18 TL |
245 | int res; |
246 | ||
f23248d4 TV |
247 | /* LCD enable GPIO */ |
248 | ldp_lcd_pdata.enable_gpio = gpio + 7; | |
14dd72d8 | 249 | |
f23248d4 TV |
250 | /* Backlight enable GPIO */ |
251 | ldp_lcd_pdata.backlight_gpio = gpio + 15; | |
14dd72d8 | 252 | |
7e367c18 TL |
253 | res = platform_device_register(&ldp_lcd_device); |
254 | if (res) | |
255 | pr_err("Unable to register LCD: %d\n", res); | |
256 | ||
14dd72d8 TV |
257 | return 0; |
258 | } | |
259 | ||
90c62bf0 | 260 | static struct twl4030_gpio_platform_data ldp_gpio_data = { |
14dd72d8 | 261 | .setup = ldp_twl_gpio_setup, |
90c62bf0 TL |
262 | }; |
263 | ||
786b01a8 OD |
264 | static struct regulator_consumer_supply ldp_vmmc1_supply[] = { |
265 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
4a899d5e TL |
266 | }; |
267 | ||
268 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | |
269 | static struct regulator_init_data ldp_vmmc1 = { | |
270 | .constraints = { | |
271 | .min_uV = 1850000, | |
272 | .max_uV = 3150000, | |
273 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
274 | | REGULATOR_MODE_STANDBY, | |
275 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
276 | | REGULATOR_CHANGE_MODE | |
277 | | REGULATOR_CHANGE_STATUS, | |
278 | }, | |
786b01a8 OD |
279 | .num_consumer_supplies = ARRAY_SIZE(ldp_vmmc1_supply), |
280 | .consumer_supplies = ldp_vmmc1_supply, | |
4a899d5e TL |
281 | }; |
282 | ||
f463effe TL |
283 | /* ads7846 on SPI */ |
284 | static struct regulator_consumer_supply ldp_vaux1_supplies[] = { | |
285 | REGULATOR_SUPPLY("vcc", "spi1.0"), | |
286 | }; | |
287 | ||
288 | /* VAUX1 */ | |
289 | static struct regulator_init_data ldp_vaux1 = { | |
290 | .constraints = { | |
291 | .min_uV = 3000000, | |
292 | .max_uV = 3000000, | |
293 | .apply_uV = true, | |
294 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
295 | | REGULATOR_MODE_STANDBY, | |
296 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
297 | | REGULATOR_CHANGE_STATUS, | |
298 | }, | |
299 | .num_consumer_supplies = ARRAY_SIZE(ldp_vaux1_supplies), | |
300 | .consumer_supplies = ldp_vaux1_supplies, | |
301 | }; | |
302 | ||
14dd72d8 TV |
303 | static struct regulator_consumer_supply ldp_vpll2_supplies[] = { |
304 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | |
1f92a1a4 | 305 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"), |
1738ddbe | 306 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), |
14dd72d8 TV |
307 | }; |
308 | ||
309 | static struct regulator_init_data ldp_vpll2 = { | |
310 | .constraints = { | |
311 | .name = "VDVI", | |
312 | .min_uV = 1800000, | |
313 | .max_uV = 1800000, | |
314 | .apply_uV = true, | |
315 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
316 | | REGULATOR_MODE_STANDBY, | |
317 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
318 | | REGULATOR_CHANGE_STATUS, | |
319 | }, | |
320 | .num_consumer_supplies = ARRAY_SIZE(ldp_vpll2_supplies), | |
321 | .consumer_supplies = ldp_vpll2_supplies, | |
322 | }; | |
323 | ||
90c62bf0 | 324 | static struct twl4030_platform_data ldp_twldata = { |
90c62bf0 | 325 | /* platform_data for children goes here */ |
4a899d5e | 326 | .vmmc1 = &ldp_vmmc1, |
f463effe | 327 | .vaux1 = &ldp_vaux1, |
14dd72d8 | 328 | .vpll2 = &ldp_vpll2, |
90c62bf0 | 329 | .gpio = &ldp_gpio_data, |
4a899d5e | 330 | .keypad = &ldp_kp_twl4030_data, |
90c62bf0 TL |
331 | }; |
332 | ||
49265651 NK |
333 | static int __init omap_i2c_init(void) |
334 | { | |
827ed9ae PU |
335 | omap3_pmic_get_config(&ldp_twldata, |
336 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); | |
fbd8071c | 337 | omap3_pmic_init("twl4030", &ldp_twldata); |
49265651 NK |
338 | omap_register_i2c_bus(2, 400, NULL, 0); |
339 | omap_register_i2c_bus(3, 400, NULL, 0); | |
340 | return 0; | |
341 | } | |
342 | ||
68ff0423 | 343 | static struct omap2_hsmmc_info mmc[] __initdata = { |
90c62bf0 TL |
344 | { |
345 | .mmc = 1, | |
3a63833e | 346 | .caps = MMC_CAP_4_BIT_DATA, |
90c62bf0 TL |
347 | .gpio_cd = -EINVAL, |
348 | .gpio_wp = -EINVAL, | |
349 | }, | |
350 | {} /* Terminator */ | |
351 | }; | |
352 | ||
49adf465 | 353 | static struct platform_device *ldp_devices[] __initdata = { |
4a899d5e | 354 | &ldp_gpio_keys_device, |
49adf465 ID |
355 | }; |
356 | ||
ca5742bd TL |
357 | #ifdef CONFIG_OMAP_MUX |
358 | static struct omap_board_mux board_mux[] __initdata = { | |
359 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
360 | }; | |
ca5742bd TL |
361 | #endif |
362 | ||
2430f9df SG |
363 | static struct mtd_partition ldp_nand_partitions[] = { |
364 | /* All the partition sizes are listed in terms of NAND block size */ | |
365 | { | |
366 | .name = "X-Loader-NAND", | |
367 | .offset = 0, | |
368 | .size = 4 * (64 * 2048), /* 512KB, 0x80000 */ | |
369 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
370 | }, | |
371 | { | |
372 | .name = "U-Boot-NAND", | |
373 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
374 | .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */ | |
375 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
376 | }, | |
377 | { | |
378 | .name = "Boot Env-NAND", | |
379 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ | |
380 | .size = 2 * (64 * 2048), /* 256KB, 0x40000 */ | |
381 | }, | |
382 | { | |
383 | .name = "Kernel-NAND", | |
384 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/ | |
385 | .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */ | |
386 | }, | |
387 | { | |
388 | .name = "File System - NAND", | |
389 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */ | |
390 | .size = MTDPART_SIZ_FULL, /* 96MB, 0x6000000 */ | |
391 | }, | |
392 | ||
393 | }; | |
394 | ||
5b3689f4 RD |
395 | static struct regulator_consumer_supply dummy_supplies[] = { |
396 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | |
397 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | |
398 | }; | |
399 | ||
49265651 NK |
400 | static void __init omap_ldp_init(void) |
401 | { | |
5b3689f4 | 402 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); |
ca5742bd | 403 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
c2cdaffe | 404 | ldp_init_smsc911x(); |
49265651 | 405 | omap_i2c_init(); |
b1c056d2 | 406 | platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); |
96974a24 | 407 | omap_ads7846_init(1, 54, 310, NULL); |
49265651 | 408 | omap_serial_init(); |
a4ca9dbe | 409 | omap_sdrc_init(NULL, NULL); |
51482be9 | 410 | usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); |
9e18630b | 411 | usb_musb_init(NULL); |
2e618261 | 412 | board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions), |
97411608 | 413 | 0, 0, nand_default_timings); |
4a899d5e | 414 | |
3b972bf0 | 415 | omap_hsmmc_init(mmc); |
14dd72d8 | 416 | ldp_display_init(); |
49265651 NK |
417 | } |
418 | ||
49265651 | 419 | MACHINE_START(OMAP_LDP, "OMAP LDP board") |
5e52b435 | 420 | .atag_offset = 0x100, |
71ee7dad | 421 | .reserve = omap_reserve, |
3dc3bad6 | 422 | .map_io = omap3_map_io, |
8f5b5a41 | 423 | .init_early = omap3430_init_early, |
741e3a89 | 424 | .init_irq = omap3_init_irq, |
49265651 | 425 | .init_machine = omap_ldp_init, |
bbd707ac | 426 | .init_late = omap3430_init_late, |
6bb27d73 | 427 | .init_time = omap3_sync32k_timer_init, |
187e3e06 | 428 | .restart = omap3xxx_restart, |
49265651 | 429 | MACHINE_END |