Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
[deliverable/linux.git] / arch / arm / mach-omap2 / board-n8x0.c
CommitLineData
63138812
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1/*
2 * linux/arch/arm/mach-omap2/board-n8x0.c
3 *
4 * Copyright (C) 2005-2009 Nokia Corporation
5 * Author: Juha Yrjola <juha.yrjola@nokia.com>
6 *
7 * Modified from mach-omap2/board-generic.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/init.h>
18#include <linux/io.h>
0857ba3c 19#include <linux/irq.h>
63138812 20#include <linux/stddef.h>
9418c65f 21#include <linux/i2c.h>
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22#include <linux/spi/spi.h>
23#include <linux/usb/musb.h>
0857ba3c 24#include <linux/platform_data/i2c-cbus-gpio.h>
2203747c
AB
25#include <linux/platform_data/spi-omap2-mcspi.h>
26#include <linux/platform_data/mtd-onenand-omap2.h>
7bd3b618 27#include <linux/mfd/menelaus.h>
366498d4 28#include <sound/tlv320aic3x.h>
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29
30#include <asm/mach/arch.h>
31#include <asm/mach-types.h>
32
4e65331c 33#include "common.h"
68f39e74 34#include "mmc.h"
63138812 35
bd8f0fc9 36#include "mux.h"
b6ab13e7 37#include "gpmc-onenand.h"
bd8f0fc9 38
97b9ad16
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39#define TUSB6010_ASYNC_CS 1
40#define TUSB6010_SYNC_CS 4
41#define TUSB6010_GPIO_INT 58
42#define TUSB6010_GPIO_ENABLE 0
43#define TUSB6010_DMACHAN 0x3f
44
0857ba3c
AK
45#if defined(CONFIG_I2C_CBUS_GPIO) || defined(CONFIG_I2C_CBUS_GPIO_MODULE)
46static struct i2c_cbus_platform_data n8x0_cbus_data = {
47 .clk_gpio = 66,
48 .dat_gpio = 65,
49 .sel_gpio = 64,
50};
51
52static struct platform_device n8x0_cbus_device = {
53 .name = "i2c-cbus-gpio",
54 .id = 3,
55 .dev = {
56 .platform_data = &n8x0_cbus_data,
57 },
58};
59
60static struct i2c_board_info n8x0_i2c_board_info_3[] __initdata = {
61 {
62 I2C_BOARD_INFO("retu-mfd", 0x01),
63 },
64};
65
66static void __init n8x0_cbus_init(void)
67{
68 const int retu_irq_gpio = 108;
69
70 if (gpio_request_one(retu_irq_gpio, GPIOF_IN, "Retu IRQ"))
71 return;
72 irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING);
73 n8x0_i2c_board_info_3[0].irq = gpio_to_irq(retu_irq_gpio);
74 i2c_register_board_info(3, n8x0_i2c_board_info_3,
75 ARRAY_SIZE(n8x0_i2c_board_info_3));
76 platform_device_register(&n8x0_cbus_device);
77}
78#else /* CONFIG_I2C_CBUS_GPIO */
79static void __init n8x0_cbus_init(void)
80{
81}
82#endif /* CONFIG_I2C_CBUS_GPIO */
83
9a35f876 84#if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
97b9ad16
FA
85/*
86 * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
87 * 1.5 V voltage regulators of PM companion chip. Companion chip will then
88 * provide then PGOOD signal to TUSB6010 which will release it from reset.
89 */
90static int tusb_set_power(int state)
91{
92 int i, retval = 0;
93
94 if (state) {
95 gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
96 msleep(1);
97
98 /* Wait until TUSB6010 pulls INT pin down */
99 i = 100;
100 while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
101 msleep(1);
102 i--;
103 }
104
105 if (!i) {
106 printk(KERN_ERR "tusb: powerup failed\n");
107 retval = -ENODEV;
108 }
109 } else {
110 gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
111 msleep(10);
112 }
113
114 return retval;
115}
116
117static struct musb_hdrc_config musb_config = {
118 .multipoint = 1,
119 .dyn_fifo = 1,
120 .num_eps = 16,
121 .ram_bits = 12,
122};
123
124static struct musb_hdrc_platform_data tusb_data = {
97b9ad16 125 .mode = MUSB_OTG,
97b9ad16
FA
126 .set_power = tusb_set_power,
127 .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
128 .power = 100, /* Max 100 mA VBUS for host mode */
129 .config = &musb_config,
130};
131
132static void __init n8x0_usb_init(void)
133{
134 int ret = 0;
135 static char announce[] __initdata = KERN_INFO "TUSB 6010\n";
136
137 /* PM companion chip power control pin */
bc593f5d
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138 ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
139 "TUSB6010 enable");
97b9ad16
FA
140 if (ret != 0) {
141 printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
142 TUSB6010_GPIO_ENABLE);
143 return;
144 }
97b9ad16
FA
145 tusb_set_power(0);
146
147 ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
148 TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
149 TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
150 if (ret != 0)
151 goto err;
152
153 printk(announce);
154
155 return;
156
157err:
158 gpio_free(TUSB6010_GPIO_ENABLE);
159}
160#else
161
162static void __init n8x0_usb_init(void) {}
163
7c925546 164#endif /*CONFIG_USB_MUSB_TUSB6010 */
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165
166
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167static struct omap2_mcspi_device_config p54spi_mcspi_config = {
168 .turbo_mode = 0,
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169};
170
171static struct spi_board_info n800_spi_board_info[] __initdata = {
172 {
173 .modalias = "p54spi",
174 .bus_num = 2,
175 .chip_select = 0,
176 .max_speed_hz = 48000000,
177 .controller_data = &p54spi_mcspi_config,
178 },
179};
180
181#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
182 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
183
184static struct mtd_partition onenand_partitions[] = {
185 {
186 .name = "bootloader",
187 .offset = 0,
188 .size = 0x20000,
189 .mask_flags = MTD_WRITEABLE, /* Force read-only */
190 },
191 {
192 .name = "config",
193 .offset = MTDPART_OFS_APPEND,
194 .size = 0x60000,
195 },
196 {
197 .name = "kernel",
198 .offset = MTDPART_OFS_APPEND,
199 .size = 0x200000,
200 },
201 {
202 .name = "initfs",
203 .offset = MTDPART_OFS_APPEND,
204 .size = 0x400000,
205 },
206 {
207 .name = "rootfs",
208 .offset = MTDPART_OFS_APPEND,
209 .size = MTDPART_SIZ_FULL,
210 },
211};
212
a1a92e6f
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213static struct omap_onenand_platform_data board_onenand_data[] = {
214 {
215 .cs = 0,
216 .gpio_irq = 26,
217 .parts = onenand_partitions,
218 .nr_parts = ARRAY_SIZE(onenand_partitions),
219 .flags = ONENAND_SYNC_READ,
220 }
63138812 221};
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222#endif
223
9418c65f
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224#if defined(CONFIG_MENELAUS) && \
225 (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE))
226
227/*
228 * On both N800 and N810, only the first of the two MMC controllers is in use.
229 * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
230 * On N800, both slots are powered via Menelaus. On N810, only one of the
231 * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
232 *
233 * VMMC slot 1 on both N800 and N810
234 * VDCDC3_APE and VMCS2_APE slot 2 on N800
235 * GPIO23 and GPIO9 slot 2 EMMC on N810
236 *
237 */
238#define N8X0_SLOT_SWITCH_GPIO 96
239#define N810_EMMC_VSD_GPIO 23
1dea5c6b 240#define N810_EMMC_VIO_GPIO 9
9418c65f 241
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242static int slot1_cover_open;
243static int slot2_cover_open;
244static struct device *mmc_device;
245
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246static int n8x0_mmc_switch_slot(struct device *dev, int slot)
247{
248#ifdef CONFIG_MMC_DEBUG
249 dev_dbg(dev, "Choose slot %d\n", slot + 1);
250#endif
251 gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
252 return 0;
253}
254
255static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
256 int power_on, int vdd)
257{
258 int mV;
259
260#ifdef CONFIG_MMC_DEBUG
261 dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
262 power_on ? "on" : "off", vdd);
263#endif
264 if (slot == 0) {
265 if (!power_on)
266 return menelaus_set_vmmc(0);
267 switch (1 << vdd) {
268 case MMC_VDD_33_34:
269 case MMC_VDD_32_33:
270 case MMC_VDD_31_32:
271 mV = 3100;
272 break;
273 case MMC_VDD_30_31:
274 mV = 3000;
275 break;
276 case MMC_VDD_28_29:
277 mV = 2800;
278 break;
279 case MMC_VDD_165_195:
280 mV = 1850;
281 break;
282 default:
283 BUG();
284 }
285 return menelaus_set_vmmc(mV);
286 } else {
287 if (!power_on)
288 return menelaus_set_vdcdc(3, 0);
289 switch (1 << vdd) {
290 case MMC_VDD_33_34:
291 case MMC_VDD_32_33:
292 mV = 3300;
293 break;
294 case MMC_VDD_30_31:
295 case MMC_VDD_29_30:
296 mV = 3000;
297 break;
298 case MMC_VDD_28_29:
299 case MMC_VDD_27_28:
300 mV = 2800;
301 break;
302 case MMC_VDD_24_25:
303 case MMC_VDD_23_24:
304 mV = 2400;
305 break;
306 case MMC_VDD_22_23:
307 case MMC_VDD_21_22:
308 mV = 2200;
309 break;
310 case MMC_VDD_20_21:
311 mV = 2000;
312 break;
313 case MMC_VDD_165_195:
314 mV = 1800;
315 break;
316 default:
317 BUG();
318 }
319 return menelaus_set_vdcdc(3, mV);
320 }
321 return 0;
322}
323
324static void n810_set_power_emmc(struct device *dev,
325 int power_on)
326{
327 dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
328
329 if (power_on) {
330 gpio_set_value(N810_EMMC_VSD_GPIO, 1);
331 msleep(1);
1dea5c6b 332 gpio_set_value(N810_EMMC_VIO_GPIO, 1);
9418c65f
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333 msleep(1);
334 } else {
1dea5c6b 335 gpio_set_value(N810_EMMC_VIO_GPIO, 0);
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336 msleep(50);
337 gpio_set_value(N810_EMMC_VSD_GPIO, 0);
338 msleep(50);
339 }
340}
341
342static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
343 int vdd)
344{
345 if (machine_is_nokia_n800() || slot == 0)
346 return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
347
348 n810_set_power_emmc(dev, power_on);
349
350 return 0;
351}
352
353static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
354{
355 int r;
356
357 dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
358 bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
359 BUG_ON(slot != 0 && slot != 1);
360 slot++;
361 switch (bus_mode) {
362 case MMC_BUSMODE_OPENDRAIN:
363 r = menelaus_set_mmc_opendrain(slot, 1);
364 break;
365 case MMC_BUSMODE_PUSHPULL:
366 r = menelaus_set_mmc_opendrain(slot, 0);
367 break;
368 default:
369 BUG();
370 }
371 if (r != 0 && printk_ratelimit())
372 dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
373 slot);
374 return r;
375}
376
377static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
378{
379 slot++;
380 BUG_ON(slot != 1 && slot != 2);
381 if (slot == 1)
382 return slot1_cover_open;
383 else
384 return slot2_cover_open;
385}
386
387static void n8x0_mmc_callback(void *data, u8 card_mask)
388{
389 int bit, *openp, index;
390
391 if (machine_is_nokia_n800()) {
392 bit = 1 << 1;
393 openp = &slot2_cover_open;
394 index = 1;
395 } else {
396 bit = 1;
397 openp = &slot1_cover_open;
398 index = 0;
399 }
400
401 if (card_mask & bit)
402 *openp = 1;
403 else
404 *openp = 0;
405
d5171102 406#ifdef CONFIG_MMC_OMAP
9418c65f 407 omap_mmc_notify_cover_event(mmc_device, index, *openp);
d5171102
TL
408#else
409 pr_warn("MMC: notify cover event not available\n");
410#endif
9418c65f
TL
411}
412
9418c65f
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413static int n8x0_mmc_late_init(struct device *dev)
414{
415 int r, bit, *openp;
416 int vs2sel;
417
418 mmc_device = dev;
419
420 r = menelaus_set_slot_sel(1);
421 if (r < 0)
422 return r;
423
424 if (machine_is_nokia_n800())
425 vs2sel = 0;
426 else
427 vs2sel = 2;
428
429 r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
430 if (r < 0)
431 return r;
432
433 n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
434 n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
435
436 r = menelaus_set_mmc_slot(1, 1, 0, 1);
437 if (r < 0)
438 return r;
439 r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
440 if (r < 0)
441 return r;
442
443 r = menelaus_get_slot_pin_states();
444 if (r < 0)
445 return r;
446
447 if (machine_is_nokia_n800()) {
448 bit = 1 << 1;
449 openp = &slot2_cover_open;
450 } else {
451 bit = 1;
452 openp = &slot1_cover_open;
453 slot2_cover_open = 0;
454 }
455
456 /* All slot pin bits seem to be inversed until first switch change */
457 if (r == 0xf || r == (0xf & ~bit))
458 r = ~r;
459
460 if (r & bit)
461 *openp = 1;
462 else
463 *openp = 0;
464
465 r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
466
467 return r;
468}
469
470static void n8x0_mmc_shutdown(struct device *dev)
471{
472 int vs2sel;
473
474 if (machine_is_nokia_n800())
475 vs2sel = 0;
476 else
477 vs2sel = 2;
478
479 menelaus_set_mmc_slot(1, 0, 0, 0);
480 menelaus_set_mmc_slot(2, 0, vs2sel, 0);
481}
482
483static void n8x0_mmc_cleanup(struct device *dev)
484{
485 menelaus_unregister_mmc_callback();
486
487 gpio_free(N8X0_SLOT_SWITCH_GPIO);
488
489 if (machine_is_nokia_n810()) {
490 gpio_free(N810_EMMC_VSD_GPIO);
1dea5c6b 491 gpio_free(N810_EMMC_VIO_GPIO);
9418c65f
TL
492 }
493}
494
495/*
496 * MMC controller1 has two slots that are multiplexed via I2C.
497 * MMC controller2 is not in use.
498 */
499static struct omap_mmc_platform_data mmc1_data = {
500 .nr_slots = 2,
501 .switch_slot = n8x0_mmc_switch_slot,
502 .init = n8x0_mmc_late_init,
503 .cleanup = n8x0_mmc_cleanup,
504 .shutdown = n8x0_mmc_shutdown,
505 .max_freq = 24000000,
9418c65f
TL
506 .slots[0] = {
507 .wires = 4,
508 .set_power = n8x0_mmc_set_power,
509 .set_bus_mode = n8x0_mmc_set_bus_mode,
510 .get_cover_state = n8x0_mmc_get_cover_state,
511 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
512 MMC_VDD_32_33 | MMC_VDD_33_34,
513 .name = "internal",
514 },
515 .slots[1] = {
516 .set_power = n8x0_mmc_set_power,
517 .set_bus_mode = n8x0_mmc_set_bus_mode,
518 .get_cover_state = n8x0_mmc_get_cover_state,
519 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 |
520 MMC_VDD_21_22 | MMC_VDD_22_23 |
521 MMC_VDD_23_24 | MMC_VDD_24_25 |
522 MMC_VDD_27_28 | MMC_VDD_28_29 |
523 MMC_VDD_29_30 | MMC_VDD_30_31 |
524 MMC_VDD_32_33 | MMC_VDD_33_34,
525 .name = "external",
526 },
527};
528
529static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
530
bc593f5d
IG
531static struct gpio n810_emmc_gpios[] __initdata = {
532 { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" },
533 { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" },
534};
9418c65f 535
bc593f5d 536static void __init n8x0_mmc_init(void)
9418c65f
TL
537{
538 int err;
539
540 if (machine_is_nokia_n810()) {
541 mmc1_data.slots[0].name = "external";
542
543 /*
544 * Some Samsung Movinand chips do not like open-ended
545 * multi-block reads and fall to braind-dead state
546 * while doing so. Reducing the number of blocks in
547 * the transfer or delays in clock disable do not help
548 */
549 mmc1_data.slots[1].name = "internal";
550 mmc1_data.slots[1].ban_openended = 1;
551 }
552
bc593f5d
IG
553 err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
554 "MMC slot switch");
9418c65f 555 if (err)
1dea5c6b 556 return;
9418c65f 557
9418c65f 558 if (machine_is_nokia_n810()) {
bc593f5d
IG
559 err = gpio_request_array(n810_emmc_gpios,
560 ARRAY_SIZE(n810_emmc_gpios));
9418c65f
TL
561 if (err) {
562 gpio_free(N8X0_SLOT_SWITCH_GPIO);
1dea5c6b 563 return;
9418c65f 564 }
9418c65f
TL
565 }
566
567 mmc_data[0] = &mmc1_data;
e08016d0 568 omap242x_init_mmc(mmc_data);
9418c65f
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569}
570#else
571
572void __init n8x0_mmc_init(void)
573{
574}
9418c65f
TL
575#endif /* CONFIG_MMC_OMAP */
576
577#ifdef CONFIG_MENELAUS
578
579static int n8x0_auto_sleep_regulators(void)
580{
581 u32 val;
582 int ret;
583
584 val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \
585 | EN_VAUX_SLEEP | EN_VIO_SLEEP \
586 | EN_VMEM_SLEEP | EN_DC3_SLEEP \
587 | EN_VC_SLEEP | EN_DC2_SLEEP;
588
589 ret = menelaus_set_regulator_sleep(1, val);
590 if (ret < 0) {
7852ec05
PW
591 pr_err("Could not set regulators to sleep on menelaus: %u\n",
592 ret);
9418c65f
TL
593 return ret;
594 }
595 return 0;
596}
597
598static int n8x0_auto_voltage_scale(void)
599{
600 int ret;
601
602 ret = menelaus_set_vcore_hw(1400, 1050);
603 if (ret < 0) {
7852ec05 604 pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
9418c65f
TL
605 return ret;
606 }
607 return 0;
608}
609
610static int n8x0_menelaus_late_init(struct device *dev)
611{
612 int ret;
613
614 ret = n8x0_auto_voltage_scale();
615 if (ret < 0)
616 return ret;
617 ret = n8x0_auto_sleep_regulators();
618 if (ret < 0)
619 return ret;
620 return 0;
621}
622
a7f97d25
JN
623#else
624static int n8x0_menelaus_late_init(struct device *dev)
625{
626 return 0;
627}
628#endif
629
630static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
631 .late_init = n8x0_menelaus_late_init,
632};
633
634static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = {
9418c65f
TL
635 {
636 I2C_BOARD_INFO("menelaus", 0x72),
7d7e1eba 637 .irq = 7 + OMAP_INTC_START,
a7f97d25 638 .platform_data = &n8x0_menelaus_platform_data,
9418c65f
TL
639 },
640};
641
366498d4
JN
642static struct aic3x_pdata n810_aic33_data __initdata = {
643 .gpio_reset = 118,
9418c65f
TL
644};
645
366498d4
JN
646static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
647 {
648 I2C_BOARD_INFO("tlv320aic3x", 0x18),
649 .platform_data = &n810_aic33_data,
650 },
651};
9418c65f 652
bd8f0fc9
TL
653#ifdef CONFIG_OMAP_MUX
654static struct omap_board_mux board_mux[] __initdata = {
04be1e9b
JN
655 /* I2S codec port pins for McBSP block */
656 OMAP2420_MUX(EAC_AC_SCLK, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
657 OMAP2420_MUX(EAC_AC_FS, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
658 OMAP2420_MUX(EAC_AC_DIN, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
659 OMAP2420_MUX(EAC_AC_DOUT, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
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660 { .reg_offset = OMAP_MUX_TERMINATOR },
661};
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662
663static struct omap_device_pad serial2_pads[] __initdata = {
664 {
665 .name = "uart3_rx_irrx.uart3_rx_irrx",
666 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
667 .enable = OMAP_MUX_MODE0,
668 .idle = OMAP_MUX_MODE3 /* Mux as GPIO for idle */
669 },
670};
671
672static inline void board_serial_init(void)
673{
674 struct omap_board_data bdata;
675
676 bdata.flags = 0;
677 bdata.pads = NULL;
678 bdata.pads_cnt = 0;
679
680 bdata.id = 0;
c86845db 681 omap_serial_init_port(&bdata, NULL);
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682
683 bdata.id = 1;
c86845db 684 omap_serial_init_port(&bdata, NULL);
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685
686 bdata.id = 2;
687 bdata.pads = serial2_pads;
688 bdata.pads_cnt = ARRAY_SIZE(serial2_pads);
c86845db 689 omap_serial_init_port(&bdata, NULL);
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690}
691
692#else
693
694static inline void board_serial_init(void)
695{
696 omap_serial_init();
697}
698
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699#endif
700
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701static void __init n8x0_init_machine(void)
702{
bd8f0fc9 703 omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
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704 /* FIXME: add n810 spi devices */
705 spi_register_board_info(n800_spi_board_info,
706 ARRAY_SIZE(n800_spi_board_info));
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707 omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
708 ARRAY_SIZE(n8x0_i2c_board_info_1));
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709 omap_register_i2c_bus(2, 400, NULL, 0);
710 if (machine_is_nokia_n810())
711 i2c_register_board_info(2, n810_i2c_board_info_2,
712 ARRAY_SIZE(n810_i2c_board_info_2));
0b50c691 713 board_serial_init();
a4ca9dbe 714 omap_sdrc_init(NULL, NULL);
a1a92e6f 715 gpmc_onenand_init(board_onenand_data);
9418c65f 716 n8x0_mmc_init();
97b9ad16 717 n8x0_usb_init();
0857ba3c 718 n8x0_cbus_init();
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719}
720
721MACHINE_START(NOKIA_N800, "Nokia N800")
5e52b435 722 .atag_offset = 0x100,
71ee7dad 723 .reserve = omap_reserve,
e990a406 724 .map_io = omap242x_map_io,
8f5b5a41 725 .init_early = omap2420_init_early,
741e3a89 726 .init_irq = omap2_init_irq,
6b2f55d7 727 .handle_irq = omap2_intc_handle_irq,
63138812 728 .init_machine = n8x0_init_machine,
bbd707ac 729 .init_late = omap2420_init_late,
6bb27d73 730 .init_time = omap2_sync32k_timer_init,
187e3e06 731 .restart = omap2xxx_restart,
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732MACHINE_END
733
734MACHINE_START(NOKIA_N810, "Nokia N810")
5e52b435 735 .atag_offset = 0x100,
71ee7dad 736 .reserve = omap_reserve,
e990a406 737 .map_io = omap242x_map_io,
8f5b5a41 738 .init_early = omap2420_init_early,
741e3a89 739 .init_irq = omap2_init_irq,
6b2f55d7 740 .handle_irq = omap2_intc_handle_irq,
63138812 741 .init_machine = n8x0_init_machine,
bbd707ac 742 .init_late = omap2420_init_late,
6bb27d73 743 .init_time = omap2_sync32k_timer_init,
187e3e06 744 .restart = omap2xxx_restart,
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745MACHINE_END
746
747MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
5e52b435 748 .atag_offset = 0x100,
71ee7dad 749 .reserve = omap_reserve,
e990a406 750 .map_io = omap242x_map_io,
8f5b5a41 751 .init_early = omap2420_init_early,
741e3a89 752 .init_irq = omap2_init_irq,
6b2f55d7 753 .handle_irq = omap2_intc_handle_irq,
63138812 754 .init_machine = n8x0_init_machine,
bbd707ac 755 .init_late = omap2420_init_late,
6bb27d73 756 .init_time = omap2_sync32k_timer_init,
187e3e06 757 .restart = omap2xxx_restart,
63138812 758MACHINE_END
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