Merge branches 'cxgb4' and 'mlx5' into k.o/for-4.8
[deliverable/linux.git] / arch / arm / mach-omap2 / board-n8x0.c
CommitLineData
63138812
KV
1/*
2 * linux/arch/arm/mach-omap2/board-n8x0.c
3 *
4 * Copyright (C) 2005-2009 Nokia Corporation
5 * Author: Juha Yrjola <juha.yrjola@nokia.com>
6 *
7 * Modified from mach-omap2/board-generic.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/init.h>
18#include <linux/io.h>
0857ba3c 19#include <linux/irq.h>
63138812 20#include <linux/stddef.h>
9418c65f 21#include <linux/i2c.h>
63138812
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22#include <linux/spi/spi.h>
23#include <linux/usb/musb.h>
826c71a0 24#include <linux/mmc/host.h>
2203747c 25#include <linux/platform_data/spi-omap2-mcspi.h>
826c71a0 26#include <linux/platform_data/mmc-omap.h>
7bd3b618 27#include <linux/mfd/menelaus.h>
366498d4 28#include <sound/tlv320aic3x.h>
63138812
KV
29
30#include <asm/mach/arch.h>
31#include <asm/mach-types.h>
32
4e65331c 33#include "common.h"
68f39e74 34#include "mmc.h"
810ac2a1 35#include "soc.h"
e92ce89c 36#include "common-board-devices.h"
bd8f0fc9 37
97b9ad16
FA
38#define TUSB6010_ASYNC_CS 1
39#define TUSB6010_SYNC_CS 4
40#define TUSB6010_GPIO_INT 58
41#define TUSB6010_GPIO_ENABLE 0
42#define TUSB6010_DMACHAN 0x3f
43
c8f27e97
TL
44#define NOKIA_N810_WIMAX (1 << 2)
45#define NOKIA_N810 (1 << 1)
46#define NOKIA_N800 (1 << 0)
47
48static u32 board_caps;
49
50#define board_is_n800() (board_caps & NOKIA_N800)
51#define board_is_n810() (board_caps & NOKIA_N810)
52#define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX)
53
54static void board_check_revision(void)
55{
56 if (of_have_populated_dt()) {
57 if (of_machine_is_compatible("nokia,n800"))
58 board_caps = NOKIA_N800;
59 else if (of_machine_is_compatible("nokia,n810"))
60 board_caps = NOKIA_N810;
61 else if (of_machine_is_compatible("nokia,n810-wimax"))
62 board_caps = NOKIA_N810_WIMAX;
c8f27e97
TL
63 }
64
65 if (!board_caps)
66 pr_err("Unknown board\n");
67}
68
9a35f876 69#if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
97b9ad16
FA
70/*
71 * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
72 * 1.5 V voltage regulators of PM companion chip. Companion chip will then
73 * provide then PGOOD signal to TUSB6010 which will release it from reset.
74 */
75static int tusb_set_power(int state)
76{
77 int i, retval = 0;
78
79 if (state) {
80 gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
81 msleep(1);
82
83 /* Wait until TUSB6010 pulls INT pin down */
84 i = 100;
85 while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
86 msleep(1);
87 i--;
88 }
89
90 if (!i) {
91 printk(KERN_ERR "tusb: powerup failed\n");
92 retval = -ENODEV;
93 }
94 } else {
95 gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
96 msleep(10);
97 }
98
99 return retval;
100}
101
102static struct musb_hdrc_config musb_config = {
103 .multipoint = 1,
104 .dyn_fifo = 1,
105 .num_eps = 16,
106 .ram_bits = 12,
107};
108
109static struct musb_hdrc_platform_data tusb_data = {
97b9ad16 110 .mode = MUSB_OTG,
97b9ad16
FA
111 .set_power = tusb_set_power,
112 .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
113 .power = 100, /* Max 100 mA VBUS for host mode */
114 .config = &musb_config,
115};
116
117static void __init n8x0_usb_init(void)
118{
119 int ret = 0;
120 static char announce[] __initdata = KERN_INFO "TUSB 6010\n";
121
122 /* PM companion chip power control pin */
bc593f5d
IG
123 ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
124 "TUSB6010 enable");
97b9ad16
FA
125 if (ret != 0) {
126 printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
127 TUSB6010_GPIO_ENABLE);
128 return;
129 }
97b9ad16
FA
130 tusb_set_power(0);
131
132 ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
133 TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
134 TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
135 if (ret != 0)
136 goto err;
137
138 printk(announce);
139
140 return;
141
142err:
143 gpio_free(TUSB6010_GPIO_ENABLE);
144}
145#else
146
147static void __init n8x0_usb_init(void) {}
148
7c925546 149#endif /*CONFIG_USB_MUSB_TUSB6010 */
97b9ad16
FA
150
151
63138812
KV
152static struct omap2_mcspi_device_config p54spi_mcspi_config = {
153 .turbo_mode = 0,
63138812
KV
154};
155
156static struct spi_board_info n800_spi_board_info[] __initdata = {
157 {
158 .modalias = "p54spi",
159 .bus_num = 2,
160 .chip_select = 0,
161 .max_speed_hz = 48000000,
162 .controller_data = &p54spi_mcspi_config,
163 },
164};
165
9418c65f
TL
166#if defined(CONFIG_MENELAUS) && \
167 (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE))
168
169/*
170 * On both N800 and N810, only the first of the two MMC controllers is in use.
171 * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
172 * On N800, both slots are powered via Menelaus. On N810, only one of the
173 * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
174 *
175 * VMMC slot 1 on both N800 and N810
176 * VDCDC3_APE and VMCS2_APE slot 2 on N800
177 * GPIO23 and GPIO9 slot 2 EMMC on N810
178 *
179 */
180#define N8X0_SLOT_SWITCH_GPIO 96
181#define N810_EMMC_VSD_GPIO 23
1dea5c6b 182#define N810_EMMC_VIO_GPIO 9
9418c65f 183
49b87c6d
TL
184static int slot1_cover_open;
185static int slot2_cover_open;
186static struct device *mmc_device;
187
9418c65f
TL
188static int n8x0_mmc_switch_slot(struct device *dev, int slot)
189{
190#ifdef CONFIG_MMC_DEBUG
191 dev_dbg(dev, "Choose slot %d\n", slot + 1);
192#endif
193 gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
194 return 0;
195}
196
197static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
198 int power_on, int vdd)
199{
200 int mV;
201
202#ifdef CONFIG_MMC_DEBUG
203 dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
204 power_on ? "on" : "off", vdd);
205#endif
206 if (slot == 0) {
207 if (!power_on)
208 return menelaus_set_vmmc(0);
209 switch (1 << vdd) {
210 case MMC_VDD_33_34:
211 case MMC_VDD_32_33:
212 case MMC_VDD_31_32:
213 mV = 3100;
214 break;
215 case MMC_VDD_30_31:
216 mV = 3000;
217 break;
218 case MMC_VDD_28_29:
219 mV = 2800;
220 break;
221 case MMC_VDD_165_195:
222 mV = 1850;
223 break;
224 default:
225 BUG();
226 }
227 return menelaus_set_vmmc(mV);
228 } else {
229 if (!power_on)
230 return menelaus_set_vdcdc(3, 0);
231 switch (1 << vdd) {
232 case MMC_VDD_33_34:
233 case MMC_VDD_32_33:
234 mV = 3300;
235 break;
236 case MMC_VDD_30_31:
237 case MMC_VDD_29_30:
238 mV = 3000;
239 break;
240 case MMC_VDD_28_29:
241 case MMC_VDD_27_28:
242 mV = 2800;
243 break;
244 case MMC_VDD_24_25:
245 case MMC_VDD_23_24:
246 mV = 2400;
247 break;
248 case MMC_VDD_22_23:
249 case MMC_VDD_21_22:
250 mV = 2200;
251 break;
252 case MMC_VDD_20_21:
253 mV = 2000;
254 break;
255 case MMC_VDD_165_195:
256 mV = 1800;
257 break;
258 default:
259 BUG();
260 }
261 return menelaus_set_vdcdc(3, mV);
262 }
263 return 0;
264}
265
266static void n810_set_power_emmc(struct device *dev,
267 int power_on)
268{
269 dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
270
271 if (power_on) {
272 gpio_set_value(N810_EMMC_VSD_GPIO, 1);
273 msleep(1);
1dea5c6b 274 gpio_set_value(N810_EMMC_VIO_GPIO, 1);
9418c65f
TL
275 msleep(1);
276 } else {
1dea5c6b 277 gpio_set_value(N810_EMMC_VIO_GPIO, 0);
9418c65f
TL
278 msleep(50);
279 gpio_set_value(N810_EMMC_VSD_GPIO, 0);
280 msleep(50);
281 }
282}
283
284static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
285 int vdd)
286{
c8f27e97 287 if (board_is_n800() || slot == 0)
9418c65f
TL
288 return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
289
290 n810_set_power_emmc(dev, power_on);
291
292 return 0;
293}
294
295static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
296{
297 int r;
298
299 dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
300 bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
301 BUG_ON(slot != 0 && slot != 1);
302 slot++;
303 switch (bus_mode) {
304 case MMC_BUSMODE_OPENDRAIN:
305 r = menelaus_set_mmc_opendrain(slot, 1);
306 break;
307 case MMC_BUSMODE_PUSHPULL:
308 r = menelaus_set_mmc_opendrain(slot, 0);
309 break;
310 default:
311 BUG();
312 }
313 if (r != 0 && printk_ratelimit())
314 dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
315 slot);
316 return r;
317}
318
319static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
320{
321 slot++;
322 BUG_ON(slot != 1 && slot != 2);
323 if (slot == 1)
324 return slot1_cover_open;
325 else
326 return slot2_cover_open;
327}
328
329static void n8x0_mmc_callback(void *data, u8 card_mask)
330{
331 int bit, *openp, index;
332
c8f27e97 333 if (board_is_n800()) {
9418c65f
TL
334 bit = 1 << 1;
335 openp = &slot2_cover_open;
336 index = 1;
337 } else {
338 bit = 1;
339 openp = &slot1_cover_open;
340 index = 0;
341 }
342
343 if (card_mask & bit)
344 *openp = 1;
345 else
346 *openp = 0;
347
d5171102 348#ifdef CONFIG_MMC_OMAP
9418c65f 349 omap_mmc_notify_cover_event(mmc_device, index, *openp);
d5171102
TL
350#else
351 pr_warn("MMC: notify cover event not available\n");
352#endif
9418c65f
TL
353}
354
9418c65f
TL
355static int n8x0_mmc_late_init(struct device *dev)
356{
357 int r, bit, *openp;
358 int vs2sel;
359
360 mmc_device = dev;
361
362 r = menelaus_set_slot_sel(1);
363 if (r < 0)
364 return r;
365
c8f27e97 366 if (board_is_n800())
9418c65f
TL
367 vs2sel = 0;
368 else
369 vs2sel = 2;
370
371 r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
372 if (r < 0)
373 return r;
374
375 n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
376 n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
377
378 r = menelaus_set_mmc_slot(1, 1, 0, 1);
379 if (r < 0)
380 return r;
381 r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
382 if (r < 0)
383 return r;
384
385 r = menelaus_get_slot_pin_states();
386 if (r < 0)
387 return r;
388
c8f27e97 389 if (board_is_n800()) {
9418c65f
TL
390 bit = 1 << 1;
391 openp = &slot2_cover_open;
392 } else {
393 bit = 1;
394 openp = &slot1_cover_open;
395 slot2_cover_open = 0;
396 }
397
398 /* All slot pin bits seem to be inversed until first switch change */
399 if (r == 0xf || r == (0xf & ~bit))
400 r = ~r;
401
402 if (r & bit)
403 *openp = 1;
404 else
405 *openp = 0;
406
407 r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
408
409 return r;
410}
411
412static void n8x0_mmc_shutdown(struct device *dev)
413{
414 int vs2sel;
415
c8f27e97 416 if (board_is_n800())
9418c65f
TL
417 vs2sel = 0;
418 else
419 vs2sel = 2;
420
421 menelaus_set_mmc_slot(1, 0, 0, 0);
422 menelaus_set_mmc_slot(2, 0, vs2sel, 0);
423}
424
425static void n8x0_mmc_cleanup(struct device *dev)
426{
427 menelaus_unregister_mmc_callback();
428
429 gpio_free(N8X0_SLOT_SWITCH_GPIO);
430
c8f27e97 431 if (board_is_n810()) {
9418c65f 432 gpio_free(N810_EMMC_VSD_GPIO);
1dea5c6b 433 gpio_free(N810_EMMC_VIO_GPIO);
9418c65f
TL
434 }
435}
436
437/*
438 * MMC controller1 has two slots that are multiplexed via I2C.
439 * MMC controller2 is not in use.
440 */
441static struct omap_mmc_platform_data mmc1_data = {
fa590c92 442 .nr_slots = 0,
9418c65f
TL
443 .switch_slot = n8x0_mmc_switch_slot,
444 .init = n8x0_mmc_late_init,
445 .cleanup = n8x0_mmc_cleanup,
446 .shutdown = n8x0_mmc_shutdown,
447 .max_freq = 24000000,
9418c65f
TL
448 .slots[0] = {
449 .wires = 4,
450 .set_power = n8x0_mmc_set_power,
451 .set_bus_mode = n8x0_mmc_set_bus_mode,
452 .get_cover_state = n8x0_mmc_get_cover_state,
453 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
454 MMC_VDD_32_33 | MMC_VDD_33_34,
455 .name = "internal",
456 },
457 .slots[1] = {
458 .set_power = n8x0_mmc_set_power,
459 .set_bus_mode = n8x0_mmc_set_bus_mode,
460 .get_cover_state = n8x0_mmc_get_cover_state,
461 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 |
462 MMC_VDD_21_22 | MMC_VDD_22_23 |
463 MMC_VDD_23_24 | MMC_VDD_24_25 |
464 MMC_VDD_27_28 | MMC_VDD_28_29 |
465 MMC_VDD_29_30 | MMC_VDD_30_31 |
466 MMC_VDD_32_33 | MMC_VDD_33_34,
467 .name = "external",
468 },
469};
470
471static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
472
bc593f5d
IG
473static struct gpio n810_emmc_gpios[] __initdata = {
474 { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" },
475 { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" },
476};
9418c65f 477
bc593f5d 478static void __init n8x0_mmc_init(void)
9418c65f
TL
479{
480 int err;
481
c8f27e97 482 if (board_is_n810()) {
9418c65f
TL
483 mmc1_data.slots[0].name = "external";
484
485 /*
486 * Some Samsung Movinand chips do not like open-ended
487 * multi-block reads and fall to braind-dead state
488 * while doing so. Reducing the number of blocks in
489 * the transfer or delays in clock disable do not help
490 */
491 mmc1_data.slots[1].name = "internal";
492 mmc1_data.slots[1].ban_openended = 1;
493 }
494
bc593f5d
IG
495 err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
496 "MMC slot switch");
9418c65f 497 if (err)
1dea5c6b 498 return;
9418c65f 499
c8f27e97 500 if (board_is_n810()) {
bc593f5d
IG
501 err = gpio_request_array(n810_emmc_gpios,
502 ARRAY_SIZE(n810_emmc_gpios));
9418c65f
TL
503 if (err) {
504 gpio_free(N8X0_SLOT_SWITCH_GPIO);
1dea5c6b 505 return;
9418c65f 506 }
9418c65f
TL
507 }
508
fa590c92 509 mmc1_data.nr_slots = 2;
9418c65f 510 mmc_data[0] = &mmc1_data;
9418c65f
TL
511}
512#else
fa590c92 513static struct omap_mmc_platform_data mmc1_data;
9418c65f
TL
514void __init n8x0_mmc_init(void)
515{
516}
9418c65f
TL
517#endif /* CONFIG_MMC_OMAP */
518
519#ifdef CONFIG_MENELAUS
520
521static int n8x0_auto_sleep_regulators(void)
522{
523 u32 val;
524 int ret;
525
526 val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \
527 | EN_VAUX_SLEEP | EN_VIO_SLEEP \
528 | EN_VMEM_SLEEP | EN_DC3_SLEEP \
529 | EN_VC_SLEEP | EN_DC2_SLEEP;
530
531 ret = menelaus_set_regulator_sleep(1, val);
532 if (ret < 0) {
7852ec05
PW
533 pr_err("Could not set regulators to sleep on menelaus: %u\n",
534 ret);
9418c65f
TL
535 return ret;
536 }
537 return 0;
538}
539
540static int n8x0_auto_voltage_scale(void)
541{
542 int ret;
543
544 ret = menelaus_set_vcore_hw(1400, 1050);
545 if (ret < 0) {
7852ec05 546 pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
9418c65f
TL
547 return ret;
548 }
549 return 0;
550}
551
552static int n8x0_menelaus_late_init(struct device *dev)
553{
554 int ret;
555
556 ret = n8x0_auto_voltage_scale();
557 if (ret < 0)
558 return ret;
559 ret = n8x0_auto_sleep_regulators();
560 if (ret < 0)
561 return ret;
562 return 0;
563}
564
a7f97d25
JN
565#else
566static int n8x0_menelaus_late_init(struct device *dev)
567{
568 return 0;
569}
570#endif
571
e92ce89c 572struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
a7f97d25
JN
573 .late_init = n8x0_menelaus_late_init,
574};
575
e92ce89c 576struct aic3x_pdata n810_aic33_data __initdata = {
366498d4 577 .gpio_reset = 118,
9418c65f
TL
578};
579
810ac2a1
TL
580static int __init n8x0_late_initcall(void)
581{
582 if (!board_caps)
583 return -ENODEV;
584
810ac2a1
TL
585 n8x0_mmc_init();
586 n8x0_usb_init();
810ac2a1
TL
587
588 return 0;
589}
590omap_late_initcall(n8x0_late_initcall);
591
fa590c92
TL
592/*
593 * Legacy init pdata init for n8x0. Note that we want to follow the
594 * I2C bus numbering starting at 0 for device tree like other omaps.
595 */
596void * __init n8x0_legacy_init(void)
597{
598 board_check_revision();
599 spi_register_board_info(n800_spi_board_info,
600 ARRAY_SIZE(n800_spi_board_info));
fa590c92
TL
601 return &mmc1_data;
602}
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