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63138812 KV |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-n8x0.c | |
3 | * | |
4 | * Copyright (C) 2005-2009 Nokia Corporation | |
5 | * Author: Juha Yrjola <juha.yrjola@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap2/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/gpio.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/io.h> | |
19 | #include <linux/stddef.h> | |
9418c65f | 20 | #include <linux/i2c.h> |
63138812 KV |
21 | #include <linux/spi/spi.h> |
22 | #include <linux/usb/musb.h> | |
366498d4 | 23 | #include <sound/tlv320aic3x.h> |
63138812 KV |
24 | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach-types.h> | |
27 | ||
ce491cf8 TL |
28 | #include <plat/board.h> |
29 | #include <plat/common.h> | |
9418c65f | 30 | #include <plat/menelaus.h> |
63138812 | 31 | #include <mach/irqs.h> |
ce491cf8 TL |
32 | #include <plat/mcspi.h> |
33 | #include <plat/onenand.h> | |
9418c65f | 34 | #include <plat/mmc.h> |
ce491cf8 | 35 | #include <plat/serial.h> |
63138812 | 36 | |
bd8f0fc9 TL |
37 | #include "mux.h" |
38 | ||
9418c65f TL |
39 | static int slot1_cover_open; |
40 | static int slot2_cover_open; | |
41 | static struct device *mmc_device; | |
42 | ||
97b9ad16 FA |
43 | #define TUSB6010_ASYNC_CS 1 |
44 | #define TUSB6010_SYNC_CS 4 | |
45 | #define TUSB6010_GPIO_INT 58 | |
46 | #define TUSB6010_GPIO_ENABLE 0 | |
47 | #define TUSB6010_DMACHAN 0x3f | |
48 | ||
49 | #if defined(CONFIG_USB_TUSB6010) || \ | |
50 | defined(CONFIG_USB_TUSB6010_MODULE) | |
51 | /* | |
52 | * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and | |
53 | * 1.5 V voltage regulators of PM companion chip. Companion chip will then | |
54 | * provide then PGOOD signal to TUSB6010 which will release it from reset. | |
55 | */ | |
56 | static int tusb_set_power(int state) | |
57 | { | |
58 | int i, retval = 0; | |
59 | ||
60 | if (state) { | |
61 | gpio_set_value(TUSB6010_GPIO_ENABLE, 1); | |
62 | msleep(1); | |
63 | ||
64 | /* Wait until TUSB6010 pulls INT pin down */ | |
65 | i = 100; | |
66 | while (i && gpio_get_value(TUSB6010_GPIO_INT)) { | |
67 | msleep(1); | |
68 | i--; | |
69 | } | |
70 | ||
71 | if (!i) { | |
72 | printk(KERN_ERR "tusb: powerup failed\n"); | |
73 | retval = -ENODEV; | |
74 | } | |
75 | } else { | |
76 | gpio_set_value(TUSB6010_GPIO_ENABLE, 0); | |
77 | msleep(10); | |
78 | } | |
79 | ||
80 | return retval; | |
81 | } | |
82 | ||
83 | static struct musb_hdrc_config musb_config = { | |
84 | .multipoint = 1, | |
85 | .dyn_fifo = 1, | |
86 | .num_eps = 16, | |
87 | .ram_bits = 12, | |
88 | }; | |
89 | ||
90 | static struct musb_hdrc_platform_data tusb_data = { | |
91 | #if defined(CONFIG_USB_MUSB_OTG) | |
92 | .mode = MUSB_OTG, | |
93 | #elif defined(CONFIG_USB_MUSB_PERIPHERAL) | |
94 | .mode = MUSB_PERIPHERAL, | |
95 | #else /* defined(CONFIG_USB_MUSB_HOST) */ | |
96 | .mode = MUSB_HOST, | |
97 | #endif | |
98 | .set_power = tusb_set_power, | |
99 | .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */ | |
100 | .power = 100, /* Max 100 mA VBUS for host mode */ | |
101 | .config = &musb_config, | |
102 | }; | |
103 | ||
104 | static void __init n8x0_usb_init(void) | |
105 | { | |
106 | int ret = 0; | |
107 | static char announce[] __initdata = KERN_INFO "TUSB 6010\n"; | |
108 | ||
109 | /* PM companion chip power control pin */ | |
110 | ret = gpio_request(TUSB6010_GPIO_ENABLE, "TUSB6010 enable"); | |
111 | if (ret != 0) { | |
112 | printk(KERN_ERR "Could not get TUSB power GPIO%i\n", | |
113 | TUSB6010_GPIO_ENABLE); | |
114 | return; | |
115 | } | |
116 | gpio_direction_output(TUSB6010_GPIO_ENABLE, 0); | |
117 | ||
118 | tusb_set_power(0); | |
119 | ||
120 | ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, | |
121 | TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, | |
122 | TUSB6010_GPIO_INT, TUSB6010_DMACHAN); | |
123 | if (ret != 0) | |
124 | goto err; | |
125 | ||
126 | printk(announce); | |
127 | ||
128 | return; | |
129 | ||
130 | err: | |
131 | gpio_free(TUSB6010_GPIO_ENABLE); | |
132 | } | |
133 | #else | |
134 | ||
135 | static void __init n8x0_usb_init(void) {} | |
136 | ||
137 | #endif /*CONFIG_USB_TUSB6010 */ | |
138 | ||
139 | ||
63138812 KV |
140 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { |
141 | .turbo_mode = 0, | |
142 | .single_channel = 1, | |
143 | }; | |
144 | ||
145 | static struct spi_board_info n800_spi_board_info[] __initdata = { | |
146 | { | |
147 | .modalias = "p54spi", | |
148 | .bus_num = 2, | |
149 | .chip_select = 0, | |
150 | .max_speed_hz = 48000000, | |
151 | .controller_data = &p54spi_mcspi_config, | |
152 | }, | |
153 | }; | |
154 | ||
155 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ | |
156 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
157 | ||
158 | static struct mtd_partition onenand_partitions[] = { | |
159 | { | |
160 | .name = "bootloader", | |
161 | .offset = 0, | |
162 | .size = 0x20000, | |
163 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
164 | }, | |
165 | { | |
166 | .name = "config", | |
167 | .offset = MTDPART_OFS_APPEND, | |
168 | .size = 0x60000, | |
169 | }, | |
170 | { | |
171 | .name = "kernel", | |
172 | .offset = MTDPART_OFS_APPEND, | |
173 | .size = 0x200000, | |
174 | }, | |
175 | { | |
176 | .name = "initfs", | |
177 | .offset = MTDPART_OFS_APPEND, | |
178 | .size = 0x400000, | |
179 | }, | |
180 | { | |
181 | .name = "rootfs", | |
182 | .offset = MTDPART_OFS_APPEND, | |
183 | .size = MTDPART_SIZ_FULL, | |
184 | }, | |
185 | }; | |
186 | ||
187 | static struct omap_onenand_platform_data board_onenand_data = { | |
188 | .cs = 0, | |
189 | .gpio_irq = 26, | |
190 | .parts = onenand_partitions, | |
191 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
192 | .flags = ONENAND_SYNC_READ, | |
193 | }; | |
194 | ||
195 | static void __init n8x0_onenand_init(void) | |
196 | { | |
197 | gpmc_onenand_init(&board_onenand_data); | |
198 | } | |
199 | ||
200 | #else | |
201 | ||
202 | static void __init n8x0_onenand_init(void) {} | |
203 | ||
204 | #endif | |
205 | ||
9418c65f TL |
206 | #if defined(CONFIG_MENELAUS) && \ |
207 | (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)) | |
208 | ||
209 | /* | |
210 | * On both N800 and N810, only the first of the two MMC controllers is in use. | |
211 | * The two MMC slots are multiplexed via Menelaus companion chip over I2C. | |
212 | * On N800, both slots are powered via Menelaus. On N810, only one of the | |
213 | * slots is powered via Menelaus. The N810 EMMC is powered via GPIO. | |
214 | * | |
215 | * VMMC slot 1 on both N800 and N810 | |
216 | * VDCDC3_APE and VMCS2_APE slot 2 on N800 | |
217 | * GPIO23 and GPIO9 slot 2 EMMC on N810 | |
218 | * | |
219 | */ | |
220 | #define N8X0_SLOT_SWITCH_GPIO 96 | |
221 | #define N810_EMMC_VSD_GPIO 23 | |
1dea5c6b | 222 | #define N810_EMMC_VIO_GPIO 9 |
9418c65f TL |
223 | |
224 | static int n8x0_mmc_switch_slot(struct device *dev, int slot) | |
225 | { | |
226 | #ifdef CONFIG_MMC_DEBUG | |
227 | dev_dbg(dev, "Choose slot %d\n", slot + 1); | |
228 | #endif | |
229 | gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); | |
230 | return 0; | |
231 | } | |
232 | ||
233 | static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, | |
234 | int power_on, int vdd) | |
235 | { | |
236 | int mV; | |
237 | ||
238 | #ifdef CONFIG_MMC_DEBUG | |
239 | dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, | |
240 | power_on ? "on" : "off", vdd); | |
241 | #endif | |
242 | if (slot == 0) { | |
243 | if (!power_on) | |
244 | return menelaus_set_vmmc(0); | |
245 | switch (1 << vdd) { | |
246 | case MMC_VDD_33_34: | |
247 | case MMC_VDD_32_33: | |
248 | case MMC_VDD_31_32: | |
249 | mV = 3100; | |
250 | break; | |
251 | case MMC_VDD_30_31: | |
252 | mV = 3000; | |
253 | break; | |
254 | case MMC_VDD_28_29: | |
255 | mV = 2800; | |
256 | break; | |
257 | case MMC_VDD_165_195: | |
258 | mV = 1850; | |
259 | break; | |
260 | default: | |
261 | BUG(); | |
262 | } | |
263 | return menelaus_set_vmmc(mV); | |
264 | } else { | |
265 | if (!power_on) | |
266 | return menelaus_set_vdcdc(3, 0); | |
267 | switch (1 << vdd) { | |
268 | case MMC_VDD_33_34: | |
269 | case MMC_VDD_32_33: | |
270 | mV = 3300; | |
271 | break; | |
272 | case MMC_VDD_30_31: | |
273 | case MMC_VDD_29_30: | |
274 | mV = 3000; | |
275 | break; | |
276 | case MMC_VDD_28_29: | |
277 | case MMC_VDD_27_28: | |
278 | mV = 2800; | |
279 | break; | |
280 | case MMC_VDD_24_25: | |
281 | case MMC_VDD_23_24: | |
282 | mV = 2400; | |
283 | break; | |
284 | case MMC_VDD_22_23: | |
285 | case MMC_VDD_21_22: | |
286 | mV = 2200; | |
287 | break; | |
288 | case MMC_VDD_20_21: | |
289 | mV = 2000; | |
290 | break; | |
291 | case MMC_VDD_165_195: | |
292 | mV = 1800; | |
293 | break; | |
294 | default: | |
295 | BUG(); | |
296 | } | |
297 | return menelaus_set_vdcdc(3, mV); | |
298 | } | |
299 | return 0; | |
300 | } | |
301 | ||
302 | static void n810_set_power_emmc(struct device *dev, | |
303 | int power_on) | |
304 | { | |
305 | dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off"); | |
306 | ||
307 | if (power_on) { | |
308 | gpio_set_value(N810_EMMC_VSD_GPIO, 1); | |
309 | msleep(1); | |
1dea5c6b | 310 | gpio_set_value(N810_EMMC_VIO_GPIO, 1); |
9418c65f TL |
311 | msleep(1); |
312 | } else { | |
1dea5c6b | 313 | gpio_set_value(N810_EMMC_VIO_GPIO, 0); |
9418c65f TL |
314 | msleep(50); |
315 | gpio_set_value(N810_EMMC_VSD_GPIO, 0); | |
316 | msleep(50); | |
317 | } | |
318 | } | |
319 | ||
320 | static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, | |
321 | int vdd) | |
322 | { | |
323 | if (machine_is_nokia_n800() || slot == 0) | |
324 | return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); | |
325 | ||
326 | n810_set_power_emmc(dev, power_on); | |
327 | ||
328 | return 0; | |
329 | } | |
330 | ||
331 | static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) | |
332 | { | |
333 | int r; | |
334 | ||
335 | dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1, | |
336 | bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); | |
337 | BUG_ON(slot != 0 && slot != 1); | |
338 | slot++; | |
339 | switch (bus_mode) { | |
340 | case MMC_BUSMODE_OPENDRAIN: | |
341 | r = menelaus_set_mmc_opendrain(slot, 1); | |
342 | break; | |
343 | case MMC_BUSMODE_PUSHPULL: | |
344 | r = menelaus_set_mmc_opendrain(slot, 0); | |
345 | break; | |
346 | default: | |
347 | BUG(); | |
348 | } | |
349 | if (r != 0 && printk_ratelimit()) | |
350 | dev_err(dev, "MMC: unable to set bus mode for slot %d\n", | |
351 | slot); | |
352 | return r; | |
353 | } | |
354 | ||
355 | static int n8x0_mmc_get_cover_state(struct device *dev, int slot) | |
356 | { | |
357 | slot++; | |
358 | BUG_ON(slot != 1 && slot != 2); | |
359 | if (slot == 1) | |
360 | return slot1_cover_open; | |
361 | else | |
362 | return slot2_cover_open; | |
363 | } | |
364 | ||
365 | static void n8x0_mmc_callback(void *data, u8 card_mask) | |
366 | { | |
367 | int bit, *openp, index; | |
368 | ||
369 | if (machine_is_nokia_n800()) { | |
370 | bit = 1 << 1; | |
371 | openp = &slot2_cover_open; | |
372 | index = 1; | |
373 | } else { | |
374 | bit = 1; | |
375 | openp = &slot1_cover_open; | |
376 | index = 0; | |
377 | } | |
378 | ||
379 | if (card_mask & bit) | |
380 | *openp = 1; | |
381 | else | |
382 | *openp = 0; | |
383 | ||
384 | omap_mmc_notify_cover_event(mmc_device, index, *openp); | |
385 | } | |
386 | ||
387 | void n8x0_mmc_slot1_cover_handler(void *arg, int closed_state) | |
388 | { | |
389 | if (mmc_device == NULL) | |
390 | return; | |
391 | ||
392 | slot1_cover_open = !closed_state; | |
393 | omap_mmc_notify_cover_event(mmc_device, 0, closed_state); | |
394 | } | |
395 | ||
396 | static int n8x0_mmc_late_init(struct device *dev) | |
397 | { | |
398 | int r, bit, *openp; | |
399 | int vs2sel; | |
400 | ||
401 | mmc_device = dev; | |
402 | ||
403 | r = menelaus_set_slot_sel(1); | |
404 | if (r < 0) | |
405 | return r; | |
406 | ||
407 | if (machine_is_nokia_n800()) | |
408 | vs2sel = 0; | |
409 | else | |
410 | vs2sel = 2; | |
411 | ||
412 | r = menelaus_set_mmc_slot(2, 0, vs2sel, 1); | |
413 | if (r < 0) | |
414 | return r; | |
415 | ||
416 | n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */ | |
417 | n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16); | |
418 | ||
419 | r = menelaus_set_mmc_slot(1, 1, 0, 1); | |
420 | if (r < 0) | |
421 | return r; | |
422 | r = menelaus_set_mmc_slot(2, 1, vs2sel, 1); | |
423 | if (r < 0) | |
424 | return r; | |
425 | ||
426 | r = menelaus_get_slot_pin_states(); | |
427 | if (r < 0) | |
428 | return r; | |
429 | ||
430 | if (machine_is_nokia_n800()) { | |
431 | bit = 1 << 1; | |
432 | openp = &slot2_cover_open; | |
433 | } else { | |
434 | bit = 1; | |
435 | openp = &slot1_cover_open; | |
436 | slot2_cover_open = 0; | |
437 | } | |
438 | ||
439 | /* All slot pin bits seem to be inversed until first switch change */ | |
440 | if (r == 0xf || r == (0xf & ~bit)) | |
441 | r = ~r; | |
442 | ||
443 | if (r & bit) | |
444 | *openp = 1; | |
445 | else | |
446 | *openp = 0; | |
447 | ||
448 | r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL); | |
449 | ||
450 | return r; | |
451 | } | |
452 | ||
453 | static void n8x0_mmc_shutdown(struct device *dev) | |
454 | { | |
455 | int vs2sel; | |
456 | ||
457 | if (machine_is_nokia_n800()) | |
458 | vs2sel = 0; | |
459 | else | |
460 | vs2sel = 2; | |
461 | ||
462 | menelaus_set_mmc_slot(1, 0, 0, 0); | |
463 | menelaus_set_mmc_slot(2, 0, vs2sel, 0); | |
464 | } | |
465 | ||
466 | static void n8x0_mmc_cleanup(struct device *dev) | |
467 | { | |
468 | menelaus_unregister_mmc_callback(); | |
469 | ||
470 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
471 | ||
472 | if (machine_is_nokia_n810()) { | |
473 | gpio_free(N810_EMMC_VSD_GPIO); | |
1dea5c6b | 474 | gpio_free(N810_EMMC_VIO_GPIO); |
9418c65f TL |
475 | } |
476 | } | |
477 | ||
478 | /* | |
479 | * MMC controller1 has two slots that are multiplexed via I2C. | |
480 | * MMC controller2 is not in use. | |
481 | */ | |
482 | static struct omap_mmc_platform_data mmc1_data = { | |
483 | .nr_slots = 2, | |
484 | .switch_slot = n8x0_mmc_switch_slot, | |
485 | .init = n8x0_mmc_late_init, | |
486 | .cleanup = n8x0_mmc_cleanup, | |
487 | .shutdown = n8x0_mmc_shutdown, | |
488 | .max_freq = 24000000, | |
489 | .dma_mask = 0xffffffff, | |
490 | .slots[0] = { | |
63509e3c | 491 | .wires = 4, |
9418c65f TL |
492 | .set_power = n8x0_mmc_set_power, |
493 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
494 | .get_cover_state = n8x0_mmc_get_cover_state, | |
495 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 | | |
496 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
497 | .name = "internal", | |
498 | }, | |
499 | .slots[1] = { | |
500 | .set_power = n8x0_mmc_set_power, | |
501 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
502 | .get_cover_state = n8x0_mmc_get_cover_state, | |
503 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 | | |
504 | MMC_VDD_21_22 | MMC_VDD_22_23 | | |
505 | MMC_VDD_23_24 | MMC_VDD_24_25 | | |
506 | MMC_VDD_27_28 | MMC_VDD_28_29 | | |
507 | MMC_VDD_29_30 | MMC_VDD_30_31 | | |
508 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
509 | .name = "external", | |
510 | }, | |
511 | }; | |
512 | ||
513 | static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; | |
514 | ||
515 | void __init n8x0_mmc_init(void) | |
516 | ||
517 | { | |
518 | int err; | |
519 | ||
520 | if (machine_is_nokia_n810()) { | |
521 | mmc1_data.slots[0].name = "external"; | |
522 | ||
523 | /* | |
524 | * Some Samsung Movinand chips do not like open-ended | |
525 | * multi-block reads and fall to braind-dead state | |
526 | * while doing so. Reducing the number of blocks in | |
527 | * the transfer or delays in clock disable do not help | |
528 | */ | |
529 | mmc1_data.slots[1].name = "internal"; | |
530 | mmc1_data.slots[1].ban_openended = 1; | |
531 | } | |
532 | ||
533 | err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch"); | |
534 | if (err) | |
1dea5c6b | 535 | return; |
9418c65f TL |
536 | |
537 | gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0); | |
538 | ||
539 | if (machine_is_nokia_n810()) { | |
540 | err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf"); | |
541 | if (err) { | |
542 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
1dea5c6b | 543 | return; |
9418c65f TL |
544 | } |
545 | gpio_direction_output(N810_EMMC_VSD_GPIO, 0); | |
546 | ||
1dea5c6b | 547 | err = gpio_request(N810_EMMC_VIO_GPIO, "MMC slot 2 Vdd"); |
9418c65f TL |
548 | if (err) { |
549 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
550 | gpio_free(N810_EMMC_VSD_GPIO); | |
1dea5c6b | 551 | return; |
9418c65f | 552 | } |
1dea5c6b | 553 | gpio_direction_output(N810_EMMC_VIO_GPIO, 0); |
9418c65f TL |
554 | } |
555 | ||
556 | mmc_data[0] = &mmc1_data; | |
557 | omap2_init_mmc(mmc_data, OMAP24XX_NR_MMC); | |
558 | } | |
559 | #else | |
560 | ||
561 | void __init n8x0_mmc_init(void) | |
562 | { | |
563 | } | |
564 | ||
565 | void n8x0_mmc_slot1_cover_handler(void *arg, int state) | |
566 | { | |
567 | } | |
568 | ||
569 | #endif /* CONFIG_MMC_OMAP */ | |
570 | ||
571 | #ifdef CONFIG_MENELAUS | |
572 | ||
573 | static int n8x0_auto_sleep_regulators(void) | |
574 | { | |
575 | u32 val; | |
576 | int ret; | |
577 | ||
578 | val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \ | |
579 | | EN_VAUX_SLEEP | EN_VIO_SLEEP \ | |
580 | | EN_VMEM_SLEEP | EN_DC3_SLEEP \ | |
581 | | EN_VC_SLEEP | EN_DC2_SLEEP; | |
582 | ||
583 | ret = menelaus_set_regulator_sleep(1, val); | |
584 | if (ret < 0) { | |
585 | printk(KERN_ERR "Could not set regulators to sleep on " | |
586 | "menelaus: %u\n", ret); | |
587 | return ret; | |
588 | } | |
589 | return 0; | |
590 | } | |
591 | ||
592 | static int n8x0_auto_voltage_scale(void) | |
593 | { | |
594 | int ret; | |
595 | ||
596 | ret = menelaus_set_vcore_hw(1400, 1050); | |
597 | if (ret < 0) { | |
598 | printk(KERN_ERR "Could not set VCORE voltage on " | |
599 | "menelaus: %u\n", ret); | |
600 | return ret; | |
601 | } | |
602 | return 0; | |
603 | } | |
604 | ||
605 | static int n8x0_menelaus_late_init(struct device *dev) | |
606 | { | |
607 | int ret; | |
608 | ||
609 | ret = n8x0_auto_voltage_scale(); | |
610 | if (ret < 0) | |
611 | return ret; | |
612 | ret = n8x0_auto_sleep_regulators(); | |
613 | if (ret < 0) | |
614 | return ret; | |
615 | return 0; | |
616 | } | |
617 | ||
a7f97d25 JN |
618 | #else |
619 | static int n8x0_menelaus_late_init(struct device *dev) | |
620 | { | |
621 | return 0; | |
622 | } | |
623 | #endif | |
624 | ||
625 | static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = { | |
626 | .late_init = n8x0_menelaus_late_init, | |
627 | }; | |
628 | ||
629 | static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = { | |
9418c65f TL |
630 | { |
631 | I2C_BOARD_INFO("menelaus", 0x72), | |
632 | .irq = INT_24XX_SYS_NIRQ, | |
a7f97d25 | 633 | .platform_data = &n8x0_menelaus_platform_data, |
9418c65f TL |
634 | }, |
635 | }; | |
636 | ||
366498d4 JN |
637 | static struct aic3x_pdata n810_aic33_data __initdata = { |
638 | .gpio_reset = 118, | |
639 | }; | |
640 | ||
641 | static struct i2c_board_info n810_i2c_board_info_2[] __initdata = { | |
642 | { | |
643 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
644 | .platform_data = &n810_aic33_data, | |
645 | }, | |
646 | }; | |
647 | ||
63138812 KV |
648 | static void __init n8x0_map_io(void) |
649 | { | |
650 | omap2_set_globals_242x(); | |
6fbd55d0 | 651 | omap242x_map_common_io(); |
63138812 KV |
652 | } |
653 | ||
654 | static void __init n8x0_init_irq(void) | |
655 | { | |
656 | omap2_init_common_hw(NULL, NULL); | |
657 | omap_init_irq(); | |
658 | omap_gpio_init(); | |
659 | } | |
660 | ||
bd8f0fc9 TL |
661 | #ifdef CONFIG_OMAP_MUX |
662 | static struct omap_board_mux board_mux[] __initdata = { | |
04be1e9b JN |
663 | /* I2S codec port pins for McBSP block */ |
664 | OMAP2420_MUX(EAC_AC_SCLK, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
665 | OMAP2420_MUX(EAC_AC_FS, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
666 | OMAP2420_MUX(EAC_AC_DIN, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
667 | OMAP2420_MUX(EAC_AC_DOUT, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
bd8f0fc9 TL |
668 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
669 | }; | |
670 | #else | |
671 | #define board_mux NULL | |
672 | #endif | |
673 | ||
63138812 KV |
674 | static void __init n8x0_init_machine(void) |
675 | { | |
bd8f0fc9 | 676 | omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC); |
63138812 KV |
677 | /* FIXME: add n810 spi devices */ |
678 | spi_register_board_info(n800_spi_board_info, | |
679 | ARRAY_SIZE(n800_spi_board_info)); | |
a7f97d25 JN |
680 | omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1, |
681 | ARRAY_SIZE(n8x0_i2c_board_info_1)); | |
366498d4 JN |
682 | omap_register_i2c_bus(2, 400, NULL, 0); |
683 | if (machine_is_nokia_n810()) | |
684 | i2c_register_board_info(2, n810_i2c_board_info_2, | |
685 | ARRAY_SIZE(n810_i2c_board_info_2)); | |
63138812 KV |
686 | |
687 | omap_serial_init(); | |
688 | n8x0_onenand_init(); | |
9418c65f | 689 | n8x0_mmc_init(); |
97b9ad16 | 690 | n8x0_usb_init(); |
63138812 KV |
691 | } |
692 | ||
693 | MACHINE_START(NOKIA_N800, "Nokia N800") | |
694 | .phys_io = 0x48000000, | |
b4224b23 | 695 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
63138812 KV |
696 | .boot_params = 0x80000100, |
697 | .map_io = n8x0_map_io, | |
71ee7dad | 698 | .reserve = omap_reserve, |
63138812 KV |
699 | .init_irq = n8x0_init_irq, |
700 | .init_machine = n8x0_init_machine, | |
701 | .timer = &omap_timer, | |
702 | MACHINE_END | |
703 | ||
704 | MACHINE_START(NOKIA_N810, "Nokia N810") | |
705 | .phys_io = 0x48000000, | |
b4224b23 | 706 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
63138812 KV |
707 | .boot_params = 0x80000100, |
708 | .map_io = n8x0_map_io, | |
71ee7dad | 709 | .reserve = omap_reserve, |
63138812 KV |
710 | .init_irq = n8x0_init_irq, |
711 | .init_machine = n8x0_init_machine, | |
712 | .timer = &omap_timer, | |
713 | MACHINE_END | |
714 | ||
715 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | |
716 | .phys_io = 0x48000000, | |
b4224b23 | 717 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
63138812 KV |
718 | .boot_params = 0x80000100, |
719 | .map_io = n8x0_map_io, | |
71ee7dad | 720 | .reserve = omap_reserve, |
63138812 KV |
721 | .init_irq = n8x0_init_irq, |
722 | .init_machine = n8x0_init_machine, | |
723 | .timer = &omap_timer, | |
724 | MACHINE_END |