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63138812 KV |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-n8x0.c | |
3 | * | |
4 | * Copyright (C) 2005-2009 Nokia Corporation | |
5 | * Author: Juha Yrjola <juha.yrjola@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap2/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/gpio.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/io.h> | |
19 | #include <linux/stddef.h> | |
9418c65f | 20 | #include <linux/i2c.h> |
63138812 KV |
21 | #include <linux/spi/spi.h> |
22 | #include <linux/usb/musb.h> | |
366498d4 | 23 | #include <sound/tlv320aic3x.h> |
63138812 KV |
24 | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach-types.h> | |
27 | ||
ce491cf8 | 28 | #include <plat/board.h> |
4e65331c | 29 | #include "common.h" |
9418c65f | 30 | #include <plat/menelaus.h> |
63138812 | 31 | #include <mach/irqs.h> |
ce491cf8 TL |
32 | #include <plat/mcspi.h> |
33 | #include <plat/onenand.h> | |
9418c65f | 34 | #include <plat/mmc.h> |
ce491cf8 | 35 | #include <plat/serial.h> |
63138812 | 36 | |
bd8f0fc9 TL |
37 | #include "mux.h" |
38 | ||
97b9ad16 FA |
39 | #define TUSB6010_ASYNC_CS 1 |
40 | #define TUSB6010_SYNC_CS 4 | |
41 | #define TUSB6010_GPIO_INT 58 | |
42 | #define TUSB6010_GPIO_ENABLE 0 | |
43 | #define TUSB6010_DMACHAN 0x3f | |
44 | ||
9a35f876 | 45 | #if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE) |
97b9ad16 FA |
46 | /* |
47 | * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and | |
48 | * 1.5 V voltage regulators of PM companion chip. Companion chip will then | |
49 | * provide then PGOOD signal to TUSB6010 which will release it from reset. | |
50 | */ | |
51 | static int tusb_set_power(int state) | |
52 | { | |
53 | int i, retval = 0; | |
54 | ||
55 | if (state) { | |
56 | gpio_set_value(TUSB6010_GPIO_ENABLE, 1); | |
57 | msleep(1); | |
58 | ||
59 | /* Wait until TUSB6010 pulls INT pin down */ | |
60 | i = 100; | |
61 | while (i && gpio_get_value(TUSB6010_GPIO_INT)) { | |
62 | msleep(1); | |
63 | i--; | |
64 | } | |
65 | ||
66 | if (!i) { | |
67 | printk(KERN_ERR "tusb: powerup failed\n"); | |
68 | retval = -ENODEV; | |
69 | } | |
70 | } else { | |
71 | gpio_set_value(TUSB6010_GPIO_ENABLE, 0); | |
72 | msleep(10); | |
73 | } | |
74 | ||
75 | return retval; | |
76 | } | |
77 | ||
78 | static struct musb_hdrc_config musb_config = { | |
79 | .multipoint = 1, | |
80 | .dyn_fifo = 1, | |
81 | .num_eps = 16, | |
82 | .ram_bits = 12, | |
83 | }; | |
84 | ||
85 | static struct musb_hdrc_platform_data tusb_data = { | |
310018d5 | 86 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC |
97b9ad16 | 87 | .mode = MUSB_OTG, |
310018d5 | 88 | #else |
97b9ad16 FA |
89 | .mode = MUSB_HOST, |
90 | #endif | |
91 | .set_power = tusb_set_power, | |
92 | .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */ | |
93 | .power = 100, /* Max 100 mA VBUS for host mode */ | |
94 | .config = &musb_config, | |
95 | }; | |
96 | ||
97 | static void __init n8x0_usb_init(void) | |
98 | { | |
99 | int ret = 0; | |
100 | static char announce[] __initdata = KERN_INFO "TUSB 6010\n"; | |
101 | ||
102 | /* PM companion chip power control pin */ | |
bc593f5d IG |
103 | ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW, |
104 | "TUSB6010 enable"); | |
97b9ad16 FA |
105 | if (ret != 0) { |
106 | printk(KERN_ERR "Could not get TUSB power GPIO%i\n", | |
107 | TUSB6010_GPIO_ENABLE); | |
108 | return; | |
109 | } | |
97b9ad16 FA |
110 | tusb_set_power(0); |
111 | ||
112 | ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, | |
113 | TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, | |
114 | TUSB6010_GPIO_INT, TUSB6010_DMACHAN); | |
115 | if (ret != 0) | |
116 | goto err; | |
117 | ||
118 | printk(announce); | |
119 | ||
120 | return; | |
121 | ||
122 | err: | |
123 | gpio_free(TUSB6010_GPIO_ENABLE); | |
124 | } | |
125 | #else | |
126 | ||
127 | static void __init n8x0_usb_init(void) {} | |
128 | ||
7c925546 | 129 | #endif /*CONFIG_USB_MUSB_TUSB6010 */ |
97b9ad16 FA |
130 | |
131 | ||
63138812 KV |
132 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { |
133 | .turbo_mode = 0, | |
63138812 KV |
134 | }; |
135 | ||
136 | static struct spi_board_info n800_spi_board_info[] __initdata = { | |
137 | { | |
138 | .modalias = "p54spi", | |
139 | .bus_num = 2, | |
140 | .chip_select = 0, | |
141 | .max_speed_hz = 48000000, | |
142 | .controller_data = &p54spi_mcspi_config, | |
143 | }, | |
144 | }; | |
145 | ||
146 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ | |
147 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
148 | ||
149 | static struct mtd_partition onenand_partitions[] = { | |
150 | { | |
151 | .name = "bootloader", | |
152 | .offset = 0, | |
153 | .size = 0x20000, | |
154 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
155 | }, | |
156 | { | |
157 | .name = "config", | |
158 | .offset = MTDPART_OFS_APPEND, | |
159 | .size = 0x60000, | |
160 | }, | |
161 | { | |
162 | .name = "kernel", | |
163 | .offset = MTDPART_OFS_APPEND, | |
164 | .size = 0x200000, | |
165 | }, | |
166 | { | |
167 | .name = "initfs", | |
168 | .offset = MTDPART_OFS_APPEND, | |
169 | .size = 0x400000, | |
170 | }, | |
171 | { | |
172 | .name = "rootfs", | |
173 | .offset = MTDPART_OFS_APPEND, | |
174 | .size = MTDPART_SIZ_FULL, | |
175 | }, | |
176 | }; | |
177 | ||
a1a92e6f AK |
178 | static struct omap_onenand_platform_data board_onenand_data[] = { |
179 | { | |
180 | .cs = 0, | |
181 | .gpio_irq = 26, | |
182 | .parts = onenand_partitions, | |
183 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
184 | .flags = ONENAND_SYNC_READ, | |
185 | } | |
63138812 | 186 | }; |
63138812 KV |
187 | #endif |
188 | ||
9418c65f TL |
189 | #if defined(CONFIG_MENELAUS) && \ |
190 | (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)) | |
191 | ||
192 | /* | |
193 | * On both N800 and N810, only the first of the two MMC controllers is in use. | |
194 | * The two MMC slots are multiplexed via Menelaus companion chip over I2C. | |
195 | * On N800, both slots are powered via Menelaus. On N810, only one of the | |
196 | * slots is powered via Menelaus. The N810 EMMC is powered via GPIO. | |
197 | * | |
198 | * VMMC slot 1 on both N800 and N810 | |
199 | * VDCDC3_APE and VMCS2_APE slot 2 on N800 | |
200 | * GPIO23 and GPIO9 slot 2 EMMC on N810 | |
201 | * | |
202 | */ | |
203 | #define N8X0_SLOT_SWITCH_GPIO 96 | |
204 | #define N810_EMMC_VSD_GPIO 23 | |
1dea5c6b | 205 | #define N810_EMMC_VIO_GPIO 9 |
9418c65f | 206 | |
49b87c6d TL |
207 | static int slot1_cover_open; |
208 | static int slot2_cover_open; | |
209 | static struct device *mmc_device; | |
210 | ||
9418c65f TL |
211 | static int n8x0_mmc_switch_slot(struct device *dev, int slot) |
212 | { | |
213 | #ifdef CONFIG_MMC_DEBUG | |
214 | dev_dbg(dev, "Choose slot %d\n", slot + 1); | |
215 | #endif | |
216 | gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); | |
217 | return 0; | |
218 | } | |
219 | ||
220 | static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, | |
221 | int power_on, int vdd) | |
222 | { | |
223 | int mV; | |
224 | ||
225 | #ifdef CONFIG_MMC_DEBUG | |
226 | dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, | |
227 | power_on ? "on" : "off", vdd); | |
228 | #endif | |
229 | if (slot == 0) { | |
230 | if (!power_on) | |
231 | return menelaus_set_vmmc(0); | |
232 | switch (1 << vdd) { | |
233 | case MMC_VDD_33_34: | |
234 | case MMC_VDD_32_33: | |
235 | case MMC_VDD_31_32: | |
236 | mV = 3100; | |
237 | break; | |
238 | case MMC_VDD_30_31: | |
239 | mV = 3000; | |
240 | break; | |
241 | case MMC_VDD_28_29: | |
242 | mV = 2800; | |
243 | break; | |
244 | case MMC_VDD_165_195: | |
245 | mV = 1850; | |
246 | break; | |
247 | default: | |
248 | BUG(); | |
249 | } | |
250 | return menelaus_set_vmmc(mV); | |
251 | } else { | |
252 | if (!power_on) | |
253 | return menelaus_set_vdcdc(3, 0); | |
254 | switch (1 << vdd) { | |
255 | case MMC_VDD_33_34: | |
256 | case MMC_VDD_32_33: | |
257 | mV = 3300; | |
258 | break; | |
259 | case MMC_VDD_30_31: | |
260 | case MMC_VDD_29_30: | |
261 | mV = 3000; | |
262 | break; | |
263 | case MMC_VDD_28_29: | |
264 | case MMC_VDD_27_28: | |
265 | mV = 2800; | |
266 | break; | |
267 | case MMC_VDD_24_25: | |
268 | case MMC_VDD_23_24: | |
269 | mV = 2400; | |
270 | break; | |
271 | case MMC_VDD_22_23: | |
272 | case MMC_VDD_21_22: | |
273 | mV = 2200; | |
274 | break; | |
275 | case MMC_VDD_20_21: | |
276 | mV = 2000; | |
277 | break; | |
278 | case MMC_VDD_165_195: | |
279 | mV = 1800; | |
280 | break; | |
281 | default: | |
282 | BUG(); | |
283 | } | |
284 | return menelaus_set_vdcdc(3, mV); | |
285 | } | |
286 | return 0; | |
287 | } | |
288 | ||
289 | static void n810_set_power_emmc(struct device *dev, | |
290 | int power_on) | |
291 | { | |
292 | dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off"); | |
293 | ||
294 | if (power_on) { | |
295 | gpio_set_value(N810_EMMC_VSD_GPIO, 1); | |
296 | msleep(1); | |
1dea5c6b | 297 | gpio_set_value(N810_EMMC_VIO_GPIO, 1); |
9418c65f TL |
298 | msleep(1); |
299 | } else { | |
1dea5c6b | 300 | gpio_set_value(N810_EMMC_VIO_GPIO, 0); |
9418c65f TL |
301 | msleep(50); |
302 | gpio_set_value(N810_EMMC_VSD_GPIO, 0); | |
303 | msleep(50); | |
304 | } | |
305 | } | |
306 | ||
307 | static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, | |
308 | int vdd) | |
309 | { | |
310 | if (machine_is_nokia_n800() || slot == 0) | |
311 | return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); | |
312 | ||
313 | n810_set_power_emmc(dev, power_on); | |
314 | ||
315 | return 0; | |
316 | } | |
317 | ||
318 | static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) | |
319 | { | |
320 | int r; | |
321 | ||
322 | dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1, | |
323 | bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); | |
324 | BUG_ON(slot != 0 && slot != 1); | |
325 | slot++; | |
326 | switch (bus_mode) { | |
327 | case MMC_BUSMODE_OPENDRAIN: | |
328 | r = menelaus_set_mmc_opendrain(slot, 1); | |
329 | break; | |
330 | case MMC_BUSMODE_PUSHPULL: | |
331 | r = menelaus_set_mmc_opendrain(slot, 0); | |
332 | break; | |
333 | default: | |
334 | BUG(); | |
335 | } | |
336 | if (r != 0 && printk_ratelimit()) | |
337 | dev_err(dev, "MMC: unable to set bus mode for slot %d\n", | |
338 | slot); | |
339 | return r; | |
340 | } | |
341 | ||
342 | static int n8x0_mmc_get_cover_state(struct device *dev, int slot) | |
343 | { | |
344 | slot++; | |
345 | BUG_ON(slot != 1 && slot != 2); | |
346 | if (slot == 1) | |
347 | return slot1_cover_open; | |
348 | else | |
349 | return slot2_cover_open; | |
350 | } | |
351 | ||
352 | static void n8x0_mmc_callback(void *data, u8 card_mask) | |
353 | { | |
354 | int bit, *openp, index; | |
355 | ||
356 | if (machine_is_nokia_n800()) { | |
357 | bit = 1 << 1; | |
358 | openp = &slot2_cover_open; | |
359 | index = 1; | |
360 | } else { | |
361 | bit = 1; | |
362 | openp = &slot1_cover_open; | |
363 | index = 0; | |
364 | } | |
365 | ||
366 | if (card_mask & bit) | |
367 | *openp = 1; | |
368 | else | |
369 | *openp = 0; | |
370 | ||
d5171102 | 371 | #ifdef CONFIG_MMC_OMAP |
9418c65f | 372 | omap_mmc_notify_cover_event(mmc_device, index, *openp); |
d5171102 TL |
373 | #else |
374 | pr_warn("MMC: notify cover event not available\n"); | |
375 | #endif | |
9418c65f TL |
376 | } |
377 | ||
9418c65f TL |
378 | static int n8x0_mmc_late_init(struct device *dev) |
379 | { | |
380 | int r, bit, *openp; | |
381 | int vs2sel; | |
382 | ||
383 | mmc_device = dev; | |
384 | ||
385 | r = menelaus_set_slot_sel(1); | |
386 | if (r < 0) | |
387 | return r; | |
388 | ||
389 | if (machine_is_nokia_n800()) | |
390 | vs2sel = 0; | |
391 | else | |
392 | vs2sel = 2; | |
393 | ||
394 | r = menelaus_set_mmc_slot(2, 0, vs2sel, 1); | |
395 | if (r < 0) | |
396 | return r; | |
397 | ||
398 | n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */ | |
399 | n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16); | |
400 | ||
401 | r = menelaus_set_mmc_slot(1, 1, 0, 1); | |
402 | if (r < 0) | |
403 | return r; | |
404 | r = menelaus_set_mmc_slot(2, 1, vs2sel, 1); | |
405 | if (r < 0) | |
406 | return r; | |
407 | ||
408 | r = menelaus_get_slot_pin_states(); | |
409 | if (r < 0) | |
410 | return r; | |
411 | ||
412 | if (machine_is_nokia_n800()) { | |
413 | bit = 1 << 1; | |
414 | openp = &slot2_cover_open; | |
415 | } else { | |
416 | bit = 1; | |
417 | openp = &slot1_cover_open; | |
418 | slot2_cover_open = 0; | |
419 | } | |
420 | ||
421 | /* All slot pin bits seem to be inversed until first switch change */ | |
422 | if (r == 0xf || r == (0xf & ~bit)) | |
423 | r = ~r; | |
424 | ||
425 | if (r & bit) | |
426 | *openp = 1; | |
427 | else | |
428 | *openp = 0; | |
429 | ||
430 | r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL); | |
431 | ||
432 | return r; | |
433 | } | |
434 | ||
435 | static void n8x0_mmc_shutdown(struct device *dev) | |
436 | { | |
437 | int vs2sel; | |
438 | ||
439 | if (machine_is_nokia_n800()) | |
440 | vs2sel = 0; | |
441 | else | |
442 | vs2sel = 2; | |
443 | ||
444 | menelaus_set_mmc_slot(1, 0, 0, 0); | |
445 | menelaus_set_mmc_slot(2, 0, vs2sel, 0); | |
446 | } | |
447 | ||
448 | static void n8x0_mmc_cleanup(struct device *dev) | |
449 | { | |
450 | menelaus_unregister_mmc_callback(); | |
451 | ||
452 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
453 | ||
454 | if (machine_is_nokia_n810()) { | |
455 | gpio_free(N810_EMMC_VSD_GPIO); | |
1dea5c6b | 456 | gpio_free(N810_EMMC_VIO_GPIO); |
9418c65f TL |
457 | } |
458 | } | |
459 | ||
460 | /* | |
461 | * MMC controller1 has two slots that are multiplexed via I2C. | |
462 | * MMC controller2 is not in use. | |
463 | */ | |
464 | static struct omap_mmc_platform_data mmc1_data = { | |
465 | .nr_slots = 2, | |
466 | .switch_slot = n8x0_mmc_switch_slot, | |
467 | .init = n8x0_mmc_late_init, | |
468 | .cleanup = n8x0_mmc_cleanup, | |
469 | .shutdown = n8x0_mmc_shutdown, | |
470 | .max_freq = 24000000, | |
471 | .dma_mask = 0xffffffff, | |
472 | .slots[0] = { | |
473 | .wires = 4, | |
474 | .set_power = n8x0_mmc_set_power, | |
475 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
476 | .get_cover_state = n8x0_mmc_get_cover_state, | |
477 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 | | |
478 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
479 | .name = "internal", | |
480 | }, | |
481 | .slots[1] = { | |
482 | .set_power = n8x0_mmc_set_power, | |
483 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
484 | .get_cover_state = n8x0_mmc_get_cover_state, | |
485 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 | | |
486 | MMC_VDD_21_22 | MMC_VDD_22_23 | | |
487 | MMC_VDD_23_24 | MMC_VDD_24_25 | | |
488 | MMC_VDD_27_28 | MMC_VDD_28_29 | | |
489 | MMC_VDD_29_30 | MMC_VDD_30_31 | | |
490 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
491 | .name = "external", | |
492 | }, | |
493 | }; | |
494 | ||
495 | static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; | |
496 | ||
bc593f5d IG |
497 | static struct gpio n810_emmc_gpios[] __initdata = { |
498 | { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" }, | |
499 | { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" }, | |
500 | }; | |
9418c65f | 501 | |
bc593f5d | 502 | static void __init n8x0_mmc_init(void) |
9418c65f TL |
503 | { |
504 | int err; | |
505 | ||
506 | if (machine_is_nokia_n810()) { | |
507 | mmc1_data.slots[0].name = "external"; | |
508 | ||
509 | /* | |
510 | * Some Samsung Movinand chips do not like open-ended | |
511 | * multi-block reads and fall to braind-dead state | |
512 | * while doing so. Reducing the number of blocks in | |
513 | * the transfer or delays in clock disable do not help | |
514 | */ | |
515 | mmc1_data.slots[1].name = "internal"; | |
516 | mmc1_data.slots[1].ban_openended = 1; | |
517 | } | |
518 | ||
bc593f5d IG |
519 | err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW, |
520 | "MMC slot switch"); | |
9418c65f | 521 | if (err) |
1dea5c6b | 522 | return; |
9418c65f | 523 | |
9418c65f | 524 | if (machine_is_nokia_n810()) { |
bc593f5d IG |
525 | err = gpio_request_array(n810_emmc_gpios, |
526 | ARRAY_SIZE(n810_emmc_gpios)); | |
9418c65f TL |
527 | if (err) { |
528 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
1dea5c6b | 529 | return; |
9418c65f | 530 | } |
9418c65f TL |
531 | } |
532 | ||
533 | mmc_data[0] = &mmc1_data; | |
e08016d0 | 534 | omap242x_init_mmc(mmc_data); |
9418c65f TL |
535 | } |
536 | #else | |
537 | ||
538 | void __init n8x0_mmc_init(void) | |
539 | { | |
540 | } | |
9418c65f TL |
541 | #endif /* CONFIG_MMC_OMAP */ |
542 | ||
543 | #ifdef CONFIG_MENELAUS | |
544 | ||
545 | static int n8x0_auto_sleep_regulators(void) | |
546 | { | |
547 | u32 val; | |
548 | int ret; | |
549 | ||
550 | val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \ | |
551 | | EN_VAUX_SLEEP | EN_VIO_SLEEP \ | |
552 | | EN_VMEM_SLEEP | EN_DC3_SLEEP \ | |
553 | | EN_VC_SLEEP | EN_DC2_SLEEP; | |
554 | ||
555 | ret = menelaus_set_regulator_sleep(1, val); | |
556 | if (ret < 0) { | |
557 | printk(KERN_ERR "Could not set regulators to sleep on " | |
558 | "menelaus: %u\n", ret); | |
559 | return ret; | |
560 | } | |
561 | return 0; | |
562 | } | |
563 | ||
564 | static int n8x0_auto_voltage_scale(void) | |
565 | { | |
566 | int ret; | |
567 | ||
568 | ret = menelaus_set_vcore_hw(1400, 1050); | |
569 | if (ret < 0) { | |
570 | printk(KERN_ERR "Could not set VCORE voltage on " | |
571 | "menelaus: %u\n", ret); | |
572 | return ret; | |
573 | } | |
574 | return 0; | |
575 | } | |
576 | ||
577 | static int n8x0_menelaus_late_init(struct device *dev) | |
578 | { | |
579 | int ret; | |
580 | ||
581 | ret = n8x0_auto_voltage_scale(); | |
582 | if (ret < 0) | |
583 | return ret; | |
584 | ret = n8x0_auto_sleep_regulators(); | |
585 | if (ret < 0) | |
586 | return ret; | |
587 | return 0; | |
588 | } | |
589 | ||
a7f97d25 JN |
590 | #else |
591 | static int n8x0_menelaus_late_init(struct device *dev) | |
592 | { | |
593 | return 0; | |
594 | } | |
595 | #endif | |
596 | ||
597 | static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = { | |
598 | .late_init = n8x0_menelaus_late_init, | |
599 | }; | |
600 | ||
601 | static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = { | |
9418c65f TL |
602 | { |
603 | I2C_BOARD_INFO("menelaus", 0x72), | |
604 | .irq = INT_24XX_SYS_NIRQ, | |
a7f97d25 | 605 | .platform_data = &n8x0_menelaus_platform_data, |
9418c65f TL |
606 | }, |
607 | }; | |
608 | ||
366498d4 JN |
609 | static struct aic3x_pdata n810_aic33_data __initdata = { |
610 | .gpio_reset = 118, | |
9418c65f TL |
611 | }; |
612 | ||
366498d4 JN |
613 | static struct i2c_board_info n810_i2c_board_info_2[] __initdata = { |
614 | { | |
615 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
616 | .platform_data = &n810_aic33_data, | |
617 | }, | |
618 | }; | |
9418c65f | 619 | |
bd8f0fc9 TL |
620 | #ifdef CONFIG_OMAP_MUX |
621 | static struct omap_board_mux board_mux[] __initdata = { | |
04be1e9b JN |
622 | /* I2S codec port pins for McBSP block */ |
623 | OMAP2420_MUX(EAC_AC_SCLK, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
624 | OMAP2420_MUX(EAC_AC_FS, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
625 | OMAP2420_MUX(EAC_AC_DIN, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
626 | OMAP2420_MUX(EAC_AC_DOUT, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
bd8f0fc9 TL |
627 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
628 | }; | |
0b50c691 TL |
629 | |
630 | static struct omap_device_pad serial2_pads[] __initdata = { | |
631 | { | |
632 | .name = "uart3_rx_irrx.uart3_rx_irrx", | |
633 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | |
634 | .enable = OMAP_MUX_MODE0, | |
635 | .idle = OMAP_MUX_MODE3 /* Mux as GPIO for idle */ | |
636 | }, | |
637 | }; | |
638 | ||
639 | static inline void board_serial_init(void) | |
640 | { | |
641 | struct omap_board_data bdata; | |
642 | ||
643 | bdata.flags = 0; | |
644 | bdata.pads = NULL; | |
645 | bdata.pads_cnt = 0; | |
646 | ||
647 | bdata.id = 0; | |
c86845db | 648 | omap_serial_init_port(&bdata, NULL); |
0b50c691 TL |
649 | |
650 | bdata.id = 1; | |
c86845db | 651 | omap_serial_init_port(&bdata, NULL); |
0b50c691 TL |
652 | |
653 | bdata.id = 2; | |
654 | bdata.pads = serial2_pads; | |
655 | bdata.pads_cnt = ARRAY_SIZE(serial2_pads); | |
c86845db | 656 | omap_serial_init_port(&bdata, NULL); |
0b50c691 TL |
657 | } |
658 | ||
659 | #else | |
660 | ||
661 | static inline void board_serial_init(void) | |
662 | { | |
663 | omap_serial_init(); | |
664 | } | |
665 | ||
bd8f0fc9 TL |
666 | #endif |
667 | ||
63138812 KV |
668 | static void __init n8x0_init_machine(void) |
669 | { | |
bd8f0fc9 | 670 | omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC); |
63138812 KV |
671 | /* FIXME: add n810 spi devices */ |
672 | spi_register_board_info(n800_spi_board_info, | |
673 | ARRAY_SIZE(n800_spi_board_info)); | |
a7f97d25 JN |
674 | omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1, |
675 | ARRAY_SIZE(n8x0_i2c_board_info_1)); | |
366498d4 JN |
676 | omap_register_i2c_bus(2, 400, NULL, 0); |
677 | if (machine_is_nokia_n810()) | |
678 | i2c_register_board_info(2, n810_i2c_board_info_2, | |
679 | ARRAY_SIZE(n810_i2c_board_info_2)); | |
0b50c691 | 680 | board_serial_init(); |
a4ca9dbe | 681 | omap_sdrc_init(NULL, NULL); |
a1a92e6f | 682 | gpmc_onenand_init(board_onenand_data); |
9418c65f | 683 | n8x0_mmc_init(); |
97b9ad16 | 684 | n8x0_usb_init(); |
63138812 KV |
685 | } |
686 | ||
687 | MACHINE_START(NOKIA_N800, "Nokia N800") | |
5e52b435 | 688 | .atag_offset = 0x100, |
71ee7dad | 689 | .reserve = omap_reserve, |
e990a406 | 690 | .map_io = omap242x_map_io, |
8f5b5a41 | 691 | .init_early = omap2420_init_early, |
741e3a89 | 692 | .init_irq = omap2_init_irq, |
6b2f55d7 | 693 | .handle_irq = omap2_intc_handle_irq, |
63138812 | 694 | .init_machine = n8x0_init_machine, |
bbd707ac | 695 | .init_late = omap2420_init_late, |
e74984e4 | 696 | .timer = &omap2_timer, |
baa95883 | 697 | .restart = omap_prcm_restart, |
63138812 KV |
698 | MACHINE_END |
699 | ||
700 | MACHINE_START(NOKIA_N810, "Nokia N810") | |
5e52b435 | 701 | .atag_offset = 0x100, |
71ee7dad | 702 | .reserve = omap_reserve, |
e990a406 | 703 | .map_io = omap242x_map_io, |
8f5b5a41 | 704 | .init_early = omap2420_init_early, |
741e3a89 | 705 | .init_irq = omap2_init_irq, |
6b2f55d7 | 706 | .handle_irq = omap2_intc_handle_irq, |
63138812 | 707 | .init_machine = n8x0_init_machine, |
bbd707ac | 708 | .init_late = omap2420_init_late, |
e74984e4 | 709 | .timer = &omap2_timer, |
baa95883 | 710 | .restart = omap_prcm_restart, |
63138812 KV |
711 | MACHINE_END |
712 | ||
713 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | |
5e52b435 | 714 | .atag_offset = 0x100, |
71ee7dad | 715 | .reserve = omap_reserve, |
e990a406 | 716 | .map_io = omap242x_map_io, |
8f5b5a41 | 717 | .init_early = omap2420_init_early, |
741e3a89 | 718 | .init_irq = omap2_init_irq, |
6b2f55d7 | 719 | .handle_irq = omap2_intc_handle_irq, |
63138812 | 720 | .init_machine = n8x0_init_machine, |
bbd707ac | 721 | .init_late = omap2420_init_late, |
e74984e4 | 722 | .timer = &omap2_timer, |
baa95883 | 723 | .restart = omap_prcm_restart, |
63138812 | 724 | MACHINE_END |