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Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
[deliverable/linux.git] / arch / arm / mach-omap2 / board-omap3evm.c
CommitLineData
53c5ec31
SMK		 1/*
2 * linux/arch/arm/mach-omap2/board-omap3evm.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/err.h>
20#include <linux/clk.h>
21#include <linux/gpio.h>
22#include <linux/input.h>
6135434a 23#include <linux/input/matrix_keypad.h>
53c5ec31 24#include <linux/leds.h>
562138a4 25#include <linux/interrupt.h>
53c5ec31 26
dc42c8bd
ZC		 27#include <linux/mtd/mtd.h>
28#include <linux/mtd/partitions.h>
29#include <linux/mtd/nand.h>
30
53c5ec31
SMK		 31#include <linux/spi/spi.h>
32#include <linux/spi/ads7846.h>
ebeb53e1 33#include <linux/i2c/twl.h>
e8e2ff46 34#include <linux/usb/otg.h>
e8c4a7ac 35#include <linux/usb/musb.h>
3fa4d734 36#include <linux/usb/usb_phy_gen_xceiv.h>
562138a4 37#include <linux/smsc911x.h>
53c5ec31 38
741927f7
ER		 39#include <linux/wl12xx.h>
40#include <linux/regulator/fixed.h>
1a7ec135 41#include <linux/regulator/machine.h>
3a63833e 42#include <linux/mmc/host.h>
dc28094b 43#include <linux/export.h>
51482be9 44#include <linux/usb/phy.h>
1a7ec135 45
53c5ec31
SMK		 46#include <asm/mach-types.h>
47#include <asm/mach/arch.h>
48#include <asm/mach/map.h>
49
2203747c 50#include <linux/platform_data/mtd-nand-omap2.h>
4e65331c 51#include "common.h"
2203747c 52#include <linux/platform_data/spi-omap2-mcspi.h>
a0b38cc4 53#include <video/omapdss.h>
a0d8dde9 54#include <video/omap-panel-data.h>
53c5ec31 55
e4c060db 56#include "soc.h"
ca5742bd 57#include "mux.h"
53c5ec31 58#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 59#include "hsmmc.h"
96974a24 60#include "common-board-devices.h"
2e618261
AM		 61#include "board-flash.h"
62
63#define NAND_CS 0
53c5ec31 64
c31cc1b7 65#define OMAP3_EVM_TS_GPIO 175
e8e51d29
AKG		 66#define OMAP3_EVM_EHCI_VBUS 22
67#define OMAP3_EVM_EHCI_SELECT 61
53c5ec31
SMK		 68
69#define OMAP3EVM_ETHR_START 0x2c000000
70#define OMAP3EVM_ETHR_SIZE 1024
db408023 71#define OMAP3EVM_ETHR_ID_REV 0x50
53c5ec31 72#define OMAP3EVM_ETHR_GPIO_IRQ 176
562138a4 73#define OMAP3EVM_SMSC911X_CS 5
9bc64b89
VH		 74/*
75 * Eth Reset signal
76 * 64 = Generation 1 (<=RevD)
77 * 7 = Generation 2 (>=RevE)
78 */
79#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
80#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
53c5ec31 81
e54adb1e
IG		 82/*
83 * OMAP35x EVM revision
84 * Run time detection of EVM revision is done by reading Ethernet
85 * PHY ID -
86 * GEN_1 = 0x01150000
87 * GEN_2 = 0x92200000
88 */
89enum {
90 OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
91 OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
92};
93
db408023
AKG		 94static u8 omap3_evm_version;
95
695f0117 96static u8 get_omap3_evm_rev(void)
db408023
AKG		 97{
98 return omap3_evm_version;
99}
db408023
AKG		 100
101static void __init omap3_evm_get_revision(void)
102{
103 void __iomem *ioaddr;
104 unsigned int smsc_id;
105
106 /* Ethernet PHY ID is stored at ID_REV register */
107 ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
108 if (!ioaddr)
109 return;
110 smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
111 iounmap(ioaddr);
112
113 switch (smsc_id) {
114 /*SMSC9115 chipset*/
115 case 0x01150000:
116 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
117 break;
118 /*SMSC 9220 chipset*/
119 case 0x92200000:
120 default:
121 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
122 }
123}
124
562138a4 125#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
ac839b3c 126#include "gpmc-smsc911x.h"
53c5ec31 127
21b42731
MR		 128static struct omap_smsc911x_platform_data smsc911x_cfg = {
129 .cs = OMAP3EVM_SMSC911X_CS,
130 .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
131 .gpio_reset = -EINVAL,
132 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
53c5ec31
SMK		 133};
134
562138a4 135static inline void __init omap3evm_init_smsc911x(void)
53c5ec31 136{
9bc64b89
VH		 137 /* Configure ethernet controller reset gpio */
138 if (cpu_is_omap3430()) {
21b42731
MR		 139 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
140 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
141 else
142 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
53c5ec31
SMK		 143 }
144
21b42731 145 gpmc_smsc911x_init(&smsc911x_cfg);
53c5ec31
SMK		 146}
147
562138a4
S		 148#else
149static inline void __init omap3evm_init_smsc911x(void) { return; }
150#endif
151
703e3061
VH		 152/*
153 * OMAP3EVM LCD Panel control signals
154 */
155#define OMAP3EVM_LCD_PANEL_LR 2
156#define OMAP3EVM_LCD_PANEL_UD 3
157#define OMAP3EVM_LCD_PANEL_INI 152
703e3061
VH		 158#define OMAP3EVM_LCD_PANEL_QVGA 154
159#define OMAP3EVM_LCD_PANEL_RESB 155
fde38254
AT		 160
161#define OMAP3EVM_LCD_PANEL_ENVDD 153
703e3061 162#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
fde38254
AT		 163
164/*
165 * OMAP3EVM DVI control signals
166 */
703e3061
VH		 167#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
168
8fb61e8d 169#ifdef CONFIG_BROKEN
703e3061
VH		 170static void __init omap3_evm_display_init(void)
171{
172 int r;
173
fde38254
AT		 174 r = gpio_request_one(OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW,
175 "lcd_panel_envdd");
bc593f5d 176 if (r)
fde38254 177 pr_err("failed to get lcd_panel_envdd GPIO\n");
703e3061 178
fde38254
AT		 179 r = gpio_request_one(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO,
180 GPIOF_OUT_INIT_LOW, "lcd_panel_bklight");
181 if (r)
182 pr_err("failed to get lcd_panel_bklight GPIO\n");
703e3061
VH		 183
184 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
f186e9b2 185 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
703e3061 186 else
f186e9b2 187 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
703e3061 188}
8fb61e8d 189#endif
703e3061 190
eb11d29e
TV		 191static struct panel_sharp_ls037v7dw01_platform_data omap3_evm_lcd_pdata = {
192 .name = "lcd",
193 .source = "dpi.0",
194
195 .data_lines = 18,
196
197 .resb_gpio = OMAP3EVM_LCD_PANEL_RESB,
198 .ini_gpio = OMAP3EVM_LCD_PANEL_INI,
199 .mo_gpio = OMAP3EVM_LCD_PANEL_QVGA,
200 .lr_gpio = OMAP3EVM_LCD_PANEL_LR,
201 .ud_gpio = OMAP3EVM_LCD_PANEL_UD,
202};
203
204static struct platform_device omap3_evm_lcd_device = {
205 .name = "panel-sharp-ls037v7dw01",
206 .id = 0,
207 .dev.platform_data = &omap3_evm_lcd_pdata,
208};
209
210static struct connector_dvi_platform_data omap3_evm_dvi_connector_pdata = {
211 .name = "dvi",
212 .source = "tfp410.0",
213 .i2c_bus_num = -1,
214};
215
216static struct platform_device omap3_evm_dvi_connector_device = {
217 .name = "connector-dvi",
218 .id = 0,
219 .dev.platform_data = &omap3_evm_dvi_connector_pdata,
703e3061
VH		 220};
221
eb11d29e
TV		 222static struct encoder_tfp410_platform_data omap3_evm_tfp410_pdata = {
223 .name = "tfp410.0",
224 .source = "dpi.0",
225 .data_lines = 24,
226 .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
703e3061
VH		 227};
228
eb11d29e
TV		 229static struct platform_device omap3_evm_tfp410_device = {
230 .name = "tfp410",
231 .id = 0,
232 .dev.platform_data = &omap3_evm_tfp410_pdata,
89747c91
BW		 233};
234
eb11d29e
TV		 235static struct connector_atv_platform_data omap3_evm_tv_pdata = {
236 .name = "tv",
237 .source = "venc.0",
238 .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
239 .invert_polarity = false,
703e3061
VH		 240};
241
eb11d29e
TV		 242static struct platform_device omap3_evm_tv_connector_device = {
243 .name = "connector-analog-tv",
244 .id = 0,
245 .dev.platform_data = &omap3_evm_tv_pdata,
703e3061
VH		 246};
247
248static struct omap_dss_board_info omap3_evm_dss_data = {
eb11d29e 249 .default_display_name = "lcd",
703e3061
VH		 250};
251
786b01a8
OD		 252static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
253 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
1a7ec135
MR		 254};
255
786b01a8
OD		 256static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
257 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
1a7ec135
MR		 258};
259
260/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
261static struct regulator_init_data omap3evm_vmmc1 = {
262 .constraints = {
263 .min_uV = 1850000,
264 .max_uV = 3150000,
265 .valid_modes_mask = REGULATOR_MODE_NORMAL
266 | REGULATOR_MODE_STANDBY,
267 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
268 | REGULATOR_CHANGE_MODE
269 | REGULATOR_CHANGE_STATUS,
270 },
786b01a8
OD		 271 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
272 .consumer_supplies = omap3evm_vmmc1_supply,
1a7ec135
MR		 273};
274
275/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
276static struct regulator_init_data omap3evm_vsim = {
277 .constraints = {
278 .min_uV = 1800000,
279 .max_uV = 3000000,
280 .valid_modes_mask = REGULATOR_MODE_NORMAL
281 | REGULATOR_MODE_STANDBY,
282 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
283 | REGULATOR_CHANGE_MODE
284 | REGULATOR_CHANGE_STATUS,
285 },
786b01a8
OD		 286 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
287 .consumer_supplies = omap3evm_vsim_supply,
1a7ec135
MR		 288};
289
68ff0423 290static struct omap2_hsmmc_info mmc[] = {
53c5ec31
SMK		 291 {
292 .mmc = 1,
3a63833e 293 .caps = MMC_CAP_4_BIT_DATA,
53c5ec31
SMK		 294 .gpio_cd = -EINVAL,
295 .gpio_wp = 63,
3b972bf0 296 .deferred = true,
53c5ec31 297 },
6cc9efed 298#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7
ER		 299 {
300 .name = "wl1271",
aca6ad07 301 .mmc = 2,
741927f7
ER		 302 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
303 .gpio_wp = -EINVAL,
304 .gpio_cd = -EINVAL,
305 .nonremovable = true,
306 },
307#endif
53c5ec31
SMK		 308 {} /* Terminator */
309};
310
311static struct gpio_led gpio_leds[] = {
312 {
313 .name = "omap3evm::ledb",
314 /* normally not visible (board underside) */
315 .default_trigger = "default-on",
316 .gpio = -EINVAL, /* gets replaced */
317 .active_low = true,
318 },
319};
320
321static struct gpio_led_platform_data gpio_led_info = {
322 .leds = gpio_leds,
323 .num_leds = ARRAY_SIZE(gpio_leds),
324};
325
326static struct platform_device leds_gpio = {
327 .name = "leds-gpio",
328 .id = -1,
329 .dev = {
330 .platform_data = &gpio_led_info,
331 },
332};
333
334
335static int omap3evm_twl_gpio_setup(struct device *dev,
336 unsigned gpio, unsigned ngpio)
337{
bc593f5d 338 int r, lcd_bl_en;
42fc8cab 339
53c5ec31 340 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
53c5ec31 341 mmc[0].gpio_cd = gpio + 0;
3b972bf0 342 omap_hsmmc_late_init(mmc);
53c5ec31
SMK		 343
344 /*
345 * Most GPIOs are for USB OTG. Some are mostly sent to
346 * the P2 connector; notably LEDA for the LCD backlight.
347 */
348
703e3061 349 /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
bc593f5d
IG		 350 lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
351 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
352 r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
42fc8cab
VH		 353 if (r)
354 printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
703e3061
VH		 355
356 /* gpio + 7 == DVI Enable */
bc593f5d 357 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
703e3061 358
53c5ec31 359 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
ebe8f7e5 360 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
53c5ec31
SMK		 361
362 platform_device_register(&leds_gpio);
363
cb8ca589
ZC		 364 /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
365 * for starting USB tranceiver
366 */
b103a2e2 367#ifdef CONFIG_TWL4030_CORE
cb8ca589
ZC		 368 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
369 u8 val;
370
371 twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
372 val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
373 twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
374 }
b103a2e2 375#endif
cb8ca589 376
53c5ec31
SMK		 377 return 0;
378}
379
380static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
53c5ec31
SMK		 381 .use_leds = true,
382 .setup = omap3evm_twl_gpio_setup,
383};
384
bead4375 385static uint32_t board_keymap[] = {
53c5ec31 386 KEY(0, 0, KEY_LEFT),
0621d756
SP		 387 KEY(0, 1, KEY_DOWN),
388 KEY(0, 2, KEY_ENTER),
389 KEY(0, 3, KEY_M),
390
391 KEY(1, 0, KEY_RIGHT),
53c5ec31 392 KEY(1, 1, KEY_UP),
0621d756
SP		 393 KEY(1, 2, KEY_I),
394 KEY(1, 3, KEY_N),
395
396 KEY(2, 0, KEY_A),
397 KEY(2, 1, KEY_E),
53c5ec31 398 KEY(2, 2, KEY_J),
0621d756
SP		 399 KEY(2, 3, KEY_O),
400
401 KEY(3, 0, KEY_B),
402 KEY(3, 1, KEY_F),
403 KEY(3, 2, KEY_K),
53c5ec31
SMK		 404 KEY(3, 3, KEY_P)
405};
406
4f543332
TL		 407static struct matrix_keymap_data board_map_data = {
408 .keymap = board_keymap,
409 .keymap_size = ARRAY_SIZE(board_keymap),
410};
411
53c5ec31 412static struct twl4030_keypad_data omap3evm_kp_data = {
4f543332 413 .keymap_data = &board_map_data,
53c5ec31
SMK		 414 .rows = 4,
415 .cols = 4,
53c5ec31
SMK		 416 .rep = 1,
417};
418
410491d4 419/* ads7846 on SPI */
786b01a8
OD		 420static struct regulator_consumer_supply omap3evm_vio_supply[] = {
421 REGULATOR_SUPPLY("vcc", "spi1.0"),
422};
410491d4
VH		 423
424/* VIO for ads7846 */
425static struct regulator_init_data omap3evm_vio = {
426 .constraints = {
427 .min_uV = 1800000,
428 .max_uV = 1800000,
429 .apply_uV = true,
430 .valid_modes_mask = REGULATOR_MODE_NORMAL
431 | REGULATOR_MODE_STANDBY,
432 .valid_ops_mask = REGULATOR_CHANGE_MODE
433 | REGULATOR_CHANGE_STATUS,
434 },
786b01a8
OD		 435 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
436 .consumer_supplies = omap3evm_vio_supply,
410491d4
VH		 437};
438
6cc9efed 439#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7
ER		 440
441#define OMAP3EVM_WLAN_PMENA_GPIO (150)
442#define OMAP3EVM_WLAN_IRQ_GPIO (149)
443
786b01a8 444static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
d19f579a 445 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
786b01a8 446};
741927f7
ER		 447
448/* VMMC2 for driving the WL12xx module */
449static struct regulator_init_data omap3evm_vmmc2 = {
450 .constraints = {
451 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
452 },
d19f579a 453 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
786b01a8 454 .consumer_supplies = omap3evm_vmmc2_supply,
741927f7
ER		 455};
456
457static struct fixed_voltage_config omap3evm_vwlan = {
458 .supply_name = "vwl1271",
459 .microvolts = 1800000, /* 1.80V */
460 .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
461 .startup_delay = 70000, /* 70ms */
462 .enable_high = 1,
463 .enabled_at_boot = 0,
464 .init_data = &omap3evm_vmmc2,
465};
466
aca6ad07 467static struct platform_device omap3evm_wlan_regulator = {
741927f7
ER		 468 .name = "reg-fixed-voltage",
469 .id = 1,
470 .dev = {
471 .platform_data = &omap3evm_vwlan,
472 },
473};
474
475struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
aca6ad07 476 .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
741927f7
ER		 477};
478#endif
479
497af1f3
ZC		 480/* VAUX2 for USB */
481static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
482 REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
483 REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
3fa4d734 484 REGULATOR_SUPPLY("vcc", "usb_phy_gen_xceiv.2"), /* hsusb port 2 */
497af1f3
ZC		 485 REGULATOR_SUPPLY("vaux2", NULL),
486};
487
488static struct regulator_init_data omap3evm_vaux2 = {
489 .constraints = {
490 .min_uV = 2800000,
491 .max_uV = 2800000,
492 .apply_uV = true,
493 .valid_modes_mask = REGULATOR_MODE_NORMAL
494 | REGULATOR_MODE_STANDBY,
495 .valid_ops_mask = REGULATOR_CHANGE_MODE
496 | REGULATOR_CHANGE_STATUS,
497 },
498 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
499 .consumer_supplies = omap3evm_vaux2_supplies,
500};
501
53c5ec31 502static struct twl4030_platform_data omap3evm_twldata = {
53c5ec31
SMK		 503 /* platform_data for children goes here */
504 .keypad = &omap3evm_kp_data,
53c5ec31 505 .gpio = &omap3evm_gpio_data,
410491d4 506 .vio = &omap3evm_vio,
fbd8071c
MR		 507 .vmmc1 = &omap3evm_vmmc1,
508 .vsim = &omap3evm_vsim,
53c5ec31
SMK		 509};
510
511static int __init omap3_evm_i2c_init(void)
512{
827ed9ae 513 omap3_pmic_get_config(&omap3evm_twldata,
b252b0ef
PU		 514 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
515 TWL_COMMON_PDATA_AUDIO,
516 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
517
518 omap3evm_twldata.vdac->constraints.apply_uV = true;
519 omap3evm_twldata.vpll2->constraints.apply_uV = true;
520
fbd8071c 521 omap3_pmic_init("twl4030", &omap3evm_twldata);
53c5ec31
SMK		 522 omap_register_i2c_bus(2, 400, NULL, 0);
523 omap_register_i2c_bus(3, 400, NULL, 0);
524 return 0;
525}
526
6ef818ee
RQ		 527static struct usbhs_phy_data phy_data[] __initdata = {
528 {
529 .port = 2,
530 .reset_gpio = -1, /* set at runtime */
531 .vcc_gpio = -EINVAL,
532 },
533};
58a5491c 534
6ef818ee 535static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
181b250c 536 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
58a5491c
FB		 537};
538
ca5742bd 539#ifdef CONFIG_OMAP_MUX
904c545c 540static struct omap_board_mux omap35x_board_mux[] __initdata = {
aa6912d8 541 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 542 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 543 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 544 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 545 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
546 OMAP_PIN_OFF_WAKEUPENABLE),
9bc64b89
VH		 547 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
548 OMAP_PIN_OFF_NONE),
549 OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
550 OMAP_PIN_OFF_NONE),
6cc9efed 551#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7 552 /* WLAN IRQ - GPIO 149 */
aca6ad07 553 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
741927f7
ER		 554
555 /* WLAN POWER ENABLE - GPIO 150 */
556 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
557
558 /* MMC2 SDIO pin muxes for WL12xx */
559 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
560 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
561 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
562 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
563 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
564 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
565#endif
ca5742bd
TL		 566 { .reg_offset = OMAP_MUX_TERMINATOR },
567};
904c545c
VH		 568
569static struct omap_board_mux omap36x_board_mux[] __initdata = {
aa6912d8 570 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 571 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 572 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 573 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 574 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
575 OMAP_PIN_OFF_WAKEUPENABLE),
904c545c
VH		 576 /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
577 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
578 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
579 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
580 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
581 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
582 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
583 OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
584 OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
585 OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
586 OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
587 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
588 OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
6cc9efed 589#ifdef CONFIG_WILINK_PLATFORM_DATA
aca6ad07
ER		 590 /* WLAN IRQ - GPIO 149 */
591 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
592
593 /* WLAN POWER ENABLE - GPIO 150 */
594 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
595
596 /* MMC2 SDIO pin muxes for WL12xx */
597 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
598 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
599 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
600 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
601 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
602 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
603#endif
904c545c 604
ca5742bd
TL		 605 { .reg_offset = OMAP_MUX_TERMINATOR },
606};
904c545c
VH		 607#else
608#define omap35x_board_mux NULL
609#define omap36x_board_mux NULL
ca5742bd
TL		 610#endif
611
884b8369
MM		 612static struct omap_musb_board_data musb_board_data = {
613 .interface_type = MUSB_INTERFACE_ULPI,
614 .mode = MUSB_OTG,
615 .power = 100,
616};
617
bc593f5d
IG		 618static struct gpio omap3_evm_ehci_gpios[] __initdata = {
619 { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
620 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
621};
622
70d669de
RK		 623static void __init omap3_evm_wl12xx_init(void)
624{
6cc9efed 625#ifdef CONFIG_WILINK_PLATFORM_DATA
70d669de
RK		 626 int ret;
627
628 /* WL12xx WLAN Init */
46a0a540 629 omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
70d669de
RK		 630 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
631 if (ret)
632 pr_err("error setting wl12xx data: %d\n", ret);
633 ret = platform_device_register(&omap3evm_wlan_regulator);
634 if (ret)
635 pr_err("error registering wl12xx device: %d\n", ret);
636#endif
637}
638
5b3689f4
RD		 639static struct regulator_consumer_supply dummy_supplies[] = {
640 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
641 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
642};
643
dc42c8bd
ZC		 644static struct mtd_partition omap3evm_nand_partitions[] = {
645 /* All the partition sizes are listed in terms of NAND block size */
646 {
647 .name = "X-Loader",
648 .offset = 0,
649 .size = 4*(SZ_128K),
650 .mask_flags = MTD_WRITEABLE
651 },
652 {
653 .name = "U-Boot",
654 .offset = MTDPART_OFS_APPEND,
655 .size = 14*(SZ_128K),
656 .mask_flags = MTD_WRITEABLE
657 },
658 {
659 .name = "U-Boot Env",
660 .offset = MTDPART_OFS_APPEND,
661 .size = 2*(SZ_128K)
662 },
663 {
664 .name = "Kernel",
665 .offset = MTDPART_OFS_APPEND,
666 .size = 40*(SZ_128K)
667 },
668 {
669 .name = "File system",
670 .size = MTDPART_SIZ_FULL,
671 .offset = MTDPART_OFS_APPEND,
672 },
673};
674
53c5ec31
SMK		 675static void __init omap3_evm_init(void)
676{
eeb3711b
PW		 677 struct omap_board_mux *obm;
678
db408023 679 omap3_evm_get_revision();
5b3689f4 680 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
904c545c 681
eeb3711b
PW		 682 obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
683 omap3_mux_init(obm, OMAP_PACKAGE_CBB);
db408023 684
d1589f09 685 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
3b972bf0 686 omap_hsmmc_init(mmc);
d1589f09 687
497af1f3
ZC		 688 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
689 omap3evm_twldata.vaux2 = &omap3evm_vaux2;
690
53c5ec31
SMK		 691 omap3_evm_i2c_init();
692
d5e13227 693 omap_display_init(&omap3_evm_dss_data);
eb11d29e
TV		 694 platform_device_register(&omap3_evm_lcd_device);
695 platform_device_register(&omap3_evm_tfp410_device);
696 platform_device_register(&omap3_evm_dvi_connector_device);
697 platform_device_register(&omap3_evm_tv_connector_device);
53c5ec31 698
53c5ec31 699 omap_serial_init();
a4ca9dbe 700 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
1a4f4637 701
e8e2ff46
GAK		 702 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
703 usb_nop_xceiv_register();
1a4f4637 704
e8e51d29
AKG		 705 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
706 /* enable EHCI VBUS using GPIO22 */
bc593f5d 707 omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
e8e51d29 708 /* Select EHCI port on main board */
bc593f5d
IG		 709 omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
710 OMAP_PIN_INPUT_PULLUP);
711 gpio_request_array(omap3_evm_ehci_gpios,
712 ARRAY_SIZE(omap3_evm_ehci_gpios));
e8e51d29
AKG		 713
714 /* setup EHCI phy reset config */
4896e394 715 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
6ef818ee 716 phy_data[0].reset_gpio = 21;
e8e51d29 717
58815fa3
AKG		 718 /* EVM REV >= E can supply 500mA with EXTVBUS programming */
719 musb_board_data.power = 500;
720 musb_board_data.extvbus = 1;
e8e51d29
AKG		 721 } else {
722 /* setup EHCI phy reset on MDC */
4896e394 723 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
6ef818ee 724 phy_data[0].reset_gpio = 135;
e8e51d29 725 }
51482be9 726 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
884b8369 727 usb_musb_init(&musb_board_data);
6ef818ee
RQ		 728
729 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
9e64bb1e 730 usbhs_init(&usbhs_bdata);
2e618261
AM		 731 board_nand_init(omap3evm_nand_partitions,
732 ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
733 NAND_BUSWIDTH_16, NULL);
dc42c8bd 734
96974a24 735 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
562138a4 736 omap3evm_init_smsc911x();
8fb61e8d 737#ifdef CONFIG_BROKEN
703e3061 738 omap3_evm_display_init();
8fb61e8d 739#endif
70d669de 740 omap3_evm_wl12xx_init();
40234bf7 741 omap_twl4030_audio_init("omap3evm", NULL);
53c5ec31
SMK		 742}
743
53c5ec31
SMK		 744MACHINE_START(OMAP3EVM, "OMAP3 EVM")
745 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
5e52b435 746 .atag_offset = 0x100,
71ee7dad 747 .reserve = omap_reserve,
3dc3bad6 748 .map_io = omap3_map_io,
8f5b5a41 749 .init_early = omap35xx_init_early,
741e3a89 750 .init_irq = omap3_init_irq,
6b2f55d7 751 .handle_irq = omap3_intc_handle_irq,
53c5ec31 752 .init_machine = omap3_evm_init,
bbd707ac 753 .init_late = omap35xx_init_late,
6bb27d73 754 .init_time = omap3_sync32k_timer_init,
187e3e06 755 .restart = omap3xxx_restart,
53c5ec31 756MACHINE_END
Linux kernel - Deliverables
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