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Merge branch 'for-rmk/perf' into for-rmk/virt/kvm/core
[deliverable/linux.git] / arch / arm / mach-omap2 / board-omap3evm.c
CommitLineData
53c5ec31
SMK		 1/*
2 * linux/arch/arm/mach-omap2/board-omap3evm.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/err.h>
20#include <linux/clk.h>
21#include <linux/gpio.h>
22#include <linux/input.h>
6135434a 23#include <linux/input/matrix_keypad.h>
53c5ec31 24#include <linux/leds.h>
562138a4 25#include <linux/interrupt.h>
53c5ec31 26
dc42c8bd
ZC		 27#include <linux/mtd/mtd.h>
28#include <linux/mtd/partitions.h>
29#include <linux/mtd/nand.h>
30
53c5ec31
SMK		 31#include <linux/spi/spi.h>
32#include <linux/spi/ads7846.h>
ebeb53e1 33#include <linux/i2c/twl.h>
e8e2ff46 34#include <linux/usb/otg.h>
e8c4a7ac 35#include <linux/usb/musb.h>
78c289f8 36#include <linux/usb/nop-usb-xceiv.h>
562138a4 37#include <linux/smsc911x.h>
53c5ec31 38
741927f7
ER		 39#include <linux/wl12xx.h>
40#include <linux/regulator/fixed.h>
1a7ec135 41#include <linux/regulator/machine.h>
3a63833e 42#include <linux/mmc/host.h>
dc28094b 43#include <linux/export.h>
1a7ec135 44
53c5ec31
SMK		 45#include <asm/mach-types.h>
46#include <asm/mach/arch.h>
47#include <asm/mach/map.h>
48
2203747c 49#include <linux/platform_data/mtd-nand-omap2.h>
4e65331c 50#include "common.h"
2203747c 51#include <linux/platform_data/spi-omap2-mcspi.h>
a0b38cc4 52#include <video/omapdss.h>
dac8eb5f 53#include <video/omap-panel-tfp410.h>
53c5ec31 54
e4c060db 55#include "soc.h"
ca5742bd 56#include "mux.h"
53c5ec31 57#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 58#include "hsmmc.h"
96974a24 59#include "common-board-devices.h"
2e618261
AM		 60#include "board-flash.h"
61
62#define NAND_CS 0
53c5ec31 63
c31cc1b7 64#define OMAP3_EVM_TS_GPIO 175
e8e51d29
AKG		 65#define OMAP3_EVM_EHCI_VBUS 22
66#define OMAP3_EVM_EHCI_SELECT 61
53c5ec31
SMK		 67
68#define OMAP3EVM_ETHR_START 0x2c000000
69#define OMAP3EVM_ETHR_SIZE 1024
db408023 70#define OMAP3EVM_ETHR_ID_REV 0x50
53c5ec31 71#define OMAP3EVM_ETHR_GPIO_IRQ 176
562138a4 72#define OMAP3EVM_SMSC911X_CS 5
9bc64b89
VH		 73/*
74 * Eth Reset signal
75 * 64 = Generation 1 (<=RevD)
76 * 7 = Generation 2 (>=RevE)
77 */
78#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
79#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
53c5ec31 80
e54adb1e
IG		 81/*
82 * OMAP35x EVM revision
83 * Run time detection of EVM revision is done by reading Ethernet
84 * PHY ID -
85 * GEN_1 = 0x01150000
86 * GEN_2 = 0x92200000
87 */
88enum {
89 OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
90 OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
91};
92
db408023
AKG		 93static u8 omap3_evm_version;
94
695f0117 95static u8 get_omap3_evm_rev(void)
db408023
AKG		 96{
97 return omap3_evm_version;
98}
db408023
AKG		 99
100static void __init omap3_evm_get_revision(void)
101{
102 void __iomem *ioaddr;
103 unsigned int smsc_id;
104
105 /* Ethernet PHY ID is stored at ID_REV register */
106 ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
107 if (!ioaddr)
108 return;
109 smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
110 iounmap(ioaddr);
111
112 switch (smsc_id) {
113 /*SMSC9115 chipset*/
114 case 0x01150000:
115 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
116 break;
117 /*SMSC 9220 chipset*/
118 case 0x92200000:
119 default:
120 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
121 }
122}
123
562138a4 124#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
ac839b3c 125#include "gpmc-smsc911x.h"
53c5ec31 126
21b42731
MR		 127static struct omap_smsc911x_platform_data smsc911x_cfg = {
128 .cs = OMAP3EVM_SMSC911X_CS,
129 .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
130 .gpio_reset = -EINVAL,
131 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
53c5ec31
SMK		 132};
133
562138a4 134static inline void __init omap3evm_init_smsc911x(void)
53c5ec31 135{
9bc64b89
VH		 136 /* Configure ethernet controller reset gpio */
137 if (cpu_is_omap3430()) {
21b42731
MR		 138 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
139 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
140 else
141 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
53c5ec31
SMK		 142 }
143
21b42731 144 gpmc_smsc911x_init(&smsc911x_cfg);
53c5ec31
SMK		 145}
146
562138a4
S		 147#else
148static inline void __init omap3evm_init_smsc911x(void) { return; }
149#endif
150
703e3061
VH		 151/*
152 * OMAP3EVM LCD Panel control signals
153 */
154#define OMAP3EVM_LCD_PANEL_LR 2
155#define OMAP3EVM_LCD_PANEL_UD 3
156#define OMAP3EVM_LCD_PANEL_INI 152
157#define OMAP3EVM_LCD_PANEL_ENVDD 153
158#define OMAP3EVM_LCD_PANEL_QVGA 154
159#define OMAP3EVM_LCD_PANEL_RESB 155
160#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
161#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
162
bc593f5d
IG		 163static struct gpio omap3_evm_dss_gpios[] __initdata = {
164 { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" },
165 { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" },
166 { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" },
167 { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" },
168 { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" },
169 { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
170};
171
703e3061
VH		 172static int lcd_enabled;
173static int dvi_enabled;
174
175static void __init omap3_evm_display_init(void)
176{
177 int r;
178
bc593f5d
IG		 179 r = gpio_request_array(omap3_evm_dss_gpios,
180 ARRAY_SIZE(omap3_evm_dss_gpios));
181 if (r)
182 printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
703e3061
VH		 183}
184
185static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
186{
187 if (dvi_enabled) {
188 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
189 return -EINVAL;
190 }
191 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
192
193 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
f186e9b2 194 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
703e3061 195 else
f186e9b2 196 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
703e3061
VH		 197
198 lcd_enabled = 1;
199 return 0;
200}
201
202static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
203{
204 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
205
206 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
f186e9b2 207 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
703e3061 208 else
f186e9b2 209 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
703e3061
VH		 210
211 lcd_enabled = 0;
212}
213
214static struct omap_dss_device omap3_evm_lcd_device = {
215 .name = "lcd",
216 .driver_name = "sharp_ls_panel",
217 .type = OMAP_DISPLAY_TYPE_DPI,
218 .phy.dpi.data_lines = 18,
219 .platform_enable = omap3_evm_enable_lcd,
220 .platform_disable = omap3_evm_disable_lcd,
221};
222
223static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
224{
225 return 0;
226}
227
228static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
229{
230}
231
232static struct omap_dss_device omap3_evm_tv_device = {
233 .name = "tv",
234 .driver_name = "venc",
235 .type = OMAP_DISPLAY_TYPE_VENC,
236 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
237 .platform_enable = omap3_evm_enable_tv,
238 .platform_disable = omap3_evm_disable_tv,
239};
240
2e6f2ee7 241static struct tfp410_platform_data dvi_panel = {
e813a55e 242 .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
ca2e16fa 243 .i2c_bus_num = -1,
89747c91
BW		 244};
245
703e3061
VH		 246static struct omap_dss_device omap3_evm_dvi_device = {
247 .name = "dvi",
703e3061 248 .type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7 249 .driver_name = "tfp410",
89747c91 250 .data = &dvi_panel,
703e3061 251 .phy.dpi.data_lines = 24,
703e3061
VH		 252};
253
254static struct omap_dss_device *omap3_evm_dss_devices[] = {
255 &omap3_evm_lcd_device,
256 &omap3_evm_tv_device,
257 &omap3_evm_dvi_device,
258};
259
260static struct omap_dss_board_info omap3_evm_dss_data = {
261 .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
262 .devices = omap3_evm_dss_devices,
263 .default_device = &omap3_evm_lcd_device,
264};
265
786b01a8
OD		 266static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
267 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
1a7ec135
MR		 268};
269
786b01a8
OD		 270static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
271 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
1a7ec135
MR		 272};
273
274/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
275static struct regulator_init_data omap3evm_vmmc1 = {
276 .constraints = {
277 .min_uV = 1850000,
278 .max_uV = 3150000,
279 .valid_modes_mask = REGULATOR_MODE_NORMAL
280 | REGULATOR_MODE_STANDBY,
281 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
282 | REGULATOR_CHANGE_MODE
283 | REGULATOR_CHANGE_STATUS,
284 },
786b01a8
OD		 285 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
286 .consumer_supplies = omap3evm_vmmc1_supply,
1a7ec135
MR		 287};
288
289/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
290static struct regulator_init_data omap3evm_vsim = {
291 .constraints = {
292 .min_uV = 1800000,
293 .max_uV = 3000000,
294 .valid_modes_mask = REGULATOR_MODE_NORMAL
295 | REGULATOR_MODE_STANDBY,
296 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
297 | REGULATOR_CHANGE_MODE
298 | REGULATOR_CHANGE_STATUS,
299 },
786b01a8
OD		 300 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
301 .consumer_supplies = omap3evm_vsim_supply,
1a7ec135
MR		 302};
303
68ff0423 304static struct omap2_hsmmc_info mmc[] = {
53c5ec31
SMK		 305 {
306 .mmc = 1,
3a63833e 307 .caps = MMC_CAP_4_BIT_DATA,
53c5ec31
SMK		 308 .gpio_cd = -EINVAL,
309 .gpio_wp = 63,
3b972bf0 310 .deferred = true,
53c5ec31 311 },
741927f7
ER		 312#ifdef CONFIG_WL12XX_PLATFORM_DATA
313 {
314 .name = "wl1271",
aca6ad07 315 .mmc = 2,
741927f7
ER		 316 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
317 .gpio_wp = -EINVAL,
318 .gpio_cd = -EINVAL,
319 .nonremovable = true,
320 },
321#endif
53c5ec31
SMK		 322 {} /* Terminator */
323};
324
325static struct gpio_led gpio_leds[] = {
326 {
327 .name = "omap3evm::ledb",
328 /* normally not visible (board underside) */
329 .default_trigger = "default-on",
330 .gpio = -EINVAL, /* gets replaced */
331 .active_low = true,
332 },
333};
334
335static struct gpio_led_platform_data gpio_led_info = {
336 .leds = gpio_leds,
337 .num_leds = ARRAY_SIZE(gpio_leds),
338};
339
340static struct platform_device leds_gpio = {
341 .name = "leds-gpio",
342 .id = -1,
343 .dev = {
344 .platform_data = &gpio_led_info,
345 },
346};
347
348
349static int omap3evm_twl_gpio_setup(struct device *dev,
350 unsigned gpio, unsigned ngpio)
351{
bc593f5d 352 int r, lcd_bl_en;
42fc8cab 353
53c5ec31 354 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
53c5ec31 355 mmc[0].gpio_cd = gpio + 0;
3b972bf0 356 omap_hsmmc_late_init(mmc);
53c5ec31
SMK		 357
358 /*
359 * Most GPIOs are for USB OTG. Some are mostly sent to
360 * the P2 connector; notably LEDA for the LCD backlight.
361 */
362
703e3061 363 /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
bc593f5d
IG		 364 lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
365 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
366 r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
42fc8cab
VH		 367 if (r)
368 printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
703e3061
VH		 369
370 /* gpio + 7 == DVI Enable */
bc593f5d 371 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
703e3061 372
53c5ec31 373 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
ebe8f7e5 374 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
53c5ec31
SMK		 375
376 platform_device_register(&leds_gpio);
377
cb8ca589
ZC		 378 /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
379 * for starting USB tranceiver
380 */
b103a2e2 381#ifdef CONFIG_TWL4030_CORE
cb8ca589
ZC		 382 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
383 u8 val;
384
385 twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
386 val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
387 twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
388 }
b103a2e2 389#endif
cb8ca589 390
53c5ec31
SMK		 391 return 0;
392}
393
394static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
53c5ec31
SMK		 395 .use_leds = true,
396 .setup = omap3evm_twl_gpio_setup,
397};
398
bead4375 399static uint32_t board_keymap[] = {
53c5ec31 400 KEY(0, 0, KEY_LEFT),
0621d756
SP		 401 KEY(0, 1, KEY_DOWN),
402 KEY(0, 2, KEY_ENTER),
403 KEY(0, 3, KEY_M),
404
405 KEY(1, 0, KEY_RIGHT),
53c5ec31 406 KEY(1, 1, KEY_UP),
0621d756
SP		 407 KEY(1, 2, KEY_I),
408 KEY(1, 3, KEY_N),
409
410 KEY(2, 0, KEY_A),
411 KEY(2, 1, KEY_E),
53c5ec31 412 KEY(2, 2, KEY_J),
0621d756
SP		 413 KEY(2, 3, KEY_O),
414
415 KEY(3, 0, KEY_B),
416 KEY(3, 1, KEY_F),
417 KEY(3, 2, KEY_K),
53c5ec31
SMK		 418 KEY(3, 3, KEY_P)
419};
420
4f543332
TL		 421static struct matrix_keymap_data board_map_data = {
422 .keymap = board_keymap,
423 .keymap_size = ARRAY_SIZE(board_keymap),
424};
425
53c5ec31 426static struct twl4030_keypad_data omap3evm_kp_data = {
4f543332 427 .keymap_data = &board_map_data,
53c5ec31
SMK		 428 .rows = 4,
429 .cols = 4,
53c5ec31
SMK		 430 .rep = 1,
431};
432
410491d4 433/* ads7846 on SPI */
786b01a8
OD		 434static struct regulator_consumer_supply omap3evm_vio_supply[] = {
435 REGULATOR_SUPPLY("vcc", "spi1.0"),
436};
410491d4
VH		 437
438/* VIO for ads7846 */
439static struct regulator_init_data omap3evm_vio = {
440 .constraints = {
441 .min_uV = 1800000,
442 .max_uV = 1800000,
443 .apply_uV = true,
444 .valid_modes_mask = REGULATOR_MODE_NORMAL
445 | REGULATOR_MODE_STANDBY,
446 .valid_ops_mask = REGULATOR_CHANGE_MODE
447 | REGULATOR_CHANGE_STATUS,
448 },
786b01a8
OD		 449 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
450 .consumer_supplies = omap3evm_vio_supply,
410491d4
VH		 451};
452
741927f7
ER		 453#ifdef CONFIG_WL12XX_PLATFORM_DATA
454
455#define OMAP3EVM_WLAN_PMENA_GPIO (150)
456#define OMAP3EVM_WLAN_IRQ_GPIO (149)
457
786b01a8 458static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
d19f579a 459 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
786b01a8 460};
741927f7
ER		 461
462/* VMMC2 for driving the WL12xx module */
463static struct regulator_init_data omap3evm_vmmc2 = {
464 .constraints = {
465 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
466 },
d19f579a 467 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
786b01a8 468 .consumer_supplies = omap3evm_vmmc2_supply,
741927f7
ER		 469};
470
471static struct fixed_voltage_config omap3evm_vwlan = {
472 .supply_name = "vwl1271",
473 .microvolts = 1800000, /* 1.80V */
474 .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
475 .startup_delay = 70000, /* 70ms */
476 .enable_high = 1,
477 .enabled_at_boot = 0,
478 .init_data = &omap3evm_vmmc2,
479};
480
aca6ad07 481static struct platform_device omap3evm_wlan_regulator = {
741927f7
ER		 482 .name = "reg-fixed-voltage",
483 .id = 1,
484 .dev = {
485 .platform_data = &omap3evm_vwlan,
486 },
487};
488
489struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
aca6ad07 490 .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
741927f7
ER		 491};
492#endif
493
497af1f3
ZC		 494/* VAUX2 for USB */
495static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
496 REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
497 REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
498 REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
499 REGULATOR_SUPPLY("vaux2", NULL),
500};
501
502static struct regulator_init_data omap3evm_vaux2 = {
503 .constraints = {
504 .min_uV = 2800000,
505 .max_uV = 2800000,
506 .apply_uV = true,
507 .valid_modes_mask = REGULATOR_MODE_NORMAL
508 | REGULATOR_MODE_STANDBY,
509 .valid_ops_mask = REGULATOR_CHANGE_MODE
510 | REGULATOR_CHANGE_STATUS,
511 },
512 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
513 .consumer_supplies = omap3evm_vaux2_supplies,
514};
515
53c5ec31 516static struct twl4030_platform_data omap3evm_twldata = {
53c5ec31
SMK		 517 /* platform_data for children goes here */
518 .keypad = &omap3evm_kp_data,
53c5ec31 519 .gpio = &omap3evm_gpio_data,
410491d4 520 .vio = &omap3evm_vio,
fbd8071c
MR		 521 .vmmc1 = &omap3evm_vmmc1,
522 .vsim = &omap3evm_vsim,
53c5ec31
SMK		 523};
524
525static int __init omap3_evm_i2c_init(void)
526{
827ed9ae 527 omap3_pmic_get_config(&omap3evm_twldata,
b252b0ef
PU		 528 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
529 TWL_COMMON_PDATA_AUDIO,
530 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
531
532 omap3evm_twldata.vdac->constraints.apply_uV = true;
533 omap3evm_twldata.vpll2->constraints.apply_uV = true;
534
fbd8071c 535 omap3_pmic_init("twl4030", &omap3evm_twldata);
53c5ec31
SMK		 536 omap_register_i2c_bus(2, 400, NULL, 0);
537 omap_register_i2c_bus(3, 400, NULL, 0);
538 return 0;
539}
540
181b250c 541static struct usbhs_omap_board_data usbhs_bdata __initdata = {
58a5491c 542
181b250c
KM		 543 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
544 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
545 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
58a5491c
FB		 546
547 .phy_reset = true,
e8e51d29 548 /* PHY reset GPIO will be runtime programmed based on EVM version */
58a5491c 549 .reset_gpio_port[0] = -EINVAL,
e8e51d29 550 .reset_gpio_port[1] = -EINVAL,
58a5491c
FB		 551 .reset_gpio_port[2] = -EINVAL
552};
553
ca5742bd 554#ifdef CONFIG_OMAP_MUX
904c545c 555static struct omap_board_mux omap35x_board_mux[] __initdata = {
aa6912d8 556 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 557 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 558 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 559 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 560 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
561 OMAP_PIN_OFF_WAKEUPENABLE),
9bc64b89
VH		 562 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
563 OMAP_PIN_OFF_NONE),
564 OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
565 OMAP_PIN_OFF_NONE),
741927f7
ER		 566#ifdef CONFIG_WL12XX_PLATFORM_DATA
567 /* WLAN IRQ - GPIO 149 */
aca6ad07 568 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
741927f7
ER		 569
570 /* WLAN POWER ENABLE - GPIO 150 */
571 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
572
573 /* MMC2 SDIO pin muxes for WL12xx */
574 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
575 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
576 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
577 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
578 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
579 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
580#endif
ca5742bd
TL		 581 { .reg_offset = OMAP_MUX_TERMINATOR },
582};
904c545c
VH		 583
584static struct omap_board_mux omap36x_board_mux[] __initdata = {
aa6912d8 585 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 586 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 587 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 588 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 589 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
590 OMAP_PIN_OFF_WAKEUPENABLE),
904c545c
VH		 591 /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
592 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
593 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
594 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
595 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
596 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
597 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
598 OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
599 OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
600 OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
601 OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
602 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
603 OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
aca6ad07
ER		 604#ifdef CONFIG_WL12XX_PLATFORM_DATA
605 /* WLAN IRQ - GPIO 149 */
606 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
607
608 /* WLAN POWER ENABLE - GPIO 150 */
609 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
610
611 /* MMC2 SDIO pin muxes for WL12xx */
612 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
613 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
614 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
615 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
616 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
617 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
618#endif
904c545c 619
ca5742bd
TL		 620 { .reg_offset = OMAP_MUX_TERMINATOR },
621};
904c545c
VH		 622#else
623#define omap35x_board_mux NULL
624#define omap36x_board_mux NULL
ca5742bd
TL		 625#endif
626
884b8369
MM		 627static struct omap_musb_board_data musb_board_data = {
628 .interface_type = MUSB_INTERFACE_ULPI,
629 .mode = MUSB_OTG,
630 .power = 100,
631};
632
bc593f5d
IG		 633static struct gpio omap3_evm_ehci_gpios[] __initdata = {
634 { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
635 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
636};
637
70d669de
RK		 638static void __init omap3_evm_wl12xx_init(void)
639{
640#ifdef CONFIG_WL12XX_PLATFORM_DATA
641 int ret;
642
643 /* WL12xx WLAN Init */
46a0a540 644 omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
70d669de
RK		 645 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
646 if (ret)
647 pr_err("error setting wl12xx data: %d\n", ret);
648 ret = platform_device_register(&omap3evm_wlan_regulator);
649 if (ret)
650 pr_err("error registering wl12xx device: %d\n", ret);
651#endif
652}
653
5b3689f4
RD		 654static struct regulator_consumer_supply dummy_supplies[] = {
655 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
656 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
657};
658
dc42c8bd
ZC		 659static struct mtd_partition omap3evm_nand_partitions[] = {
660 /* All the partition sizes are listed in terms of NAND block size */
661 {
662 .name = "X-Loader",
663 .offset = 0,
664 .size = 4*(SZ_128K),
665 .mask_flags = MTD_WRITEABLE
666 },
667 {
668 .name = "U-Boot",
669 .offset = MTDPART_OFS_APPEND,
670 .size = 14*(SZ_128K),
671 .mask_flags = MTD_WRITEABLE
672 },
673 {
674 .name = "U-Boot Env",
675 .offset = MTDPART_OFS_APPEND,
676 .size = 2*(SZ_128K)
677 },
678 {
679 .name = "Kernel",
680 .offset = MTDPART_OFS_APPEND,
681 .size = 40*(SZ_128K)
682 },
683 {
684 .name = "File system",
685 .size = MTDPART_SIZ_FULL,
686 .offset = MTDPART_OFS_APPEND,
687 },
688};
689
53c5ec31
SMK		 690static void __init omap3_evm_init(void)
691{
eeb3711b
PW		 692 struct omap_board_mux *obm;
693
db408023 694 omap3_evm_get_revision();
5b3689f4 695 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
904c545c 696
eeb3711b
PW		 697 obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
698 omap3_mux_init(obm, OMAP_PACKAGE_CBB);
db408023 699
d1589f09 700 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
3b972bf0 701 omap_hsmmc_init(mmc);
d1589f09 702
497af1f3
ZC		 703 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
704 omap3evm_twldata.vaux2 = &omap3evm_vaux2;
705
53c5ec31
SMK		 706 omap3_evm_i2c_init();
707
d5e13227 708 omap_display_init(&omap3_evm_dss_data);
53c5ec31 709
53c5ec31 710 omap_serial_init();
a4ca9dbe 711 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
1a4f4637 712
e8e2ff46
GAK		 713 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
714 usb_nop_xceiv_register();
1a4f4637 715
e8e51d29
AKG		 716 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
717 /* enable EHCI VBUS using GPIO22 */
bc593f5d 718 omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
e8e51d29 719 /* Select EHCI port on main board */
bc593f5d
IG		 720 omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
721 OMAP_PIN_INPUT_PULLUP);
722 gpio_request_array(omap3_evm_ehci_gpios,
723 ARRAY_SIZE(omap3_evm_ehci_gpios));
e8e51d29
AKG		 724
725 /* setup EHCI phy reset config */
4896e394 726 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
181b250c 727 usbhs_bdata.reset_gpio_port[1] = 21;
e8e51d29 728
58815fa3
AKG		 729 /* EVM REV >= E can supply 500mA with EXTVBUS programming */
730 musb_board_data.power = 500;
731 musb_board_data.extvbus = 1;
e8e51d29
AKG		 732 } else {
733 /* setup EHCI phy reset on MDC */
4896e394 734 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
181b250c 735 usbhs_bdata.reset_gpio_port[1] = 135;
e8e51d29 736 }
884b8369 737 usb_musb_init(&musb_board_data);
9e64bb1e 738 usbhs_init(&usbhs_bdata);
2e618261
AM		 739 board_nand_init(omap3evm_nand_partitions,
740 ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
741 NAND_BUSWIDTH_16, NULL);
dc42c8bd 742
96974a24 743 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
562138a4 744 omap3evm_init_smsc911x();
703e3061 745 omap3_evm_display_init();
70d669de 746 omap3_evm_wl12xx_init();
ac51c90f 747 omap_twl4030_audio_init("omap3evm");
53c5ec31
SMK		 748}
749
53c5ec31
SMK		 750MACHINE_START(OMAP3EVM, "OMAP3 EVM")
751 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
5e52b435 752 .atag_offset = 0x100,
71ee7dad 753 .reserve = omap_reserve,
3dc3bad6 754 .map_io = omap3_map_io,
8f5b5a41 755 .init_early = omap35xx_init_early,
741e3a89 756 .init_irq = omap3_init_irq,
6b2f55d7 757 .handle_irq = omap3_intc_handle_irq,
53c5ec31 758 .init_machine = omap3_evm_init,
bbd707ac 759 .init_late = omap35xx_init_late,
e74984e4 760 .timer = &omap3_timer,
187e3e06 761 .restart = omap3xxx_restart,
53c5ec31 762MACHINE_END
Linux kernel - Deliverables
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