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Merge tag 'f2fs-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-omap3evm.c
CommitLineData
53c5ec31
SMK		 1/*
2 * linux/arch/arm/mach-omap2/board-omap3evm.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/err.h>
20#include <linux/clk.h>
21#include <linux/gpio.h>
22#include <linux/input.h>
6135434a 23#include <linux/input/matrix_keypad.h>
53c5ec31 24#include <linux/leds.h>
562138a4 25#include <linux/interrupt.h>
53c5ec31 26
dc42c8bd
ZC		 27#include <linux/mtd/mtd.h>
28#include <linux/mtd/partitions.h>
29#include <linux/mtd/nand.h>
30
53c5ec31
SMK		 31#include <linux/spi/spi.h>
32#include <linux/spi/ads7846.h>
ebeb53e1 33#include <linux/i2c/twl.h>
e8e2ff46 34#include <linux/usb/otg.h>
e8c4a7ac 35#include <linux/usb/musb.h>
78c289f8 36#include <linux/usb/nop-usb-xceiv.h>
562138a4 37#include <linux/smsc911x.h>
53c5ec31 38
741927f7
ER		 39#include <linux/wl12xx.h>
40#include <linux/regulator/fixed.h>
1a7ec135 41#include <linux/regulator/machine.h>
3a63833e 42#include <linux/mmc/host.h>
dc28094b 43#include <linux/export.h>
51482be9 44#include <linux/usb/phy.h>
1a7ec135 45
53c5ec31
SMK		 46#include <asm/mach-types.h>
47#include <asm/mach/arch.h>
48#include <asm/mach/map.h>
49
2203747c 50#include <linux/platform_data/mtd-nand-omap2.h>
4e65331c 51#include "common.h"
2203747c 52#include <linux/platform_data/spi-omap2-mcspi.h>
a0b38cc4 53#include <video/omapdss.h>
a0d8dde9 54#include <video/omap-panel-data.h>
53c5ec31 55
e4c060db 56#include "soc.h"
ca5742bd 57#include "mux.h"
53c5ec31 58#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 59#include "hsmmc.h"
96974a24 60#include "common-board-devices.h"
2e618261
AM		 61#include "board-flash.h"
62
63#define NAND_CS 0
53c5ec31 64
c31cc1b7 65#define OMAP3_EVM_TS_GPIO 175
e8e51d29
AKG		 66#define OMAP3_EVM_EHCI_VBUS 22
67#define OMAP3_EVM_EHCI_SELECT 61
53c5ec31
SMK		 68
69#define OMAP3EVM_ETHR_START 0x2c000000
70#define OMAP3EVM_ETHR_SIZE 1024
db408023 71#define OMAP3EVM_ETHR_ID_REV 0x50
53c5ec31 72#define OMAP3EVM_ETHR_GPIO_IRQ 176
562138a4 73#define OMAP3EVM_SMSC911X_CS 5
9bc64b89
VH		 74/*
75 * Eth Reset signal
76 * 64 = Generation 1 (<=RevD)
77 * 7 = Generation 2 (>=RevE)
78 */
79#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
80#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
53c5ec31 81
e54adb1e
IG		 82/*
83 * OMAP35x EVM revision
84 * Run time detection of EVM revision is done by reading Ethernet
85 * PHY ID -
86 * GEN_1 = 0x01150000
87 * GEN_2 = 0x92200000
88 */
89enum {
90 OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
91 OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
92};
93
db408023
AKG		 94static u8 omap3_evm_version;
95
695f0117 96static u8 get_omap3_evm_rev(void)
db408023
AKG		 97{
98 return omap3_evm_version;
99}
db408023
AKG		 100
101static void __init omap3_evm_get_revision(void)
102{
103 void __iomem *ioaddr;
104 unsigned int smsc_id;
105
106 /* Ethernet PHY ID is stored at ID_REV register */
107 ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
108 if (!ioaddr)
109 return;
110 smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
111 iounmap(ioaddr);
112
113 switch (smsc_id) {
114 /*SMSC9115 chipset*/
115 case 0x01150000:
116 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
117 break;
118 /*SMSC 9220 chipset*/
119 case 0x92200000:
120 default:
121 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
122 }
123}
124
562138a4 125#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
ac839b3c 126#include "gpmc-smsc911x.h"
53c5ec31 127
21b42731
MR		 128static struct omap_smsc911x_platform_data smsc911x_cfg = {
129 .cs = OMAP3EVM_SMSC911X_CS,
130 .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
131 .gpio_reset = -EINVAL,
132 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
53c5ec31
SMK		 133};
134
562138a4 135static inline void __init omap3evm_init_smsc911x(void)
53c5ec31 136{
9bc64b89
VH		 137 /* Configure ethernet controller reset gpio */
138 if (cpu_is_omap3430()) {
21b42731
MR		 139 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
140 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
141 else
142 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
53c5ec31
SMK		 143 }
144
21b42731 145 gpmc_smsc911x_init(&smsc911x_cfg);
53c5ec31
SMK		 146}
147
562138a4
S		 148#else
149static inline void __init omap3evm_init_smsc911x(void) { return; }
150#endif
151
703e3061
VH		 152/*
153 * OMAP3EVM LCD Panel control signals
154 */
155#define OMAP3EVM_LCD_PANEL_LR 2
156#define OMAP3EVM_LCD_PANEL_UD 3
157#define OMAP3EVM_LCD_PANEL_INI 152
703e3061
VH		 158#define OMAP3EVM_LCD_PANEL_QVGA 154
159#define OMAP3EVM_LCD_PANEL_RESB 155
fde38254
AT		 160
161#define OMAP3EVM_LCD_PANEL_ENVDD 153
703e3061 162#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
fde38254
AT		 163
164/*
165 * OMAP3EVM DVI control signals
166 */
703e3061
VH		 167#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
168
fde38254
AT		 169static struct panel_sharp_ls037v7dw01_data omap3_evm_lcd_data = {
170 .resb_gpio = OMAP3EVM_LCD_PANEL_RESB,
171 .ini_gpio = OMAP3EVM_LCD_PANEL_INI,
172 .mo_gpio = OMAP3EVM_LCD_PANEL_QVGA,
173 .lr_gpio = OMAP3EVM_LCD_PANEL_LR,
174 .ud_gpio = OMAP3EVM_LCD_PANEL_UD,
bc593f5d
IG		 175};
176
703e3061
VH		 177static void __init omap3_evm_display_init(void)
178{
179 int r;
180
fde38254
AT		 181 r = gpio_request_one(OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW,
182 "lcd_panel_envdd");
bc593f5d 183 if (r)
fde38254 184 pr_err("failed to get lcd_panel_envdd GPIO\n");
703e3061 185
fde38254
AT		 186 r = gpio_request_one(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO,
187 GPIOF_OUT_INIT_LOW, "lcd_panel_bklight");
188 if (r)
189 pr_err("failed to get lcd_panel_bklight GPIO\n");
703e3061
VH		 190
191 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
f186e9b2 192 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
703e3061 193 else
f186e9b2 194 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
703e3061
VH		 195}
196
197static struct omap_dss_device omap3_evm_lcd_device = {
198 .name = "lcd",
199 .driver_name = "sharp_ls_panel",
200 .type = OMAP_DISPLAY_TYPE_DPI,
201 .phy.dpi.data_lines = 18,
fde38254 202 .data = &omap3_evm_lcd_data,
703e3061
VH		 203};
204
703e3061
VH		 205static struct omap_dss_device omap3_evm_tv_device = {
206 .name = "tv",
207 .driver_name = "venc",
208 .type = OMAP_DISPLAY_TYPE_VENC,
209 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
703e3061
VH		 210};
211
2e6f2ee7 212static struct tfp410_platform_data dvi_panel = {
e813a55e 213 .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
ca2e16fa 214 .i2c_bus_num = -1,
89747c91
BW		 215};
216
703e3061
VH		 217static struct omap_dss_device omap3_evm_dvi_device = {
218 .name = "dvi",
703e3061 219 .type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7 220 .driver_name = "tfp410",
89747c91 221 .data = &dvi_panel,
703e3061 222 .phy.dpi.data_lines = 24,
703e3061
VH		 223};
224
225static struct omap_dss_device *omap3_evm_dss_devices[] = {
226 &omap3_evm_lcd_device,
227 &omap3_evm_tv_device,
228 &omap3_evm_dvi_device,
229};
230
231static struct omap_dss_board_info omap3_evm_dss_data = {
232 .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
233 .devices = omap3_evm_dss_devices,
234 .default_device = &omap3_evm_lcd_device,
235};
236
786b01a8
OD		 237static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
238 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
1a7ec135
MR		 239};
240
786b01a8
OD		 241static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
242 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
1a7ec135
MR		 243};
244
245/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
246static struct regulator_init_data omap3evm_vmmc1 = {
247 .constraints = {
248 .min_uV = 1850000,
249 .max_uV = 3150000,
250 .valid_modes_mask = REGULATOR_MODE_NORMAL
251 | REGULATOR_MODE_STANDBY,
252 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
253 | REGULATOR_CHANGE_MODE
254 | REGULATOR_CHANGE_STATUS,
255 },
786b01a8
OD		 256 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
257 .consumer_supplies = omap3evm_vmmc1_supply,
1a7ec135
MR		 258};
259
260/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
261static struct regulator_init_data omap3evm_vsim = {
262 .constraints = {
263 .min_uV = 1800000,
264 .max_uV = 3000000,
265 .valid_modes_mask = REGULATOR_MODE_NORMAL
266 | REGULATOR_MODE_STANDBY,
267 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
268 | REGULATOR_CHANGE_MODE
269 | REGULATOR_CHANGE_STATUS,
270 },
786b01a8
OD		 271 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
272 .consumer_supplies = omap3evm_vsim_supply,
1a7ec135
MR		 273};
274
68ff0423 275static struct omap2_hsmmc_info mmc[] = {
53c5ec31
SMK		 276 {
277 .mmc = 1,
3a63833e 278 .caps = MMC_CAP_4_BIT_DATA,
53c5ec31
SMK		 279 .gpio_cd = -EINVAL,
280 .gpio_wp = 63,
3b972bf0 281 .deferred = true,
53c5ec31 282 },
6cc9efed 283#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7
ER		 284 {
285 .name = "wl1271",
aca6ad07 286 .mmc = 2,
741927f7
ER		 287 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
288 .gpio_wp = -EINVAL,
289 .gpio_cd = -EINVAL,
290 .nonremovable = true,
291 },
292#endif
53c5ec31
SMK		 293 {} /* Terminator */
294};
295
296static struct gpio_led gpio_leds[] = {
297 {
298 .name = "omap3evm::ledb",
299 /* normally not visible (board underside) */
300 .default_trigger = "default-on",
301 .gpio = -EINVAL, /* gets replaced */
302 .active_low = true,
303 },
304};
305
306static struct gpio_led_platform_data gpio_led_info = {
307 .leds = gpio_leds,
308 .num_leds = ARRAY_SIZE(gpio_leds),
309};
310
311static struct platform_device leds_gpio = {
312 .name = "leds-gpio",
313 .id = -1,
314 .dev = {
315 .platform_data = &gpio_led_info,
316 },
317};
318
319
320static int omap3evm_twl_gpio_setup(struct device *dev,
321 unsigned gpio, unsigned ngpio)
322{
bc593f5d 323 int r, lcd_bl_en;
42fc8cab 324
53c5ec31 325 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
53c5ec31 326 mmc[0].gpio_cd = gpio + 0;
3b972bf0 327 omap_hsmmc_late_init(mmc);
53c5ec31
SMK		 328
329 /*
330 * Most GPIOs are for USB OTG. Some are mostly sent to
331 * the P2 connector; notably LEDA for the LCD backlight.
332 */
333
703e3061 334 /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
bc593f5d
IG		 335 lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
336 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
337 r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
42fc8cab
VH		 338 if (r)
339 printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
703e3061
VH		 340
341 /* gpio + 7 == DVI Enable */
bc593f5d 342 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
703e3061 343
53c5ec31 344 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
ebe8f7e5 345 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
53c5ec31
SMK		 346
347 platform_device_register(&leds_gpio);
348
cb8ca589
ZC		 349 /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
350 * for starting USB tranceiver
351 */
b103a2e2 352#ifdef CONFIG_TWL4030_CORE
cb8ca589
ZC		 353 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
354 u8 val;
355
356 twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
357 val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
358 twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
359 }
b103a2e2 360#endif
cb8ca589 361
53c5ec31
SMK		 362 return 0;
363}
364
365static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
53c5ec31
SMK		 366 .use_leds = true,
367 .setup = omap3evm_twl_gpio_setup,
368};
369
bead4375 370static uint32_t board_keymap[] = {
53c5ec31 371 KEY(0, 0, KEY_LEFT),
0621d756
SP		 372 KEY(0, 1, KEY_DOWN),
373 KEY(0, 2, KEY_ENTER),
374 KEY(0, 3, KEY_M),
375
376 KEY(1, 0, KEY_RIGHT),
53c5ec31 377 KEY(1, 1, KEY_UP),
0621d756
SP		 378 KEY(1, 2, KEY_I),
379 KEY(1, 3, KEY_N),
380
381 KEY(2, 0, KEY_A),
382 KEY(2, 1, KEY_E),
53c5ec31 383 KEY(2, 2, KEY_J),
0621d756
SP		 384 KEY(2, 3, KEY_O),
385
386 KEY(3, 0, KEY_B),
387 KEY(3, 1, KEY_F),
388 KEY(3, 2, KEY_K),
53c5ec31
SMK		 389 KEY(3, 3, KEY_P)
390};
391
4f543332
TL		 392static struct matrix_keymap_data board_map_data = {
393 .keymap = board_keymap,
394 .keymap_size = ARRAY_SIZE(board_keymap),
395};
396
53c5ec31 397static struct twl4030_keypad_data omap3evm_kp_data = {
4f543332 398 .keymap_data = &board_map_data,
53c5ec31
SMK		 399 .rows = 4,
400 .cols = 4,
53c5ec31
SMK		 401 .rep = 1,
402};
403
410491d4 404/* ads7846 on SPI */
786b01a8
OD		 405static struct regulator_consumer_supply omap3evm_vio_supply[] = {
406 REGULATOR_SUPPLY("vcc", "spi1.0"),
407};
410491d4
VH		 408
409/* VIO for ads7846 */
410static struct regulator_init_data omap3evm_vio = {
411 .constraints = {
412 .min_uV = 1800000,
413 .max_uV = 1800000,
414 .apply_uV = true,
415 .valid_modes_mask = REGULATOR_MODE_NORMAL
416 | REGULATOR_MODE_STANDBY,
417 .valid_ops_mask = REGULATOR_CHANGE_MODE
418 | REGULATOR_CHANGE_STATUS,
419 },
786b01a8
OD		 420 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
421 .consumer_supplies = omap3evm_vio_supply,
410491d4
VH		 422};
423
6cc9efed 424#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7
ER		 425
426#define OMAP3EVM_WLAN_PMENA_GPIO (150)
427#define OMAP3EVM_WLAN_IRQ_GPIO (149)
428
786b01a8 429static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
d19f579a 430 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
786b01a8 431};
741927f7
ER		 432
433/* VMMC2 for driving the WL12xx module */
434static struct regulator_init_data omap3evm_vmmc2 = {
435 .constraints = {
436 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
437 },
d19f579a 438 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
786b01a8 439 .consumer_supplies = omap3evm_vmmc2_supply,
741927f7
ER		 440};
441
442static struct fixed_voltage_config omap3evm_vwlan = {
443 .supply_name = "vwl1271",
444 .microvolts = 1800000, /* 1.80V */
445 .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
446 .startup_delay = 70000, /* 70ms */
447 .enable_high = 1,
448 .enabled_at_boot = 0,
449 .init_data = &omap3evm_vmmc2,
450};
451
aca6ad07 452static struct platform_device omap3evm_wlan_regulator = {
741927f7
ER		 453 .name = "reg-fixed-voltage",
454 .id = 1,
455 .dev = {
456 .platform_data = &omap3evm_vwlan,
457 },
458};
459
460struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
aca6ad07 461 .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
741927f7
ER		 462};
463#endif
464
497af1f3
ZC		 465/* VAUX2 for USB */
466static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
467 REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
468 REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
6ef818ee 469 REGULATOR_SUPPLY("vcc", "nop_usb_xceiv.2"), /* hsusb port 2 */
497af1f3
ZC		 470 REGULATOR_SUPPLY("vaux2", NULL),
471};
472
473static struct regulator_init_data omap3evm_vaux2 = {
474 .constraints = {
475 .min_uV = 2800000,
476 .max_uV = 2800000,
477 .apply_uV = true,
478 .valid_modes_mask = REGULATOR_MODE_NORMAL
479 | REGULATOR_MODE_STANDBY,
480 .valid_ops_mask = REGULATOR_CHANGE_MODE
481 | REGULATOR_CHANGE_STATUS,
482 },
483 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
484 .consumer_supplies = omap3evm_vaux2_supplies,
485};
486
53c5ec31 487static struct twl4030_platform_data omap3evm_twldata = {
53c5ec31
SMK		 488 /* platform_data for children goes here */
489 .keypad = &omap3evm_kp_data,
53c5ec31 490 .gpio = &omap3evm_gpio_data,
410491d4 491 .vio = &omap3evm_vio,
fbd8071c
MR		 492 .vmmc1 = &omap3evm_vmmc1,
493 .vsim = &omap3evm_vsim,
53c5ec31
SMK		 494};
495
496static int __init omap3_evm_i2c_init(void)
497{
827ed9ae 498 omap3_pmic_get_config(&omap3evm_twldata,
b252b0ef
PU		 499 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
500 TWL_COMMON_PDATA_AUDIO,
501 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
502
503 omap3evm_twldata.vdac->constraints.apply_uV = true;
504 omap3evm_twldata.vpll2->constraints.apply_uV = true;
505
fbd8071c 506 omap3_pmic_init("twl4030", &omap3evm_twldata);
53c5ec31
SMK		 507 omap_register_i2c_bus(2, 400, NULL, 0);
508 omap_register_i2c_bus(3, 400, NULL, 0);
509 return 0;
510}
511
6ef818ee
RQ		 512static struct usbhs_phy_data phy_data[] __initdata = {
513 {
514 .port = 2,
515 .reset_gpio = -1, /* set at runtime */
516 .vcc_gpio = -EINVAL,
517 },
518};
58a5491c 519
6ef818ee 520static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
181b250c 521 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
58a5491c
FB		 522};
523
ca5742bd 524#ifdef CONFIG_OMAP_MUX
904c545c 525static struct omap_board_mux omap35x_board_mux[] __initdata = {
aa6912d8 526 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 527 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 528 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 529 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 530 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
531 OMAP_PIN_OFF_WAKEUPENABLE),
9bc64b89
VH		 532 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
533 OMAP_PIN_OFF_NONE),
534 OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
535 OMAP_PIN_OFF_NONE),
6cc9efed 536#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7 537 /* WLAN IRQ - GPIO 149 */
aca6ad07 538 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
741927f7
ER		 539
540 /* WLAN POWER ENABLE - GPIO 150 */
541 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
542
543 /* MMC2 SDIO pin muxes for WL12xx */
544 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
545 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
546 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
547 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
548 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
549 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
550#endif
ca5742bd
TL		 551 { .reg_offset = OMAP_MUX_TERMINATOR },
552};
904c545c
VH		 553
554static struct omap_board_mux omap36x_board_mux[] __initdata = {
aa6912d8 555 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 556 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 557 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 558 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 559 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
560 OMAP_PIN_OFF_WAKEUPENABLE),
904c545c
VH		 561 /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
562 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
563 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
564 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
565 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
566 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
567 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
568 OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
569 OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
570 OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
571 OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
572 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
573 OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
6cc9efed 574#ifdef CONFIG_WILINK_PLATFORM_DATA
aca6ad07
ER		 575 /* WLAN IRQ - GPIO 149 */
576 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
577
578 /* WLAN POWER ENABLE - GPIO 150 */
579 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
580
581 /* MMC2 SDIO pin muxes for WL12xx */
582 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
583 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
584 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
585 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
586 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
587 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
588#endif
904c545c 589
ca5742bd
TL		 590 { .reg_offset = OMAP_MUX_TERMINATOR },
591};
904c545c
VH		 592#else
593#define omap35x_board_mux NULL
594#define omap36x_board_mux NULL
ca5742bd
TL		 595#endif
596
884b8369
MM		 597static struct omap_musb_board_data musb_board_data = {
598 .interface_type = MUSB_INTERFACE_ULPI,
599 .mode = MUSB_OTG,
600 .power = 100,
601};
602
bc593f5d
IG		 603static struct gpio omap3_evm_ehci_gpios[] __initdata = {
604 { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
605 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
606};
607
70d669de
RK		 608static void __init omap3_evm_wl12xx_init(void)
609{
6cc9efed 610#ifdef CONFIG_WILINK_PLATFORM_DATA
70d669de
RK		 611 int ret;
612
613 /* WL12xx WLAN Init */
46a0a540 614 omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
70d669de
RK		 615 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
616 if (ret)
617 pr_err("error setting wl12xx data: %d\n", ret);
618 ret = platform_device_register(&omap3evm_wlan_regulator);
619 if (ret)
620 pr_err("error registering wl12xx device: %d\n", ret);
621#endif
622}
623
5b3689f4
RD		 624static struct regulator_consumer_supply dummy_supplies[] = {
625 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
626 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
627};
628
dc42c8bd
ZC		 629static struct mtd_partition omap3evm_nand_partitions[] = {
630 /* All the partition sizes are listed in terms of NAND block size */
631 {
632 .name = "X-Loader",
633 .offset = 0,
634 .size = 4*(SZ_128K),
635 .mask_flags = MTD_WRITEABLE
636 },
637 {
638 .name = "U-Boot",
639 .offset = MTDPART_OFS_APPEND,
640 .size = 14*(SZ_128K),
641 .mask_flags = MTD_WRITEABLE
642 },
643 {
644 .name = "U-Boot Env",
645 .offset = MTDPART_OFS_APPEND,
646 .size = 2*(SZ_128K)
647 },
648 {
649 .name = "Kernel",
650 .offset = MTDPART_OFS_APPEND,
651 .size = 40*(SZ_128K)
652 },
653 {
654 .name = "File system",
655 .size = MTDPART_SIZ_FULL,
656 .offset = MTDPART_OFS_APPEND,
657 },
658};
659
53c5ec31
SMK		 660static void __init omap3_evm_init(void)
661{
eeb3711b
PW		 662 struct omap_board_mux *obm;
663
db408023 664 omap3_evm_get_revision();
5b3689f4 665 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
904c545c 666
eeb3711b
PW		 667 obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
668 omap3_mux_init(obm, OMAP_PACKAGE_CBB);
db408023 669
d1589f09 670 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
3b972bf0 671 omap_hsmmc_init(mmc);
d1589f09 672
497af1f3
ZC		 673 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
674 omap3evm_twldata.vaux2 = &omap3evm_vaux2;
675
53c5ec31
SMK		 676 omap3_evm_i2c_init();
677
d5e13227 678 omap_display_init(&omap3_evm_dss_data);
53c5ec31 679
53c5ec31 680 omap_serial_init();
a4ca9dbe 681 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
1a4f4637 682
e8e2ff46
GAK		 683 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
684 usb_nop_xceiv_register();
1a4f4637 685
e8e51d29
AKG		 686 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
687 /* enable EHCI VBUS using GPIO22 */
bc593f5d 688 omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
e8e51d29 689 /* Select EHCI port on main board */
bc593f5d
IG		 690 omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
691 OMAP_PIN_INPUT_PULLUP);
692 gpio_request_array(omap3_evm_ehci_gpios,
693 ARRAY_SIZE(omap3_evm_ehci_gpios));
e8e51d29
AKG		 694
695 /* setup EHCI phy reset config */
4896e394 696 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
6ef818ee 697 phy_data[0].reset_gpio = 21;
e8e51d29 698
58815fa3
AKG		 699 /* EVM REV >= E can supply 500mA with EXTVBUS programming */
700 musb_board_data.power = 500;
701 musb_board_data.extvbus = 1;
e8e51d29
AKG		 702 } else {
703 /* setup EHCI phy reset on MDC */
4896e394 704 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
6ef818ee 705 phy_data[0].reset_gpio = 135;
e8e51d29 706 }
51482be9 707 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
884b8369 708 usb_musb_init(&musb_board_data);
6ef818ee
RQ		 709
710 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
9e64bb1e 711 usbhs_init(&usbhs_bdata);
2e618261
AM		 712 board_nand_init(omap3evm_nand_partitions,
713 ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
714 NAND_BUSWIDTH_16, NULL);
dc42c8bd 715
96974a24 716 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
562138a4 717 omap3evm_init_smsc911x();
703e3061 718 omap3_evm_display_init();
70d669de 719 omap3_evm_wl12xx_init();
40234bf7 720 omap_twl4030_audio_init("omap3evm", NULL);
53c5ec31
SMK		 721}
722
53c5ec31
SMK		 723MACHINE_START(OMAP3EVM, "OMAP3 EVM")
724 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
5e52b435 725 .atag_offset = 0x100,
71ee7dad 726 .reserve = omap_reserve,
3dc3bad6 727 .map_io = omap3_map_io,
8f5b5a41 728 .init_early = omap35xx_init_early,
741e3a89 729 .init_irq = omap3_init_irq,
6b2f55d7 730 .handle_irq = omap3_intc_handle_irq,
53c5ec31 731 .init_machine = omap3_evm_init,
bbd707ac 732 .init_late = omap35xx_init_late,
6bb27d73 733 .init_time = omap3_sync32k_timer_init,
187e3e06 734 .restart = omap3xxx_restart,
53c5ec31 735MACHINE_END
Linux kernel - Deliverables
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