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53c5ec31 SMK |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-omap3evm.c | |
3 | * | |
4 | * Copyright (C) 2008 Texas Instruments | |
5 | * | |
6 | * Modified from mach-omap2/board-3430sdp.c | |
7 | * | |
8 | * Initial code: Syed Mohammed Khasim | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/clk.h> | |
21 | #include <linux/gpio.h> | |
22 | #include <linux/input.h> | |
6135434a | 23 | #include <linux/input/matrix_keypad.h> |
53c5ec31 | 24 | #include <linux/leds.h> |
562138a4 | 25 | #include <linux/interrupt.h> |
53c5ec31 | 26 | |
dc42c8bd ZC |
27 | #include <linux/mtd/mtd.h> |
28 | #include <linux/mtd/partitions.h> | |
29 | #include <linux/mtd/nand.h> | |
30 | ||
53c5ec31 SMK |
31 | #include <linux/spi/spi.h> |
32 | #include <linux/spi/ads7846.h> | |
ebeb53e1 | 33 | #include <linux/i2c/twl.h> |
e8e2ff46 | 34 | #include <linux/usb/otg.h> |
562138a4 | 35 | #include <linux/smsc911x.h> |
53c5ec31 | 36 | |
741927f7 ER |
37 | #include <linux/wl12xx.h> |
38 | #include <linux/regulator/fixed.h> | |
1a7ec135 | 39 | #include <linux/regulator/machine.h> |
3a63833e | 40 | #include <linux/mmc/host.h> |
dc28094b | 41 | #include <linux/export.h> |
1a7ec135 | 42 | |
53c5ec31 SMK |
43 | #include <asm/mach-types.h> |
44 | #include <asm/mach/arch.h> | |
45 | #include <asm/mach/map.h> | |
46 | ||
ce491cf8 | 47 | #include <plat/usb.h> |
2203747c | 48 | #include <linux/platform_data/mtd-nand-omap2.h> |
4e65331c | 49 | #include "common.h" |
2203747c | 50 | #include <linux/platform_data/spi-omap2-mcspi.h> |
a0b38cc4 | 51 | #include <video/omapdss.h> |
dac8eb5f | 52 | #include <video/omap-panel-tfp410.h> |
53c5ec31 | 53 | |
ca5742bd | 54 | #include "mux.h" |
53c5ec31 | 55 | #include "sdram-micron-mt46h32m32lf-6.h" |
d02a900b | 56 | #include "hsmmc.h" |
96974a24 | 57 | #include "common-board-devices.h" |
53c5ec31 | 58 | |
c31cc1b7 | 59 | #define OMAP3_EVM_TS_GPIO 175 |
e8e51d29 AKG |
60 | #define OMAP3_EVM_EHCI_VBUS 22 |
61 | #define OMAP3_EVM_EHCI_SELECT 61 | |
53c5ec31 SMK |
62 | |
63 | #define OMAP3EVM_ETHR_START 0x2c000000 | |
64 | #define OMAP3EVM_ETHR_SIZE 1024 | |
db408023 | 65 | #define OMAP3EVM_ETHR_ID_REV 0x50 |
53c5ec31 | 66 | #define OMAP3EVM_ETHR_GPIO_IRQ 176 |
562138a4 | 67 | #define OMAP3EVM_SMSC911X_CS 5 |
9bc64b89 VH |
68 | /* |
69 | * Eth Reset signal | |
70 | * 64 = Generation 1 (<=RevD) | |
71 | * 7 = Generation 2 (>=RevE) | |
72 | */ | |
73 | #define OMAP3EVM_GEN1_ETHR_GPIO_RST 64 | |
74 | #define OMAP3EVM_GEN2_ETHR_GPIO_RST 7 | |
53c5ec31 | 75 | |
e54adb1e IG |
76 | /* |
77 | * OMAP35x EVM revision | |
78 | * Run time detection of EVM revision is done by reading Ethernet | |
79 | * PHY ID - | |
80 | * GEN_1 = 0x01150000 | |
81 | * GEN_2 = 0x92200000 | |
82 | */ | |
83 | enum { | |
84 | OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */ | |
85 | OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */ | |
86 | }; | |
87 | ||
db408023 AKG |
88 | static u8 omap3_evm_version; |
89 | ||
90 | u8 get_omap3_evm_rev(void) | |
91 | { | |
92 | return omap3_evm_version; | |
93 | } | |
94 | EXPORT_SYMBOL(get_omap3_evm_rev); | |
95 | ||
96 | static void __init omap3_evm_get_revision(void) | |
97 | { | |
98 | void __iomem *ioaddr; | |
99 | unsigned int smsc_id; | |
100 | ||
101 | /* Ethernet PHY ID is stored at ID_REV register */ | |
102 | ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K); | |
103 | if (!ioaddr) | |
104 | return; | |
105 | smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000; | |
106 | iounmap(ioaddr); | |
107 | ||
108 | switch (smsc_id) { | |
109 | /*SMSC9115 chipset*/ | |
110 | case 0x01150000: | |
111 | omap3_evm_version = OMAP3EVM_BOARD_GEN_1; | |
112 | break; | |
113 | /*SMSC 9220 chipset*/ | |
114 | case 0x92200000: | |
115 | default: | |
116 | omap3_evm_version = OMAP3EVM_BOARD_GEN_2; | |
117 | } | |
118 | } | |
119 | ||
562138a4 | 120 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
ac839b3c | 121 | #include "gpmc-smsc911x.h" |
53c5ec31 | 122 | |
21b42731 MR |
123 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
124 | .cs = OMAP3EVM_SMSC911X_CS, | |
125 | .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ, | |
126 | .gpio_reset = -EINVAL, | |
127 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | |
53c5ec31 SMK |
128 | }; |
129 | ||
562138a4 | 130 | static inline void __init omap3evm_init_smsc911x(void) |
53c5ec31 | 131 | { |
9bc64b89 VH |
132 | /* Configure ethernet controller reset gpio */ |
133 | if (cpu_is_omap3430()) { | |
21b42731 MR |
134 | if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) |
135 | smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST; | |
136 | else | |
137 | smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST; | |
53c5ec31 SMK |
138 | } |
139 | ||
21b42731 | 140 | gpmc_smsc911x_init(&smsc911x_cfg); |
53c5ec31 SMK |
141 | } |
142 | ||
562138a4 S |
143 | #else |
144 | static inline void __init omap3evm_init_smsc911x(void) { return; } | |
145 | #endif | |
146 | ||
703e3061 VH |
147 | /* |
148 | * OMAP3EVM LCD Panel control signals | |
149 | */ | |
150 | #define OMAP3EVM_LCD_PANEL_LR 2 | |
151 | #define OMAP3EVM_LCD_PANEL_UD 3 | |
152 | #define OMAP3EVM_LCD_PANEL_INI 152 | |
153 | #define OMAP3EVM_LCD_PANEL_ENVDD 153 | |
154 | #define OMAP3EVM_LCD_PANEL_QVGA 154 | |
155 | #define OMAP3EVM_LCD_PANEL_RESB 155 | |
156 | #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 | |
157 | #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 | |
158 | ||
bc593f5d IG |
159 | static struct gpio omap3_evm_dss_gpios[] __initdata = { |
160 | { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" }, | |
161 | { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" }, | |
162 | { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" }, | |
163 | { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" }, | |
164 | { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" }, | |
165 | { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" }, | |
166 | }; | |
167 | ||
703e3061 VH |
168 | static int lcd_enabled; |
169 | static int dvi_enabled; | |
170 | ||
171 | static void __init omap3_evm_display_init(void) | |
172 | { | |
173 | int r; | |
174 | ||
bc593f5d IG |
175 | r = gpio_request_array(omap3_evm_dss_gpios, |
176 | ARRAY_SIZE(omap3_evm_dss_gpios)); | |
177 | if (r) | |
178 | printk(KERN_ERR "failed to get lcd_panel_* gpios\n"); | |
703e3061 VH |
179 | } |
180 | ||
181 | static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) | |
182 | { | |
183 | if (dvi_enabled) { | |
184 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | |
185 | return -EINVAL; | |
186 | } | |
187 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0); | |
188 | ||
189 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | |
f186e9b2 | 190 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); |
703e3061 | 191 | else |
f186e9b2 | 192 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); |
703e3061 VH |
193 | |
194 | lcd_enabled = 1; | |
195 | return 0; | |
196 | } | |
197 | ||
198 | static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev) | |
199 | { | |
200 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1); | |
201 | ||
202 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | |
f186e9b2 | 203 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); |
703e3061 | 204 | else |
f186e9b2 | 205 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); |
703e3061 VH |
206 | |
207 | lcd_enabled = 0; | |
208 | } | |
209 | ||
210 | static struct omap_dss_device omap3_evm_lcd_device = { | |
211 | .name = "lcd", | |
212 | .driver_name = "sharp_ls_panel", | |
213 | .type = OMAP_DISPLAY_TYPE_DPI, | |
214 | .phy.dpi.data_lines = 18, | |
215 | .platform_enable = omap3_evm_enable_lcd, | |
216 | .platform_disable = omap3_evm_disable_lcd, | |
217 | }; | |
218 | ||
219 | static int omap3_evm_enable_tv(struct omap_dss_device *dssdev) | |
220 | { | |
221 | return 0; | |
222 | } | |
223 | ||
224 | static void omap3_evm_disable_tv(struct omap_dss_device *dssdev) | |
225 | { | |
226 | } | |
227 | ||
228 | static struct omap_dss_device omap3_evm_tv_device = { | |
229 | .name = "tv", | |
230 | .driver_name = "venc", | |
231 | .type = OMAP_DISPLAY_TYPE_VENC, | |
232 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
233 | .platform_enable = omap3_evm_enable_tv, | |
234 | .platform_disable = omap3_evm_disable_tv, | |
235 | }; | |
236 | ||
2e6f2ee7 | 237 | static struct tfp410_platform_data dvi_panel = { |
e813a55e | 238 | .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO, |
89747c91 BW |
239 | }; |
240 | ||
703e3061 VH |
241 | static struct omap_dss_device omap3_evm_dvi_device = { |
242 | .name = "dvi", | |
703e3061 | 243 | .type = OMAP_DISPLAY_TYPE_DPI, |
2e6f2ee7 | 244 | .driver_name = "tfp410", |
89747c91 | 245 | .data = &dvi_panel, |
703e3061 | 246 | .phy.dpi.data_lines = 24, |
703e3061 VH |
247 | }; |
248 | ||
249 | static struct omap_dss_device *omap3_evm_dss_devices[] = { | |
250 | &omap3_evm_lcd_device, | |
251 | &omap3_evm_tv_device, | |
252 | &omap3_evm_dvi_device, | |
253 | }; | |
254 | ||
255 | static struct omap_dss_board_info omap3_evm_dss_data = { | |
256 | .num_devices = ARRAY_SIZE(omap3_evm_dss_devices), | |
257 | .devices = omap3_evm_dss_devices, | |
258 | .default_device = &omap3_evm_lcd_device, | |
259 | }; | |
260 | ||
786b01a8 OD |
261 | static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = { |
262 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
1a7ec135 MR |
263 | }; |
264 | ||
786b01a8 OD |
265 | static struct regulator_consumer_supply omap3evm_vsim_supply[] = { |
266 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | |
1a7ec135 MR |
267 | }; |
268 | ||
269 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | |
270 | static struct regulator_init_data omap3evm_vmmc1 = { | |
271 | .constraints = { | |
272 | .min_uV = 1850000, | |
273 | .max_uV = 3150000, | |
274 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
275 | | REGULATOR_MODE_STANDBY, | |
276 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
277 | | REGULATOR_CHANGE_MODE | |
278 | | REGULATOR_CHANGE_STATUS, | |
279 | }, | |
786b01a8 OD |
280 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply), |
281 | .consumer_supplies = omap3evm_vmmc1_supply, | |
1a7ec135 MR |
282 | }; |
283 | ||
284 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | |
285 | static struct regulator_init_data omap3evm_vsim = { | |
286 | .constraints = { | |
287 | .min_uV = 1800000, | |
288 | .max_uV = 3000000, | |
289 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
290 | | REGULATOR_MODE_STANDBY, | |
291 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
292 | | REGULATOR_CHANGE_MODE | |
293 | | REGULATOR_CHANGE_STATUS, | |
294 | }, | |
786b01a8 OD |
295 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply), |
296 | .consumer_supplies = omap3evm_vsim_supply, | |
1a7ec135 MR |
297 | }; |
298 | ||
68ff0423 | 299 | static struct omap2_hsmmc_info mmc[] = { |
53c5ec31 SMK |
300 | { |
301 | .mmc = 1, | |
3a63833e | 302 | .caps = MMC_CAP_4_BIT_DATA, |
53c5ec31 SMK |
303 | .gpio_cd = -EINVAL, |
304 | .gpio_wp = 63, | |
3b972bf0 | 305 | .deferred = true, |
53c5ec31 | 306 | }, |
741927f7 ER |
307 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
308 | { | |
309 | .name = "wl1271", | |
aca6ad07 | 310 | .mmc = 2, |
741927f7 ER |
311 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, |
312 | .gpio_wp = -EINVAL, | |
313 | .gpio_cd = -EINVAL, | |
314 | .nonremovable = true, | |
315 | }, | |
316 | #endif | |
53c5ec31 SMK |
317 | {} /* Terminator */ |
318 | }; | |
319 | ||
320 | static struct gpio_led gpio_leds[] = { | |
321 | { | |
322 | .name = "omap3evm::ledb", | |
323 | /* normally not visible (board underside) */ | |
324 | .default_trigger = "default-on", | |
325 | .gpio = -EINVAL, /* gets replaced */ | |
326 | .active_low = true, | |
327 | }, | |
328 | }; | |
329 | ||
330 | static struct gpio_led_platform_data gpio_led_info = { | |
331 | .leds = gpio_leds, | |
332 | .num_leds = ARRAY_SIZE(gpio_leds), | |
333 | }; | |
334 | ||
335 | static struct platform_device leds_gpio = { | |
336 | .name = "leds-gpio", | |
337 | .id = -1, | |
338 | .dev = { | |
339 | .platform_data = &gpio_led_info, | |
340 | }, | |
341 | }; | |
342 | ||
343 | ||
344 | static int omap3evm_twl_gpio_setup(struct device *dev, | |
345 | unsigned gpio, unsigned ngpio) | |
346 | { | |
bc593f5d | 347 | int r, lcd_bl_en; |
42fc8cab | 348 | |
53c5ec31 | 349 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
53c5ec31 | 350 | mmc[0].gpio_cd = gpio + 0; |
3b972bf0 | 351 | omap_hsmmc_late_init(mmc); |
53c5ec31 SMK |
352 | |
353 | /* | |
354 | * Most GPIOs are for USB OTG. Some are mostly sent to | |
355 | * the P2 connector; notably LEDA for the LCD backlight. | |
356 | */ | |
357 | ||
703e3061 | 358 | /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ |
bc593f5d IG |
359 | lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ? |
360 | GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; | |
361 | r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL"); | |
42fc8cab VH |
362 | if (r) |
363 | printk(KERN_ERR "failed to get/set lcd_bkl gpio\n"); | |
703e3061 VH |
364 | |
365 | /* gpio + 7 == DVI Enable */ | |
bc593f5d | 366 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); |
703e3061 | 367 | |
53c5ec31 | 368 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
ebe8f7e5 | 369 | gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1; |
53c5ec31 SMK |
370 | |
371 | platform_device_register(&leds_gpio); | |
372 | ||
cb8ca589 ZC |
373 | /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output |
374 | * for starting USB tranceiver | |
375 | */ | |
b103a2e2 | 376 | #ifdef CONFIG_TWL4030_CORE |
cb8ca589 ZC |
377 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { |
378 | u8 val; | |
379 | ||
380 | twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1); | |
381 | val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */ | |
382 | twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1); | |
383 | } | |
b103a2e2 | 384 | #endif |
cb8ca589 | 385 | |
53c5ec31 SMK |
386 | return 0; |
387 | } | |
388 | ||
389 | static struct twl4030_gpio_platform_data omap3evm_gpio_data = { | |
53c5ec31 SMK |
390 | .use_leds = true, |
391 | .setup = omap3evm_twl_gpio_setup, | |
392 | }; | |
393 | ||
bead4375 | 394 | static uint32_t board_keymap[] = { |
53c5ec31 | 395 | KEY(0, 0, KEY_LEFT), |
0621d756 SP |
396 | KEY(0, 1, KEY_DOWN), |
397 | KEY(0, 2, KEY_ENTER), | |
398 | KEY(0, 3, KEY_M), | |
399 | ||
400 | KEY(1, 0, KEY_RIGHT), | |
53c5ec31 | 401 | KEY(1, 1, KEY_UP), |
0621d756 SP |
402 | KEY(1, 2, KEY_I), |
403 | KEY(1, 3, KEY_N), | |
404 | ||
405 | KEY(2, 0, KEY_A), | |
406 | KEY(2, 1, KEY_E), | |
53c5ec31 | 407 | KEY(2, 2, KEY_J), |
0621d756 SP |
408 | KEY(2, 3, KEY_O), |
409 | ||
410 | KEY(3, 0, KEY_B), | |
411 | KEY(3, 1, KEY_F), | |
412 | KEY(3, 2, KEY_K), | |
53c5ec31 SMK |
413 | KEY(3, 3, KEY_P) |
414 | }; | |
415 | ||
4f543332 TL |
416 | static struct matrix_keymap_data board_map_data = { |
417 | .keymap = board_keymap, | |
418 | .keymap_size = ARRAY_SIZE(board_keymap), | |
419 | }; | |
420 | ||
53c5ec31 | 421 | static struct twl4030_keypad_data omap3evm_kp_data = { |
4f543332 | 422 | .keymap_data = &board_map_data, |
53c5ec31 SMK |
423 | .rows = 4, |
424 | .cols = 4, | |
53c5ec31 SMK |
425 | .rep = 1, |
426 | }; | |
427 | ||
410491d4 | 428 | /* ads7846 on SPI */ |
786b01a8 OD |
429 | static struct regulator_consumer_supply omap3evm_vio_supply[] = { |
430 | REGULATOR_SUPPLY("vcc", "spi1.0"), | |
431 | }; | |
410491d4 VH |
432 | |
433 | /* VIO for ads7846 */ | |
434 | static struct regulator_init_data omap3evm_vio = { | |
435 | .constraints = { | |
436 | .min_uV = 1800000, | |
437 | .max_uV = 1800000, | |
438 | .apply_uV = true, | |
439 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
440 | | REGULATOR_MODE_STANDBY, | |
441 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
442 | | REGULATOR_CHANGE_STATUS, | |
443 | }, | |
786b01a8 OD |
444 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply), |
445 | .consumer_supplies = omap3evm_vio_supply, | |
410491d4 VH |
446 | }; |
447 | ||
741927f7 ER |
448 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
449 | ||
450 | #define OMAP3EVM_WLAN_PMENA_GPIO (150) | |
451 | #define OMAP3EVM_WLAN_IRQ_GPIO (149) | |
452 | ||
786b01a8 | 453 | static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { |
d19f579a | 454 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
786b01a8 | 455 | }; |
741927f7 ER |
456 | |
457 | /* VMMC2 for driving the WL12xx module */ | |
458 | static struct regulator_init_data omap3evm_vmmc2 = { | |
459 | .constraints = { | |
460 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
461 | }, | |
d19f579a | 462 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply), |
786b01a8 | 463 | .consumer_supplies = omap3evm_vmmc2_supply, |
741927f7 ER |
464 | }; |
465 | ||
466 | static struct fixed_voltage_config omap3evm_vwlan = { | |
467 | .supply_name = "vwl1271", | |
468 | .microvolts = 1800000, /* 1.80V */ | |
469 | .gpio = OMAP3EVM_WLAN_PMENA_GPIO, | |
470 | .startup_delay = 70000, /* 70ms */ | |
471 | .enable_high = 1, | |
472 | .enabled_at_boot = 0, | |
473 | .init_data = &omap3evm_vmmc2, | |
474 | }; | |
475 | ||
aca6ad07 | 476 | static struct platform_device omap3evm_wlan_regulator = { |
741927f7 ER |
477 | .name = "reg-fixed-voltage", |
478 | .id = 1, | |
479 | .dev = { | |
480 | .platform_data = &omap3evm_vwlan, | |
481 | }, | |
482 | }; | |
483 | ||
484 | struct wl12xx_platform_data omap3evm_wlan_data __initdata = { | |
aca6ad07 | 485 | .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */ |
741927f7 ER |
486 | }; |
487 | #endif | |
488 | ||
497af1f3 ZC |
489 | /* VAUX2 for USB */ |
490 | static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = { | |
491 | REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */ | |
492 | REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */ | |
493 | REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"), | |
494 | REGULATOR_SUPPLY("vaux2", NULL), | |
495 | }; | |
496 | ||
497 | static struct regulator_init_data omap3evm_vaux2 = { | |
498 | .constraints = { | |
499 | .min_uV = 2800000, | |
500 | .max_uV = 2800000, | |
501 | .apply_uV = true, | |
502 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
503 | | REGULATOR_MODE_STANDBY, | |
504 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
505 | | REGULATOR_CHANGE_STATUS, | |
506 | }, | |
507 | .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies), | |
508 | .consumer_supplies = omap3evm_vaux2_supplies, | |
509 | }; | |
510 | ||
53c5ec31 | 511 | static struct twl4030_platform_data omap3evm_twldata = { |
53c5ec31 SMK |
512 | /* platform_data for children goes here */ |
513 | .keypad = &omap3evm_kp_data, | |
53c5ec31 | 514 | .gpio = &omap3evm_gpio_data, |
410491d4 | 515 | .vio = &omap3evm_vio, |
fbd8071c MR |
516 | .vmmc1 = &omap3evm_vmmc1, |
517 | .vsim = &omap3evm_vsim, | |
53c5ec31 SMK |
518 | }; |
519 | ||
520 | static int __init omap3_evm_i2c_init(void) | |
521 | { | |
827ed9ae | 522 | omap3_pmic_get_config(&omap3evm_twldata, |
b252b0ef PU |
523 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | |
524 | TWL_COMMON_PDATA_AUDIO, | |
525 | TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | |
526 | ||
527 | omap3evm_twldata.vdac->constraints.apply_uV = true; | |
528 | omap3evm_twldata.vpll2->constraints.apply_uV = true; | |
529 | ||
fbd8071c | 530 | omap3_pmic_init("twl4030", &omap3evm_twldata); |
53c5ec31 SMK |
531 | omap_register_i2c_bus(2, 400, NULL, 0); |
532 | omap_register_i2c_bus(3, 400, NULL, 0); | |
533 | return 0; | |
534 | } | |
535 | ||
181b250c | 536 | static struct usbhs_omap_board_data usbhs_bdata __initdata = { |
58a5491c | 537 | |
181b250c KM |
538 | .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, |
539 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
540 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
58a5491c FB |
541 | |
542 | .phy_reset = true, | |
e8e51d29 | 543 | /* PHY reset GPIO will be runtime programmed based on EVM version */ |
58a5491c | 544 | .reset_gpio_port[0] = -EINVAL, |
e8e51d29 | 545 | .reset_gpio_port[1] = -EINVAL, |
58a5491c FB |
546 | .reset_gpio_port[2] = -EINVAL |
547 | }; | |
548 | ||
ca5742bd | 549 | #ifdef CONFIG_OMAP_MUX |
904c545c | 550 | static struct omap_board_mux omap35x_board_mux[] __initdata = { |
aa6912d8 | 551 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | |
f3a8cde6 | 552 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
aa6912d8 | 553 | OMAP_PIN_OFF_WAKEUPENABLE), |
87520aae | 554 | OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
854c122f VH |
555 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
556 | OMAP_PIN_OFF_WAKEUPENABLE), | |
9bc64b89 VH |
557 | OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
558 | OMAP_PIN_OFF_NONE), | |
559 | OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | | |
560 | OMAP_PIN_OFF_NONE), | |
741927f7 ER |
561 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
562 | /* WLAN IRQ - GPIO 149 */ | |
aca6ad07 | 563 | OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), |
741927f7 ER |
564 | |
565 | /* WLAN POWER ENABLE - GPIO 150 */ | |
566 | OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
567 | ||
568 | /* MMC2 SDIO pin muxes for WL12xx */ | |
569 | OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
570 | OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
571 | OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
572 | OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
573 | OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
574 | OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
575 | #endif | |
ca5742bd TL |
576 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
577 | }; | |
904c545c VH |
578 | |
579 | static struct omap_board_mux omap36x_board_mux[] __initdata = { | |
aa6912d8 | 580 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | |
f3a8cde6 | 581 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
aa6912d8 | 582 | OMAP_PIN_OFF_WAKEUPENABLE), |
87520aae | 583 | OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
854c122f VH |
584 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
585 | OMAP_PIN_OFF_WAKEUPENABLE), | |
904c545c VH |
586 | /* AM/DM37x EVM: DSS data bus muxed with sys_boot */ |
587 | OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
588 | OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
589 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
590 | OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
591 | OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
592 | OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
593 | OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
594 | OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
595 | OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
596 | OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
597 | OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
598 | OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE), | |
aca6ad07 ER |
599 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
600 | /* WLAN IRQ - GPIO 149 */ | |
601 | OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
602 | ||
603 | /* WLAN POWER ENABLE - GPIO 150 */ | |
604 | OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
605 | ||
606 | /* MMC2 SDIO pin muxes for WL12xx */ | |
607 | OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
608 | OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
609 | OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
610 | OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
611 | OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
612 | OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
613 | #endif | |
904c545c | 614 | |
ca5742bd TL |
615 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
616 | }; | |
904c545c VH |
617 | #else |
618 | #define omap35x_board_mux NULL | |
619 | #define omap36x_board_mux NULL | |
ca5742bd TL |
620 | #endif |
621 | ||
884b8369 MM |
622 | static struct omap_musb_board_data musb_board_data = { |
623 | .interface_type = MUSB_INTERFACE_ULPI, | |
624 | .mode = MUSB_OTG, | |
625 | .power = 100, | |
626 | }; | |
627 | ||
bc593f5d IG |
628 | static struct gpio omap3_evm_ehci_gpios[] __initdata = { |
629 | { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" }, | |
630 | { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" }, | |
631 | }; | |
632 | ||
70d669de RK |
633 | static void __init omap3_evm_wl12xx_init(void) |
634 | { | |
635 | #ifdef CONFIG_WL12XX_PLATFORM_DATA | |
636 | int ret; | |
637 | ||
638 | /* WL12xx WLAN Init */ | |
46a0a540 | 639 | omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO); |
70d669de RK |
640 | ret = wl12xx_set_platform_data(&omap3evm_wlan_data); |
641 | if (ret) | |
642 | pr_err("error setting wl12xx data: %d\n", ret); | |
643 | ret = platform_device_register(&omap3evm_wlan_regulator); | |
644 | if (ret) | |
645 | pr_err("error registering wl12xx device: %d\n", ret); | |
646 | #endif | |
647 | } | |
648 | ||
5b3689f4 RD |
649 | static struct regulator_consumer_supply dummy_supplies[] = { |
650 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | |
651 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | |
652 | }; | |
653 | ||
dc42c8bd ZC |
654 | static struct mtd_partition omap3evm_nand_partitions[] = { |
655 | /* All the partition sizes are listed in terms of NAND block size */ | |
656 | { | |
657 | .name = "X-Loader", | |
658 | .offset = 0, | |
659 | .size = 4*(SZ_128K), | |
660 | .mask_flags = MTD_WRITEABLE | |
661 | }, | |
662 | { | |
663 | .name = "U-Boot", | |
664 | .offset = MTDPART_OFS_APPEND, | |
665 | .size = 14*(SZ_128K), | |
666 | .mask_flags = MTD_WRITEABLE | |
667 | }, | |
668 | { | |
669 | .name = "U-Boot Env", | |
670 | .offset = MTDPART_OFS_APPEND, | |
671 | .size = 2*(SZ_128K) | |
672 | }, | |
673 | { | |
674 | .name = "Kernel", | |
675 | .offset = MTDPART_OFS_APPEND, | |
676 | .size = 40*(SZ_128K) | |
677 | }, | |
678 | { | |
679 | .name = "File system", | |
680 | .size = MTDPART_SIZ_FULL, | |
681 | .offset = MTDPART_OFS_APPEND, | |
682 | }, | |
683 | }; | |
684 | ||
53c5ec31 SMK |
685 | static void __init omap3_evm_init(void) |
686 | { | |
eeb3711b PW |
687 | struct omap_board_mux *obm; |
688 | ||
db408023 | 689 | omap3_evm_get_revision(); |
5b3689f4 | 690 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); |
904c545c | 691 | |
eeb3711b PW |
692 | obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux; |
693 | omap3_mux_init(obm, OMAP_PACKAGE_CBB); | |
db408023 | 694 | |
d1589f09 | 695 | omap_mux_init_gpio(63, OMAP_PIN_INPUT); |
3b972bf0 | 696 | omap_hsmmc_init(mmc); |
d1589f09 | 697 | |
497af1f3 ZC |
698 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) |
699 | omap3evm_twldata.vaux2 = &omap3evm_vaux2; | |
700 | ||
53c5ec31 SMK |
701 | omap3_evm_i2c_init(); |
702 | ||
d5e13227 | 703 | omap_display_init(&omap3_evm_dss_data); |
53c5ec31 | 704 | |
53c5ec31 | 705 | omap_serial_init(); |
a4ca9dbe | 706 | omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL); |
1a4f4637 | 707 | |
e8e2ff46 GAK |
708 | /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ |
709 | usb_nop_xceiv_register(); | |
1a4f4637 | 710 | |
e8e51d29 AKG |
711 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { |
712 | /* enable EHCI VBUS using GPIO22 */ | |
bc593f5d | 713 | omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP); |
e8e51d29 | 714 | /* Select EHCI port on main board */ |
bc593f5d IG |
715 | omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT, |
716 | OMAP_PIN_INPUT_PULLUP); | |
717 | gpio_request_array(omap3_evm_ehci_gpios, | |
718 | ARRAY_SIZE(omap3_evm_ehci_gpios)); | |
e8e51d29 AKG |
719 | |
720 | /* setup EHCI phy reset config */ | |
4896e394 | 721 | omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP); |
181b250c | 722 | usbhs_bdata.reset_gpio_port[1] = 21; |
e8e51d29 | 723 | |
58815fa3 AKG |
724 | /* EVM REV >= E can supply 500mA with EXTVBUS programming */ |
725 | musb_board_data.power = 500; | |
726 | musb_board_data.extvbus = 1; | |
e8e51d29 AKG |
727 | } else { |
728 | /* setup EHCI phy reset on MDC */ | |
4896e394 | 729 | omap_mux_init_gpio(135, OMAP_PIN_OUTPUT); |
181b250c | 730 | usbhs_bdata.reset_gpio_port[1] = 135; |
e8e51d29 | 731 | } |
884b8369 | 732 | usb_musb_init(&musb_board_data); |
9e64bb1e | 733 | usbhs_init(&usbhs_bdata); |
dc42c8bd ZC |
734 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions, |
735 | ARRAY_SIZE(omap3evm_nand_partitions)); | |
736 | ||
96974a24 | 737 | omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); |
562138a4 | 738 | omap3evm_init_smsc911x(); |
703e3061 | 739 | omap3_evm_display_init(); |
70d669de | 740 | omap3_evm_wl12xx_init(); |
53c5ec31 SMK |
741 | } |
742 | ||
53c5ec31 SMK |
743 | MACHINE_START(OMAP3EVM, "OMAP3 EVM") |
744 | /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ | |
5e52b435 | 745 | .atag_offset = 0x100, |
71ee7dad | 746 | .reserve = omap_reserve, |
3dc3bad6 | 747 | .map_io = omap3_map_io, |
8f5b5a41 | 748 | .init_early = omap35xx_init_early, |
741e3a89 | 749 | .init_irq = omap3_init_irq, |
6b2f55d7 | 750 | .handle_irq = omap3_intc_handle_irq, |
53c5ec31 | 751 | .init_machine = omap3_evm_init, |
bbd707ac | 752 | .init_late = omap35xx_init_late, |
e74984e4 | 753 | .timer = &omap3_timer, |
baa95883 | 754 | .restart = omap_prcm_restart, |
53c5ec31 | 755 | MACHINE_END |