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ARM: OMAP: omap_device: Expose omap_device_{alloc, delete, register}
[deliverable/linux.git] / arch / arm / mach-omap2 / board-omap3evm.c
CommitLineData
53c5ec31
SMK		 1/*
2 * linux/arch/arm/mach-omap2/board-omap3evm.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/err.h>
20#include <linux/clk.h>
21#include <linux/gpio.h>
22#include <linux/input.h>
6135434a 23#include <linux/input/matrix_keypad.h>
53c5ec31 24#include <linux/leds.h>
562138a4 25#include <linux/interrupt.h>
53c5ec31
SMK		 26
27#include <linux/spi/spi.h>
28#include <linux/spi/ads7846.h>
ebeb53e1 29#include <linux/i2c/twl.h>
e8e2ff46 30#include <linux/usb/otg.h>
562138a4 31#include <linux/smsc911x.h>
53c5ec31 32
741927f7
ER		 33#include <linux/wl12xx.h>
34#include <linux/regulator/fixed.h>
1a7ec135 35#include <linux/regulator/machine.h>
3a63833e 36#include <linux/mmc/host.h>
dc28094b 37#include <linux/export.h>
1a7ec135 38
53c5ec31
SMK		 39#include <mach/hardware.h>
40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
43
ce491cf8 44#include <plat/board.h>
ce491cf8 45#include <plat/usb.h>
4e65331c 46#include "common.h"
ce491cf8 47#include <plat/mcspi.h>
a0b38cc4 48#include <video/omapdss.h>
1d7a8654 49#include <video/omap-panel-dvi.h>
53c5ec31 50
ca5742bd 51#include "mux.h"
53c5ec31 52#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 53#include "hsmmc.h"
96974a24 54#include "common-board-devices.h"
53c5ec31
SMK		 55
56#define OMAP3_EVM_TS_GPIO 175
e8e51d29
AKG		 57#define OMAP3_EVM_EHCI_VBUS 22
58#define OMAP3_EVM_EHCI_SELECT 61
53c5ec31
SMK		 59
60#define OMAP3EVM_ETHR_START 0x2c000000
61#define OMAP3EVM_ETHR_SIZE 1024
db408023 62#define OMAP3EVM_ETHR_ID_REV 0x50
53c5ec31 63#define OMAP3EVM_ETHR_GPIO_IRQ 176
562138a4 64#define OMAP3EVM_SMSC911X_CS 5
9bc64b89
VH		 65/*
66 * Eth Reset signal
67 * 64 = Generation 1 (<=RevD)
68 * 7 = Generation 2 (>=RevE)
69 */
70#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
71#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
53c5ec31 72
db408023
AKG		 73static u8 omap3_evm_version;
74
75u8 get_omap3_evm_rev(void)
76{
77 return omap3_evm_version;
78}
79EXPORT_SYMBOL(get_omap3_evm_rev);
80
81static void __init omap3_evm_get_revision(void)
82{
83 void __iomem *ioaddr;
84 unsigned int smsc_id;
85
86 /* Ethernet PHY ID is stored at ID_REV register */
87 ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
88 if (!ioaddr)
89 return;
90 smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
91 iounmap(ioaddr);
92
93 switch (smsc_id) {
94 /*SMSC9115 chipset*/
95 case 0x01150000:
96 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
97 break;
98 /*SMSC 9220 chipset*/
99 case 0x92200000:
100 default:
101 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
102 }
103}
104
562138a4 105#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
21b42731 106#include <plat/gpmc-smsc911x.h>
53c5ec31 107
21b42731
MR		 108static struct omap_smsc911x_platform_data smsc911x_cfg = {
109 .cs = OMAP3EVM_SMSC911X_CS,
110 .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
111 .gpio_reset = -EINVAL,
112 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
53c5ec31
SMK		 113};
114
562138a4 115static inline void __init omap3evm_init_smsc911x(void)
53c5ec31 116{
53c5ec31
SMK		 117 struct clk *l3ck;
118 unsigned int rate;
119
53c5ec31
SMK		 120 l3ck = clk_get(NULL, "l3_ck");
121 if (IS_ERR(l3ck))
122 rate = 100000000;
123 else
124 rate = clk_get_rate(l3ck);
125
9bc64b89
VH		 126 /* Configure ethernet controller reset gpio */
127 if (cpu_is_omap3430()) {
21b42731
MR		 128 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
129 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
130 else
131 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
53c5ec31
SMK		 132 }
133
21b42731 134 gpmc_smsc911x_init(&smsc911x_cfg);
53c5ec31
SMK		 135}
136
562138a4
S		 137#else
138static inline void __init omap3evm_init_smsc911x(void) { return; }
139#endif
140
703e3061
VH		 141/*
142 * OMAP3EVM LCD Panel control signals
143 */
144#define OMAP3EVM_LCD_PANEL_LR 2
145#define OMAP3EVM_LCD_PANEL_UD 3
146#define OMAP3EVM_LCD_PANEL_INI 152
147#define OMAP3EVM_LCD_PANEL_ENVDD 153
148#define OMAP3EVM_LCD_PANEL_QVGA 154
149#define OMAP3EVM_LCD_PANEL_RESB 155
150#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
151#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
152
bc593f5d
IG		 153static struct gpio omap3_evm_dss_gpios[] __initdata = {
154 { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" },
155 { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" },
156 { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" },
157 { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" },
158 { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" },
159 { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
160};
161
703e3061
VH		 162static int lcd_enabled;
163static int dvi_enabled;
164
165static void __init omap3_evm_display_init(void)
166{
167 int r;
168
bc593f5d
IG		 169 r = gpio_request_array(omap3_evm_dss_gpios,
170 ARRAY_SIZE(omap3_evm_dss_gpios));
171 if (r)
172 printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
703e3061
VH		 173}
174
175static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
176{
177 if (dvi_enabled) {
178 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
179 return -EINVAL;
180 }
181 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
182
183 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
f186e9b2 184 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
703e3061 185 else
f186e9b2 186 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
703e3061
VH		 187
188 lcd_enabled = 1;
189 return 0;
190}
191
192static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
193{
194 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
195
196 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
f186e9b2 197 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
703e3061 198 else
f186e9b2 199 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
703e3061
VH		 200
201 lcd_enabled = 0;
202}
203
204static struct omap_dss_device omap3_evm_lcd_device = {
205 .name = "lcd",
206 .driver_name = "sharp_ls_panel",
207 .type = OMAP_DISPLAY_TYPE_DPI,
208 .phy.dpi.data_lines = 18,
209 .platform_enable = omap3_evm_enable_lcd,
210 .platform_disable = omap3_evm_disable_lcd,
211};
212
213static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
214{
215 return 0;
216}
217
218static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
219{
220}
221
222static struct omap_dss_device omap3_evm_tv_device = {
223 .name = "tv",
224 .driver_name = "venc",
225 .type = OMAP_DISPLAY_TYPE_VENC,
226 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
227 .platform_enable = omap3_evm_enable_tv,
228 .platform_disable = omap3_evm_disable_tv,
229};
230
231static int omap3_evm_enable_dvi(struct omap_dss_device *dssdev)
232{
233 if (lcd_enabled) {
234 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
235 return -EINVAL;
236 }
237
f186e9b2 238 gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 1);
703e3061
VH		 239
240 dvi_enabled = 1;
241 return 0;
242}
243
244static void omap3_evm_disable_dvi(struct omap_dss_device *dssdev)
245{
f186e9b2 246 gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 0);
703e3061
VH		 247
248 dvi_enabled = 0;
249}
250
1d7a8654 251static struct panel_dvi_platform_data dvi_panel = {
89747c91
BW		 252 .platform_enable = omap3_evm_enable_dvi,
253 .platform_disable = omap3_evm_disable_dvi,
254};
255
703e3061
VH		 256static struct omap_dss_device omap3_evm_dvi_device = {
257 .name = "dvi",
703e3061 258 .type = OMAP_DISPLAY_TYPE_DPI,
1d7a8654 259 .driver_name = "dvi",
89747c91 260 .data = &dvi_panel,
703e3061 261 .phy.dpi.data_lines = 24,
703e3061
VH		 262};
263
264static struct omap_dss_device *omap3_evm_dss_devices[] = {
265 &omap3_evm_lcd_device,
266 &omap3_evm_tv_device,
267 &omap3_evm_dvi_device,
268};
269
270static struct omap_dss_board_info omap3_evm_dss_data = {
271 .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
272 .devices = omap3_evm_dss_devices,
273 .default_device = &omap3_evm_lcd_device,
274};
275
786b01a8
OD		 276static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
277 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
1a7ec135
MR		 278};
279
786b01a8
OD		 280static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
281 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
1a7ec135
MR		 282};
283
284/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
285static struct regulator_init_data omap3evm_vmmc1 = {
286 .constraints = {
287 .min_uV = 1850000,
288 .max_uV = 3150000,
289 .valid_modes_mask = REGULATOR_MODE_NORMAL
290 | REGULATOR_MODE_STANDBY,
291 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
292 | REGULATOR_CHANGE_MODE
293 | REGULATOR_CHANGE_STATUS,
294 },
786b01a8
OD		 295 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
296 .consumer_supplies = omap3evm_vmmc1_supply,
1a7ec135
MR		 297};
298
299/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
300static struct regulator_init_data omap3evm_vsim = {
301 .constraints = {
302 .min_uV = 1800000,
303 .max_uV = 3000000,
304 .valid_modes_mask = REGULATOR_MODE_NORMAL
305 | REGULATOR_MODE_STANDBY,
306 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
307 | REGULATOR_CHANGE_MODE
308 | REGULATOR_CHANGE_STATUS,
309 },
786b01a8
OD		 310 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
311 .consumer_supplies = omap3evm_vsim_supply,
1a7ec135
MR		 312};
313
68ff0423 314static struct omap2_hsmmc_info mmc[] = {
53c5ec31
SMK		 315 {
316 .mmc = 1,
3a63833e 317 .caps = MMC_CAP_4_BIT_DATA,
53c5ec31
SMK		 318 .gpio_cd = -EINVAL,
319 .gpio_wp = 63,
320 },
741927f7
ER		 321#ifdef CONFIG_WL12XX_PLATFORM_DATA
322 {
323 .name = "wl1271",
aca6ad07 324 .mmc = 2,
741927f7
ER		 325 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
326 .gpio_wp = -EINVAL,
327 .gpio_cd = -EINVAL,
328 .nonremovable = true,
329 },
330#endif
53c5ec31
SMK		 331 {} /* Terminator */
332};
333
334static struct gpio_led gpio_leds[] = {
335 {
336 .name = "omap3evm::ledb",
337 /* normally not visible (board underside) */
338 .default_trigger = "default-on",
339 .gpio = -EINVAL, /* gets replaced */
340 .active_low = true,
341 },
342};
343
344static struct gpio_led_platform_data gpio_led_info = {
345 .leds = gpio_leds,
346 .num_leds = ARRAY_SIZE(gpio_leds),
347};
348
349static struct platform_device leds_gpio = {
350 .name = "leds-gpio",
351 .id = -1,
352 .dev = {
353 .platform_data = &gpio_led_info,
354 },
355};
356
357
358static int omap3evm_twl_gpio_setup(struct device *dev,
359 unsigned gpio, unsigned ngpio)
360{
bc593f5d 361 int r, lcd_bl_en;
42fc8cab 362
53c5ec31 363 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
4896e394 364 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
53c5ec31 365 mmc[0].gpio_cd = gpio + 0;
68ff0423 366 omap2_hsmmc_init(mmc);
53c5ec31
SMK		 367
368 /*
369 * Most GPIOs are for USB OTG. Some are mostly sent to
370 * the P2 connector; notably LEDA for the LCD backlight.
371 */
372
703e3061 373 /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
bc593f5d
IG		 374 lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
375 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
376 r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
42fc8cab
VH		 377 if (r)
378 printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
703e3061
VH		 379
380 /* gpio + 7 == DVI Enable */
bc593f5d 381 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
703e3061 382
53c5ec31
SMK		 383 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
384 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
385
386 platform_device_register(&leds_gpio);
387
388 return 0;
389}
390
391static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
392 .gpio_base = OMAP_MAX_GPIO_LINES,
393 .irq_base = TWL4030_GPIO_IRQ_BASE,
394 .irq_end = TWL4030_GPIO_IRQ_END,
395 .use_leds = true,
396 .setup = omap3evm_twl_gpio_setup,
397};
398
bead4375 399static uint32_t board_keymap[] = {
53c5ec31 400 KEY(0, 0, KEY_LEFT),
0621d756
SP		 401 KEY(0, 1, KEY_DOWN),
402 KEY(0, 2, KEY_ENTER),
403 KEY(0, 3, KEY_M),
404
405 KEY(1, 0, KEY_RIGHT),
53c5ec31 406 KEY(1, 1, KEY_UP),
0621d756
SP		 407 KEY(1, 2, KEY_I),
408 KEY(1, 3, KEY_N),
409
410 KEY(2, 0, KEY_A),
411 KEY(2, 1, KEY_E),
53c5ec31 412 KEY(2, 2, KEY_J),
0621d756
SP		 413 KEY(2, 3, KEY_O),
414
415 KEY(3, 0, KEY_B),
416 KEY(3, 1, KEY_F),
417 KEY(3, 2, KEY_K),
53c5ec31
SMK		 418 KEY(3, 3, KEY_P)
419};
420
4f543332
TL		 421static struct matrix_keymap_data board_map_data = {
422 .keymap = board_keymap,
423 .keymap_size = ARRAY_SIZE(board_keymap),
424};
425
53c5ec31 426static struct twl4030_keypad_data omap3evm_kp_data = {
4f543332 427 .keymap_data = &board_map_data,
53c5ec31
SMK		 428 .rows = 4,
429 .cols = 4,
53c5ec31
SMK		 430 .rep = 1,
431};
432
410491d4 433/* ads7846 on SPI */
786b01a8
OD		 434static struct regulator_consumer_supply omap3evm_vio_supply[] = {
435 REGULATOR_SUPPLY("vcc", "spi1.0"),
436};
410491d4
VH		 437
438/* VIO for ads7846 */
439static struct regulator_init_data omap3evm_vio = {
440 .constraints = {
441 .min_uV = 1800000,
442 .max_uV = 1800000,
443 .apply_uV = true,
444 .valid_modes_mask = REGULATOR_MODE_NORMAL
445 | REGULATOR_MODE_STANDBY,
446 .valid_ops_mask = REGULATOR_CHANGE_MODE
447 | REGULATOR_CHANGE_STATUS,
448 },
786b01a8
OD		 449 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
450 .consumer_supplies = omap3evm_vio_supply,
410491d4
VH		 451};
452
741927f7
ER		 453#ifdef CONFIG_WL12XX_PLATFORM_DATA
454
455#define OMAP3EVM_WLAN_PMENA_GPIO (150)
456#define OMAP3EVM_WLAN_IRQ_GPIO (149)
457
786b01a8 458static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
d19f579a 459 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
786b01a8 460};
741927f7
ER		 461
462/* VMMC2 for driving the WL12xx module */
463static struct regulator_init_data omap3evm_vmmc2 = {
464 .constraints = {
465 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
466 },
d19f579a 467 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
786b01a8 468 .consumer_supplies = omap3evm_vmmc2_supply,
741927f7
ER		 469};
470
471static struct fixed_voltage_config omap3evm_vwlan = {
472 .supply_name = "vwl1271",
473 .microvolts = 1800000, /* 1.80V */
474 .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
475 .startup_delay = 70000, /* 70ms */
476 .enable_high = 1,
477 .enabled_at_boot = 0,
478 .init_data = &omap3evm_vmmc2,
479};
480
aca6ad07 481static struct platform_device omap3evm_wlan_regulator = {
741927f7
ER		 482 .name = "reg-fixed-voltage",
483 .id = 1,
484 .dev = {
485 .platform_data = &omap3evm_vwlan,
486 },
487};
488
489struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
490 .irq = OMAP_GPIO_IRQ(OMAP3EVM_WLAN_IRQ_GPIO),
aca6ad07 491 .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
741927f7
ER		 492};
493#endif
494
53c5ec31 495static struct twl4030_platform_data omap3evm_twldata = {
53c5ec31
SMK		 496 /* platform_data for children goes here */
497 .keypad = &omap3evm_kp_data,
53c5ec31 498 .gpio = &omap3evm_gpio_data,
410491d4 499 .vio = &omap3evm_vio,
fbd8071c
MR		 500 .vmmc1 = &omap3evm_vmmc1,
501 .vsim = &omap3evm_vsim,
53c5ec31
SMK		 502};
503
504static int __init omap3_evm_i2c_init(void)
505{
827ed9ae 506 omap3_pmic_get_config(&omap3evm_twldata,
b252b0ef
PU		 507 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
508 TWL_COMMON_PDATA_AUDIO,
509 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
510
511 omap3evm_twldata.vdac->constraints.apply_uV = true;
512 omap3evm_twldata.vpll2->constraints.apply_uV = true;
513
fbd8071c 514 omap3_pmic_init("twl4030", &omap3evm_twldata);
53c5ec31
SMK		 515 omap_register_i2c_bus(2, 400, NULL, 0);
516 omap_register_i2c_bus(3, 400, NULL, 0);
517 return 0;
518}
519
b3c6df3a 520static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
b3c6df3a
PW		 521};
522
181b250c 523static struct usbhs_omap_board_data usbhs_bdata __initdata = {
58a5491c 524
181b250c
KM		 525 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
526 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
527 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
58a5491c
FB		 528
529 .phy_reset = true,
e8e51d29 530 /* PHY reset GPIO will be runtime programmed based on EVM version */
58a5491c 531 .reset_gpio_port[0] = -EINVAL,
e8e51d29 532 .reset_gpio_port[1] = -EINVAL,
58a5491c
FB		 533 .reset_gpio_port[2] = -EINVAL
534};
535
ca5742bd 536#ifdef CONFIG_OMAP_MUX
904c545c 537static struct omap_board_mux omap35x_board_mux[] __initdata = {
aa6912d8 538 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 539 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 540 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 541 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 542 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
543 OMAP_PIN_OFF_WAKEUPENABLE),
9bc64b89
VH		 544 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
545 OMAP_PIN_OFF_NONE),
546 OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
547 OMAP_PIN_OFF_NONE),
741927f7
ER		 548#ifdef CONFIG_WL12XX_PLATFORM_DATA
549 /* WLAN IRQ - GPIO 149 */
aca6ad07 550 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
741927f7
ER		 551
552 /* WLAN POWER ENABLE - GPIO 150 */
553 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
554
555 /* MMC2 SDIO pin muxes for WL12xx */
556 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
557 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
558 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
559 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
560 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
561 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
562#endif
ca5742bd
TL		 563 { .reg_offset = OMAP_MUX_TERMINATOR },
564};
904c545c
VH		 565
566static struct omap_board_mux omap36x_board_mux[] __initdata = {
aa6912d8 567 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 568 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 569 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 570 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 571 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
572 OMAP_PIN_OFF_WAKEUPENABLE),
904c545c
VH		 573 /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
574 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
575 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
576 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
577 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
578 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
579 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
580 OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
581 OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
582 OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
583 OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
584 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
585 OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
aca6ad07
ER		 586#ifdef CONFIG_WL12XX_PLATFORM_DATA
587 /* WLAN IRQ - GPIO 149 */
588 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
589
590 /* WLAN POWER ENABLE - GPIO 150 */
591 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
592
593 /* MMC2 SDIO pin muxes for WL12xx */
594 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
595 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
596 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
597 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
598 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
599 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
600#endif
904c545c 601
ca5742bd
TL		 602 { .reg_offset = OMAP_MUX_TERMINATOR },
603};
904c545c
VH		 604#else
605#define omap35x_board_mux NULL
606#define omap36x_board_mux NULL
ca5742bd
TL		 607#endif
608
884b8369
MM		 609static struct omap_musb_board_data musb_board_data = {
610 .interface_type = MUSB_INTERFACE_ULPI,
611 .mode = MUSB_OTG,
612 .power = 100,
613};
614
bc593f5d
IG		 615static struct gpio omap3_evm_ehci_gpios[] __initdata = {
616 { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
617 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
618};
619
70d669de
RK		 620static void __init omap3_evm_wl12xx_init(void)
621{
622#ifdef CONFIG_WL12XX_PLATFORM_DATA
623 int ret;
624
625 /* WL12xx WLAN Init */
626 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
627 if (ret)
628 pr_err("error setting wl12xx data: %d\n", ret);
629 ret = platform_device_register(&omap3evm_wlan_regulator);
630 if (ret)
631 pr_err("error registering wl12xx device: %d\n", ret);
632#endif
633}
634
53c5ec31
SMK		 635static void __init omap3_evm_init(void)
636{
db408023 637 omap3_evm_get_revision();
904c545c
VH		 638
639 if (cpu_is_omap3630())
640 omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB);
641 else
642 omap3_mux_init(omap35x_board_mux, OMAP_PACKAGE_CBB);
db408023 643
e41cccfe
TL		 644 omap_board_config = omap3_evm_config;
645 omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
db408023 646
53c5ec31
SMK		 647 omap3_evm_i2c_init();
648
d5e13227 649 omap_display_init(&omap3_evm_dss_data);
53c5ec31 650
53c5ec31 651 omap_serial_init();
a4ca9dbe 652 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
1a4f4637 653
e8e2ff46
GAK		 654 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
655 usb_nop_xceiv_register();
1a4f4637 656
e8e51d29
AKG		 657 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
658 /* enable EHCI VBUS using GPIO22 */
bc593f5d 659 omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
e8e51d29 660 /* Select EHCI port on main board */
bc593f5d
IG		 661 omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
662 OMAP_PIN_INPUT_PULLUP);
663 gpio_request_array(omap3_evm_ehci_gpios,
664 ARRAY_SIZE(omap3_evm_ehci_gpios));
e8e51d29
AKG		 665
666 /* setup EHCI phy reset config */
4896e394 667 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
181b250c 668 usbhs_bdata.reset_gpio_port[1] = 21;
e8e51d29 669
58815fa3
AKG		 670 /* EVM REV >= E can supply 500mA with EXTVBUS programming */
671 musb_board_data.power = 500;
672 musb_board_data.extvbus = 1;
e8e51d29
AKG		 673 } else {
674 /* setup EHCI phy reset on MDC */
4896e394 675 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
181b250c 676 usbhs_bdata.reset_gpio_port[1] = 135;
e8e51d29 677 }
884b8369 678 usb_musb_init(&musb_board_data);
9e64bb1e 679 usbhs_init(&usbhs_bdata);
96974a24 680 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
562138a4 681 omap3evm_init_smsc911x();
703e3061 682 omap3_evm_display_init();
70d669de 683 omap3_evm_wl12xx_init();
53c5ec31
SMK		 684}
685
53c5ec31
SMK		 686MACHINE_START(OMAP3EVM, "OMAP3 EVM")
687 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
5e52b435 688 .atag_offset = 0x100,
71ee7dad 689 .reserve = omap_reserve,
3dc3bad6 690 .map_io = omap3_map_io,
8f5b5a41 691 .init_early = omap35xx_init_early,
741e3a89 692 .init_irq = omap3_init_irq,
6b2f55d7 693 .handle_irq = omap3_intc_handle_irq,
53c5ec31 694 .init_machine = omap3_evm_init,
e74984e4 695 .timer = &omap3_timer,
baa95883 696 .restart = omap_prcm_restart,
53c5ec31 697MACHINE_END
Linux kernel - Deliverables
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