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53c5ec31 SMK |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-omap3evm.c | |
3 | * | |
4 | * Copyright (C) 2008 Texas Instruments | |
5 | * | |
6 | * Modified from mach-omap2/board-3430sdp.c | |
7 | * | |
8 | * Initial code: Syed Mohammed Khasim | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/clk.h> | |
21 | #include <linux/gpio.h> | |
22 | #include <linux/input.h> | |
6135434a | 23 | #include <linux/input/matrix_keypad.h> |
53c5ec31 | 24 | #include <linux/leds.h> |
562138a4 | 25 | #include <linux/interrupt.h> |
53c5ec31 SMK |
26 | |
27 | #include <linux/spi/spi.h> | |
28 | #include <linux/spi/ads7846.h> | |
ebeb53e1 | 29 | #include <linux/i2c/twl.h> |
e8e2ff46 | 30 | #include <linux/usb/otg.h> |
562138a4 | 31 | #include <linux/smsc911x.h> |
53c5ec31 | 32 | |
741927f7 ER |
33 | #include <linux/wl12xx.h> |
34 | #include <linux/regulator/fixed.h> | |
1a7ec135 | 35 | #include <linux/regulator/machine.h> |
3a63833e | 36 | #include <linux/mmc/host.h> |
1a7ec135 | 37 | |
53c5ec31 SMK |
38 | #include <mach/hardware.h> |
39 | #include <asm/mach-types.h> | |
40 | #include <asm/mach/arch.h> | |
41 | #include <asm/mach/map.h> | |
42 | ||
ce491cf8 | 43 | #include <plat/board.h> |
ce491cf8 TL |
44 | #include <plat/usb.h> |
45 | #include <plat/common.h> | |
46 | #include <plat/mcspi.h> | |
703e3061 | 47 | #include <plat/display.h> |
89747c91 | 48 | #include <plat/panel-generic-dpi.h> |
53c5ec31 | 49 | |
ca5742bd | 50 | #include "mux.h" |
53c5ec31 | 51 | #include "sdram-micron-mt46h32m32lf-6.h" |
d02a900b | 52 | #include "hsmmc.h" |
53c5ec31 SMK |
53 | |
54 | #define OMAP3_EVM_TS_GPIO 175 | |
e8e51d29 AKG |
55 | #define OMAP3_EVM_EHCI_VBUS 22 |
56 | #define OMAP3_EVM_EHCI_SELECT 61 | |
53c5ec31 SMK |
57 | |
58 | #define OMAP3EVM_ETHR_START 0x2c000000 | |
59 | #define OMAP3EVM_ETHR_SIZE 1024 | |
db408023 | 60 | #define OMAP3EVM_ETHR_ID_REV 0x50 |
53c5ec31 | 61 | #define OMAP3EVM_ETHR_GPIO_IRQ 176 |
562138a4 | 62 | #define OMAP3EVM_SMSC911X_CS 5 |
9bc64b89 VH |
63 | /* |
64 | * Eth Reset signal | |
65 | * 64 = Generation 1 (<=RevD) | |
66 | * 7 = Generation 2 (>=RevE) | |
67 | */ | |
68 | #define OMAP3EVM_GEN1_ETHR_GPIO_RST 64 | |
69 | #define OMAP3EVM_GEN2_ETHR_GPIO_RST 7 | |
53c5ec31 | 70 | |
db408023 AKG |
71 | static u8 omap3_evm_version; |
72 | ||
73 | u8 get_omap3_evm_rev(void) | |
74 | { | |
75 | return omap3_evm_version; | |
76 | } | |
77 | EXPORT_SYMBOL(get_omap3_evm_rev); | |
78 | ||
79 | static void __init omap3_evm_get_revision(void) | |
80 | { | |
81 | void __iomem *ioaddr; | |
82 | unsigned int smsc_id; | |
83 | ||
84 | /* Ethernet PHY ID is stored at ID_REV register */ | |
85 | ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K); | |
86 | if (!ioaddr) | |
87 | return; | |
88 | smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000; | |
89 | iounmap(ioaddr); | |
90 | ||
91 | switch (smsc_id) { | |
92 | /*SMSC9115 chipset*/ | |
93 | case 0x01150000: | |
94 | omap3_evm_version = OMAP3EVM_BOARD_GEN_1; | |
95 | break; | |
96 | /*SMSC 9220 chipset*/ | |
97 | case 0x92200000: | |
98 | default: | |
99 | omap3_evm_version = OMAP3EVM_BOARD_GEN_2; | |
100 | } | |
101 | } | |
102 | ||
562138a4 S |
103 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
104 | static struct resource omap3evm_smsc911x_resources[] = { | |
53c5ec31 SMK |
105 | [0] = { |
106 | .start = OMAP3EVM_ETHR_START, | |
107 | .end = (OMAP3EVM_ETHR_START + OMAP3EVM_ETHR_SIZE - 1), | |
108 | .flags = IORESOURCE_MEM, | |
109 | }, | |
110 | [1] = { | |
111 | .start = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), | |
112 | .end = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), | |
562138a4 | 113 | .flags = (IORESOURCE_IRQ | IRQF_TRIGGER_LOW), |
53c5ec31 SMK |
114 | }, |
115 | }; | |
116 | ||
562138a4 S |
117 | static struct smsc911x_platform_config smsc911x_config = { |
118 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
119 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
120 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | |
121 | .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS), | |
122 | }; | |
123 | ||
124 | static struct platform_device omap3evm_smsc911x_device = { | |
125 | .name = "smsc911x", | |
53c5ec31 | 126 | .id = -1, |
562138a4 S |
127 | .num_resources = ARRAY_SIZE(omap3evm_smsc911x_resources), |
128 | .resource = &omap3evm_smsc911x_resources[0], | |
129 | .dev = { | |
130 | .platform_data = &smsc911x_config, | |
131 | }, | |
53c5ec31 SMK |
132 | }; |
133 | ||
562138a4 | 134 | static inline void __init omap3evm_init_smsc911x(void) |
53c5ec31 | 135 | { |
9bc64b89 | 136 | int eth_cs, eth_rst; |
53c5ec31 SMK |
137 | struct clk *l3ck; |
138 | unsigned int rate; | |
139 | ||
9bc64b89 VH |
140 | if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) |
141 | eth_rst = OMAP3EVM_GEN1_ETHR_GPIO_RST; | |
142 | else | |
143 | eth_rst = OMAP3EVM_GEN2_ETHR_GPIO_RST; | |
144 | ||
562138a4 | 145 | eth_cs = OMAP3EVM_SMSC911X_CS; |
53c5ec31 SMK |
146 | |
147 | l3ck = clk_get(NULL, "l3_ck"); | |
148 | if (IS_ERR(l3ck)) | |
149 | rate = 100000000; | |
150 | else | |
151 | rate = clk_get_rate(l3ck); | |
152 | ||
9bc64b89 VH |
153 | /* Configure ethernet controller reset gpio */ |
154 | if (cpu_is_omap3430()) { | |
155 | if (gpio_request(eth_rst, "SMSC911x gpio") < 0) { | |
156 | pr_err(KERN_ERR "Failed to request %d for smsc911x\n", | |
157 | eth_rst); | |
158 | return; | |
159 | } | |
160 | ||
161 | if (gpio_direction_output(eth_rst, 1) < 0) { | |
162 | pr_err(KERN_ERR "Failed to set direction of %d for" \ | |
163 | " smsc911x\n", eth_rst); | |
164 | return; | |
165 | } | |
166 | /* reset pulse to ethernet controller*/ | |
167 | usleep_range(150, 220); | |
168 | gpio_set_value(eth_rst, 0); | |
169 | usleep_range(150, 220); | |
170 | gpio_set_value(eth_rst, 1); | |
171 | usleep_range(1, 2); | |
172 | } | |
173 | ||
562138a4 S |
174 | if (gpio_request(OMAP3EVM_ETHR_GPIO_IRQ, "SMSC911x irq") < 0) { |
175 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", | |
53c5ec31 SMK |
176 | OMAP3EVM_ETHR_GPIO_IRQ); |
177 | return; | |
178 | } | |
179 | ||
180 | gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); | |
562138a4 | 181 | platform_device_register(&omap3evm_smsc911x_device); |
53c5ec31 SMK |
182 | } |
183 | ||
562138a4 S |
184 | #else |
185 | static inline void __init omap3evm_init_smsc911x(void) { return; } | |
186 | #endif | |
187 | ||
703e3061 VH |
188 | /* |
189 | * OMAP3EVM LCD Panel control signals | |
190 | */ | |
191 | #define OMAP3EVM_LCD_PANEL_LR 2 | |
192 | #define OMAP3EVM_LCD_PANEL_UD 3 | |
193 | #define OMAP3EVM_LCD_PANEL_INI 152 | |
194 | #define OMAP3EVM_LCD_PANEL_ENVDD 153 | |
195 | #define OMAP3EVM_LCD_PANEL_QVGA 154 | |
196 | #define OMAP3EVM_LCD_PANEL_RESB 155 | |
197 | #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 | |
198 | #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 | |
199 | ||
200 | static int lcd_enabled; | |
201 | static int dvi_enabled; | |
202 | ||
203 | static void __init omap3_evm_display_init(void) | |
204 | { | |
205 | int r; | |
206 | ||
207 | r = gpio_request(OMAP3EVM_LCD_PANEL_RESB, "lcd_panel_resb"); | |
208 | if (r) { | |
209 | printk(KERN_ERR "failed to get lcd_panel_resb\n"); | |
210 | return; | |
211 | } | |
212 | gpio_direction_output(OMAP3EVM_LCD_PANEL_RESB, 1); | |
213 | ||
214 | r = gpio_request(OMAP3EVM_LCD_PANEL_INI, "lcd_panel_ini"); | |
215 | if (r) { | |
216 | printk(KERN_ERR "failed to get lcd_panel_ini\n"); | |
217 | goto err_1; | |
218 | } | |
219 | gpio_direction_output(OMAP3EVM_LCD_PANEL_INI, 1); | |
220 | ||
221 | r = gpio_request(OMAP3EVM_LCD_PANEL_QVGA, "lcd_panel_qvga"); | |
222 | if (r) { | |
223 | printk(KERN_ERR "failed to get lcd_panel_qvga\n"); | |
224 | goto err_2; | |
225 | } | |
226 | gpio_direction_output(OMAP3EVM_LCD_PANEL_QVGA, 0); | |
227 | ||
228 | r = gpio_request(OMAP3EVM_LCD_PANEL_LR, "lcd_panel_lr"); | |
229 | if (r) { | |
230 | printk(KERN_ERR "failed to get lcd_panel_lr\n"); | |
231 | goto err_3; | |
232 | } | |
233 | gpio_direction_output(OMAP3EVM_LCD_PANEL_LR, 1); | |
234 | ||
235 | r = gpio_request(OMAP3EVM_LCD_PANEL_UD, "lcd_panel_ud"); | |
236 | if (r) { | |
237 | printk(KERN_ERR "failed to get lcd_panel_ud\n"); | |
238 | goto err_4; | |
239 | } | |
240 | gpio_direction_output(OMAP3EVM_LCD_PANEL_UD, 1); | |
241 | ||
242 | r = gpio_request(OMAP3EVM_LCD_PANEL_ENVDD, "lcd_panel_envdd"); | |
243 | if (r) { | |
244 | printk(KERN_ERR "failed to get lcd_panel_envdd\n"); | |
245 | goto err_5; | |
246 | } | |
247 | gpio_direction_output(OMAP3EVM_LCD_PANEL_ENVDD, 0); | |
248 | ||
249 | return; | |
250 | ||
251 | err_5: | |
252 | gpio_free(OMAP3EVM_LCD_PANEL_UD); | |
253 | err_4: | |
254 | gpio_free(OMAP3EVM_LCD_PANEL_LR); | |
255 | err_3: | |
256 | gpio_free(OMAP3EVM_LCD_PANEL_QVGA); | |
257 | err_2: | |
258 | gpio_free(OMAP3EVM_LCD_PANEL_INI); | |
259 | err_1: | |
260 | gpio_free(OMAP3EVM_LCD_PANEL_RESB); | |
261 | ||
262 | } | |
263 | ||
264 | static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) | |
265 | { | |
266 | if (dvi_enabled) { | |
267 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | |
268 | return -EINVAL; | |
269 | } | |
270 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0); | |
271 | ||
272 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | |
273 | gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); | |
274 | else | |
275 | gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); | |
276 | ||
277 | lcd_enabled = 1; | |
278 | return 0; | |
279 | } | |
280 | ||
281 | static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev) | |
282 | { | |
283 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1); | |
284 | ||
285 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | |
286 | gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); | |
287 | else | |
288 | gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); | |
289 | ||
290 | lcd_enabled = 0; | |
291 | } | |
292 | ||
293 | static struct omap_dss_device omap3_evm_lcd_device = { | |
294 | .name = "lcd", | |
295 | .driver_name = "sharp_ls_panel", | |
296 | .type = OMAP_DISPLAY_TYPE_DPI, | |
297 | .phy.dpi.data_lines = 18, | |
298 | .platform_enable = omap3_evm_enable_lcd, | |
299 | .platform_disable = omap3_evm_disable_lcd, | |
300 | }; | |
301 | ||
302 | static int omap3_evm_enable_tv(struct omap_dss_device *dssdev) | |
303 | { | |
304 | return 0; | |
305 | } | |
306 | ||
307 | static void omap3_evm_disable_tv(struct omap_dss_device *dssdev) | |
308 | { | |
309 | } | |
310 | ||
311 | static struct omap_dss_device omap3_evm_tv_device = { | |
312 | .name = "tv", | |
313 | .driver_name = "venc", | |
314 | .type = OMAP_DISPLAY_TYPE_VENC, | |
315 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
316 | .platform_enable = omap3_evm_enable_tv, | |
317 | .platform_disable = omap3_evm_disable_tv, | |
318 | }; | |
319 | ||
320 | static int omap3_evm_enable_dvi(struct omap_dss_device *dssdev) | |
321 | { | |
322 | if (lcd_enabled) { | |
323 | printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); | |
324 | return -EINVAL; | |
325 | } | |
326 | ||
327 | gpio_set_value(OMAP3EVM_DVI_PANEL_EN_GPIO, 1); | |
328 | ||
329 | dvi_enabled = 1; | |
330 | return 0; | |
331 | } | |
332 | ||
333 | static void omap3_evm_disable_dvi(struct omap_dss_device *dssdev) | |
334 | { | |
335 | gpio_set_value(OMAP3EVM_DVI_PANEL_EN_GPIO, 0); | |
336 | ||
337 | dvi_enabled = 0; | |
338 | } | |
339 | ||
89747c91 BW |
340 | static struct panel_generic_dpi_data dvi_panel = { |
341 | .name = "generic", | |
342 | .platform_enable = omap3_evm_enable_dvi, | |
343 | .platform_disable = omap3_evm_disable_dvi, | |
344 | }; | |
345 | ||
703e3061 VH |
346 | static struct omap_dss_device omap3_evm_dvi_device = { |
347 | .name = "dvi", | |
703e3061 | 348 | .type = OMAP_DISPLAY_TYPE_DPI, |
89747c91 BW |
349 | .driver_name = "generic_dpi_panel", |
350 | .data = &dvi_panel, | |
703e3061 | 351 | .phy.dpi.data_lines = 24, |
703e3061 VH |
352 | }; |
353 | ||
354 | static struct omap_dss_device *omap3_evm_dss_devices[] = { | |
355 | &omap3_evm_lcd_device, | |
356 | &omap3_evm_tv_device, | |
357 | &omap3_evm_dvi_device, | |
358 | }; | |
359 | ||
360 | static struct omap_dss_board_info omap3_evm_dss_data = { | |
361 | .num_devices = ARRAY_SIZE(omap3_evm_dss_devices), | |
362 | .devices = omap3_evm_dss_devices, | |
363 | .default_device = &omap3_evm_lcd_device, | |
364 | }; | |
365 | ||
366 | static struct platform_device omap3_evm_dss_device = { | |
367 | .name = "omapdss", | |
368 | .id = -1, | |
369 | .dev = { | |
370 | .platform_data = &omap3_evm_dss_data, | |
371 | }, | |
372 | }; | |
373 | ||
1a7ec135 MR |
374 | static struct regulator_consumer_supply omap3evm_vmmc1_supply = { |
375 | .supply = "vmmc", | |
376 | }; | |
377 | ||
378 | static struct regulator_consumer_supply omap3evm_vsim_supply = { | |
379 | .supply = "vmmc_aux", | |
380 | }; | |
381 | ||
382 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | |
383 | static struct regulator_init_data omap3evm_vmmc1 = { | |
384 | .constraints = { | |
385 | .min_uV = 1850000, | |
386 | .max_uV = 3150000, | |
387 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
388 | | REGULATOR_MODE_STANDBY, | |
389 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
390 | | REGULATOR_CHANGE_MODE | |
391 | | REGULATOR_CHANGE_STATUS, | |
392 | }, | |
393 | .num_consumer_supplies = 1, | |
394 | .consumer_supplies = &omap3evm_vmmc1_supply, | |
395 | }; | |
396 | ||
397 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | |
398 | static struct regulator_init_data omap3evm_vsim = { | |
399 | .constraints = { | |
400 | .min_uV = 1800000, | |
401 | .max_uV = 3000000, | |
402 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
403 | | REGULATOR_MODE_STANDBY, | |
404 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
405 | | REGULATOR_CHANGE_MODE | |
406 | | REGULATOR_CHANGE_STATUS, | |
407 | }, | |
408 | .num_consumer_supplies = 1, | |
409 | .consumer_supplies = &omap3evm_vsim_supply, | |
410 | }; | |
411 | ||
68ff0423 | 412 | static struct omap2_hsmmc_info mmc[] = { |
53c5ec31 SMK |
413 | { |
414 | .mmc = 1, | |
3a63833e | 415 | .caps = MMC_CAP_4_BIT_DATA, |
53c5ec31 SMK |
416 | .gpio_cd = -EINVAL, |
417 | .gpio_wp = 63, | |
418 | }, | |
741927f7 ER |
419 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
420 | { | |
421 | .name = "wl1271", | |
422 | .mmc = 2, | |
423 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, | |
424 | .gpio_wp = -EINVAL, | |
425 | .gpio_cd = -EINVAL, | |
426 | .nonremovable = true, | |
427 | }, | |
428 | #endif | |
53c5ec31 SMK |
429 | {} /* Terminator */ |
430 | }; | |
431 | ||
432 | static struct gpio_led gpio_leds[] = { | |
433 | { | |
434 | .name = "omap3evm::ledb", | |
435 | /* normally not visible (board underside) */ | |
436 | .default_trigger = "default-on", | |
437 | .gpio = -EINVAL, /* gets replaced */ | |
438 | .active_low = true, | |
439 | }, | |
440 | }; | |
441 | ||
442 | static struct gpio_led_platform_data gpio_led_info = { | |
443 | .leds = gpio_leds, | |
444 | .num_leds = ARRAY_SIZE(gpio_leds), | |
445 | }; | |
446 | ||
447 | static struct platform_device leds_gpio = { | |
448 | .name = "leds-gpio", | |
449 | .id = -1, | |
450 | .dev = { | |
451 | .platform_data = &gpio_led_info, | |
452 | }, | |
453 | }; | |
454 | ||
455 | ||
456 | static int omap3evm_twl_gpio_setup(struct device *dev, | |
457 | unsigned gpio, unsigned ngpio) | |
458 | { | |
459 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | |
4896e394 | 460 | omap_mux_init_gpio(63, OMAP_PIN_INPUT); |
53c5ec31 | 461 | mmc[0].gpio_cd = gpio + 0; |
68ff0423 | 462 | omap2_hsmmc_init(mmc); |
53c5ec31 | 463 | |
1a7ec135 MR |
464 | /* link regulators to MMC adapters */ |
465 | omap3evm_vmmc1_supply.dev = mmc[0].dev; | |
466 | omap3evm_vsim_supply.dev = mmc[0].dev; | |
467 | ||
53c5ec31 SMK |
468 | /* |
469 | * Most GPIOs are for USB OTG. Some are mostly sent to | |
470 | * the P2 connector; notably LEDA for the LCD backlight. | |
471 | */ | |
472 | ||
703e3061 VH |
473 | /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ |
474 | gpio_request(gpio + TWL4030_GPIO_MAX, "EN_LCD_BKL"); | |
475 | gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); | |
476 | ||
477 | /* gpio + 7 == DVI Enable */ | |
478 | gpio_request(gpio + 7, "EN_DVI"); | |
479 | gpio_direction_output(gpio + 7, 0); | |
480 | ||
53c5ec31 SMK |
481 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
482 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | |
483 | ||
484 | platform_device_register(&leds_gpio); | |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
489 | static struct twl4030_gpio_platform_data omap3evm_gpio_data = { | |
490 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
491 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
492 | .irq_end = TWL4030_GPIO_IRQ_END, | |
493 | .use_leds = true, | |
494 | .setup = omap3evm_twl_gpio_setup, | |
495 | }; | |
496 | ||
497 | static struct twl4030_usb_data omap3evm_usb_data = { | |
498 | .usb_mode = T2_USB_MODE_ULPI, | |
499 | }; | |
500 | ||
bead4375 | 501 | static uint32_t board_keymap[] = { |
53c5ec31 | 502 | KEY(0, 0, KEY_LEFT), |
0621d756 SP |
503 | KEY(0, 1, KEY_DOWN), |
504 | KEY(0, 2, KEY_ENTER), | |
505 | KEY(0, 3, KEY_M), | |
506 | ||
507 | KEY(1, 0, KEY_RIGHT), | |
53c5ec31 | 508 | KEY(1, 1, KEY_UP), |
0621d756 SP |
509 | KEY(1, 2, KEY_I), |
510 | KEY(1, 3, KEY_N), | |
511 | ||
512 | KEY(2, 0, KEY_A), | |
513 | KEY(2, 1, KEY_E), | |
53c5ec31 | 514 | KEY(2, 2, KEY_J), |
0621d756 SP |
515 | KEY(2, 3, KEY_O), |
516 | ||
517 | KEY(3, 0, KEY_B), | |
518 | KEY(3, 1, KEY_F), | |
519 | KEY(3, 2, KEY_K), | |
53c5ec31 SMK |
520 | KEY(3, 3, KEY_P) |
521 | }; | |
522 | ||
4f543332 TL |
523 | static struct matrix_keymap_data board_map_data = { |
524 | .keymap = board_keymap, | |
525 | .keymap_size = ARRAY_SIZE(board_keymap), | |
526 | }; | |
527 | ||
53c5ec31 | 528 | static struct twl4030_keypad_data omap3evm_kp_data = { |
4f543332 | 529 | .keymap_data = &board_map_data, |
53c5ec31 SMK |
530 | .rows = 4, |
531 | .cols = 4, | |
53c5ec31 SMK |
532 | .rep = 1, |
533 | }; | |
534 | ||
535 | static struct twl4030_madc_platform_data omap3evm_madc_data = { | |
536 | .irq_line = 1, | |
537 | }; | |
538 | ||
e86fa0b4 PU |
539 | static struct twl4030_codec_audio_data omap3evm_audio_data = { |
540 | .audio_mclk = 26000000, | |
541 | }; | |
542 | ||
543 | static struct twl4030_codec_data omap3evm_codec_data = { | |
6df74efb | 544 | .audio_mclk = 26000000, |
e86fa0b4 PU |
545 | .audio = &omap3evm_audio_data, |
546 | }; | |
547 | ||
703e3061 VH |
548 | static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = { |
549 | .supply = "vdda_dac", | |
550 | .dev = &omap3_evm_dss_device.dev, | |
551 | }; | |
552 | ||
553 | /* VDAC for DSS driving S-Video */ | |
554 | static struct regulator_init_data omap3_evm_vdac = { | |
555 | .constraints = { | |
556 | .min_uV = 1800000, | |
557 | .max_uV = 1800000, | |
558 | .apply_uV = true, | |
559 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
560 | | REGULATOR_MODE_STANDBY, | |
561 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
562 | | REGULATOR_CHANGE_STATUS, | |
563 | }, | |
564 | .num_consumer_supplies = 1, | |
565 | .consumer_supplies = &omap3_evm_vdda_dac_supply, | |
566 | }; | |
567 | ||
568 | /* VPLL2 for digital video outputs */ | |
f3fe53c1 VH |
569 | static struct regulator_consumer_supply omap3_evm_vpll2_supply = |
570 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"); | |
703e3061 VH |
571 | |
572 | static struct regulator_init_data omap3_evm_vpll2 = { | |
573 | .constraints = { | |
703e3061 VH |
574 | .min_uV = 1800000, |
575 | .max_uV = 1800000, | |
576 | .apply_uV = true, | |
577 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
578 | | REGULATOR_MODE_STANDBY, | |
579 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
580 | | REGULATOR_CHANGE_STATUS, | |
581 | }, | |
582 | .num_consumer_supplies = 1, | |
583 | .consumer_supplies = &omap3_evm_vpll2_supply, | |
584 | }; | |
585 | ||
741927f7 ER |
586 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
587 | ||
588 | #define OMAP3EVM_WLAN_PMENA_GPIO (150) | |
589 | #define OMAP3EVM_WLAN_IRQ_GPIO (149) | |
590 | ||
591 | static struct regulator_consumer_supply omap3evm_vmmc2_supply = { | |
592 | .supply = "vmmc", | |
593 | .dev_name = "mmci-omap-hs.1", | |
594 | }; | |
595 | ||
596 | /* VMMC2 for driving the WL12xx module */ | |
597 | static struct regulator_init_data omap3evm_vmmc2 = { | |
598 | .constraints = { | |
599 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
600 | }, | |
601 | .num_consumer_supplies = 1, | |
602 | .consumer_supplies = &omap3evm_vmmc2_supply, | |
603 | }; | |
604 | ||
605 | static struct fixed_voltage_config omap3evm_vwlan = { | |
606 | .supply_name = "vwl1271", | |
607 | .microvolts = 1800000, /* 1.80V */ | |
608 | .gpio = OMAP3EVM_WLAN_PMENA_GPIO, | |
609 | .startup_delay = 70000, /* 70ms */ | |
610 | .enable_high = 1, | |
611 | .enabled_at_boot = 0, | |
612 | .init_data = &omap3evm_vmmc2, | |
613 | }; | |
614 | ||
615 | static struct platform_device omap3evm_vwlan_device = { | |
616 | .name = "reg-fixed-voltage", | |
617 | .id = 1, | |
618 | .dev = { | |
619 | .platform_data = &omap3evm_vwlan, | |
620 | }, | |
621 | }; | |
622 | ||
623 | struct wl12xx_platform_data omap3evm_wlan_data __initdata = { | |
624 | .irq = OMAP_GPIO_IRQ(OMAP3EVM_WLAN_IRQ_GPIO), | |
625 | /* ref clock is 38.4 MHz */ | |
626 | .board_ref_clock = 2, | |
627 | }; | |
628 | #endif | |
629 | ||
53c5ec31 SMK |
630 | static struct twl4030_platform_data omap3evm_twldata = { |
631 | .irq_base = TWL4030_IRQ_BASE, | |
632 | .irq_end = TWL4030_IRQ_END, | |
633 | ||
634 | /* platform_data for children goes here */ | |
635 | .keypad = &omap3evm_kp_data, | |
636 | .madc = &omap3evm_madc_data, | |
637 | .usb = &omap3evm_usb_data, | |
638 | .gpio = &omap3evm_gpio_data, | |
e86fa0b4 | 639 | .codec = &omap3evm_codec_data, |
703e3061 VH |
640 | .vdac = &omap3_evm_vdac, |
641 | .vpll2 = &omap3_evm_vpll2, | |
53c5ec31 SMK |
642 | }; |
643 | ||
644 | static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = { | |
645 | { | |
646 | I2C_BOARD_INFO("twl4030", 0x48), | |
647 | .flags = I2C_CLIENT_WAKE, | |
648 | .irq = INT_34XX_SYS_NIRQ, | |
649 | .platform_data = &omap3evm_twldata, | |
650 | }, | |
651 | }; | |
652 | ||
653 | static int __init omap3_evm_i2c_init(void) | |
654 | { | |
1a7ec135 MR |
655 | /* |
656 | * REVISIT: These entries can be set in omap3evm_twl_data | |
657 | * after a merge with MFD tree | |
658 | */ | |
659 | omap3evm_twldata.vmmc1 = &omap3evm_vmmc1; | |
660 | omap3evm_twldata.vsim = &omap3evm_vsim; | |
661 | ||
53c5ec31 SMK |
662 | omap_register_i2c_bus(1, 2600, omap3evm_i2c_boardinfo, |
663 | ARRAY_SIZE(omap3evm_i2c_boardinfo)); | |
664 | omap_register_i2c_bus(2, 400, NULL, 0); | |
665 | omap_register_i2c_bus(3, 400, NULL, 0); | |
666 | return 0; | |
667 | } | |
668 | ||
53c5ec31 SMK |
669 | static void ads7846_dev_init(void) |
670 | { | |
671 | if (gpio_request(OMAP3_EVM_TS_GPIO, "ADS7846 pendown") < 0) | |
672 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); | |
673 | ||
674 | gpio_direction_input(OMAP3_EVM_TS_GPIO); | |
48feb337 | 675 | gpio_set_debounce(OMAP3_EVM_TS_GPIO, 310); |
53c5ec31 SMK |
676 | } |
677 | ||
678 | static int ads7846_get_pendown_state(void) | |
679 | { | |
680 | return !gpio_get_value(OMAP3_EVM_TS_GPIO); | |
681 | } | |
682 | ||
38815733 | 683 | static struct ads7846_platform_data ads7846_config = { |
53c5ec31 SMK |
684 | .x_max = 0x0fff, |
685 | .y_max = 0x0fff, | |
686 | .x_plate_ohms = 180, | |
687 | .pressure_max = 255, | |
688 | .debounce_max = 10, | |
689 | .debounce_tol = 3, | |
690 | .debounce_rep = 1, | |
691 | .get_pendown_state = ads7846_get_pendown_state, | |
692 | .keep_vref_on = 1, | |
693 | .settle_delay_usecs = 150, | |
7a44ad2f | 694 | .wakeup = true, |
53c5ec31 SMK |
695 | }; |
696 | ||
697 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | |
698 | .turbo_mode = 0, | |
699 | .single_channel = 1, /* 0: slave, 1: master */ | |
700 | }; | |
701 | ||
38815733 | 702 | static struct spi_board_info omap3evm_spi_board_info[] = { |
53c5ec31 SMK |
703 | [0] = { |
704 | .modalias = "ads7846", | |
705 | .bus_num = 1, | |
706 | .chip_select = 0, | |
707 | .max_speed_hz = 1500000, | |
708 | .controller_data = &ads7846_mcspi_config, | |
709 | .irq = OMAP_GPIO_IRQ(OMAP3_EVM_TS_GPIO), | |
710 | .platform_data = &ads7846_config, | |
711 | }, | |
712 | }; | |
713 | ||
b3c6df3a | 714 | static struct omap_board_config_kernel omap3_evm_config[] __initdata = { |
b3c6df3a PW |
715 | }; |
716 | ||
3dc3bad6 | 717 | static void __init omap3_evm_init_early(void) |
53c5ec31 | 718 | { |
b3c6df3a PW |
719 | omap_board_config = omap3_evm_config; |
720 | omap_board_config_size = ARRAY_SIZE(omap3_evm_config); | |
4805734b PW |
721 | omap2_init_common_infrastructure(); |
722 | omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL); | |
53c5ec31 SMK |
723 | } |
724 | ||
53c5ec31 | 725 | static struct platform_device *omap3_evm_devices[] __initdata = { |
703e3061 | 726 | &omap3_evm_dss_device, |
53c5ec31 SMK |
727 | }; |
728 | ||
6f69a181 | 729 | static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { |
58a5491c FB |
730 | |
731 | .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, | |
732 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | |
733 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | |
734 | ||
735 | .phy_reset = true, | |
e8e51d29 | 736 | /* PHY reset GPIO will be runtime programmed based on EVM version */ |
58a5491c | 737 | .reset_gpio_port[0] = -EINVAL, |
e8e51d29 | 738 | .reset_gpio_port[1] = -EINVAL, |
58a5491c FB |
739 | .reset_gpio_port[2] = -EINVAL |
740 | }; | |
741 | ||
ca5742bd TL |
742 | #ifdef CONFIG_OMAP_MUX |
743 | static struct omap_board_mux board_mux[] __initdata = { | |
aa6912d8 | 744 | OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | |
f3a8cde6 | 745 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW | |
aa6912d8 | 746 | OMAP_PIN_OFF_WAKEUPENABLE), |
87520aae | 747 | OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
7a44ad2f | 748 | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW), |
9bc64b89 VH |
749 | OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | |
750 | OMAP_PIN_OFF_NONE), | |
751 | OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | | |
752 | OMAP_PIN_OFF_NONE), | |
741927f7 ER |
753 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
754 | /* WLAN IRQ - GPIO 149 */ | |
755 | OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), | |
756 | ||
757 | /* WLAN POWER ENABLE - GPIO 150 */ | |
758 | OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), | |
759 | ||
760 | /* MMC2 SDIO pin muxes for WL12xx */ | |
761 | OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
762 | OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
763 | OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
764 | OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
765 | OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
766 | OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), | |
767 | #endif | |
ca5742bd TL |
768 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
769 | }; | |
ca5742bd TL |
770 | #endif |
771 | ||
884b8369 MM |
772 | static struct omap_musb_board_data musb_board_data = { |
773 | .interface_type = MUSB_INTERFACE_ULPI, | |
774 | .mode = MUSB_OTG, | |
775 | .power = 100, | |
776 | }; | |
777 | ||
53c5ec31 SMK |
778 | static void __init omap3_evm_init(void) |
779 | { | |
db408023 | 780 | omap3_evm_get_revision(); |
ca5742bd | 781 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
db408023 | 782 | |
53c5ec31 SMK |
783 | omap3_evm_i2c_init(); |
784 | ||
785 | platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); | |
53c5ec31 SMK |
786 | |
787 | spi_register_board_info(omap3evm_spi_board_info, | |
788 | ARRAY_SIZE(omap3evm_spi_board_info)); | |
789 | ||
790 | omap_serial_init(); | |
1a4f4637 | 791 | |
e8e2ff46 GAK |
792 | /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ |
793 | usb_nop_xceiv_register(); | |
1a4f4637 | 794 | |
e8e51d29 AKG |
795 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { |
796 | /* enable EHCI VBUS using GPIO22 */ | |
4896e394 | 797 | omap_mux_init_gpio(22, OMAP_PIN_INPUT_PULLUP); |
e8e51d29 AKG |
798 | gpio_request(OMAP3_EVM_EHCI_VBUS, "enable EHCI VBUS"); |
799 | gpio_direction_output(OMAP3_EVM_EHCI_VBUS, 0); | |
800 | gpio_set_value(OMAP3_EVM_EHCI_VBUS, 1); | |
801 | ||
802 | /* Select EHCI port on main board */ | |
4896e394 | 803 | omap_mux_init_gpio(61, OMAP_PIN_INPUT_PULLUP); |
e8e51d29 AKG |
804 | gpio_request(OMAP3_EVM_EHCI_SELECT, "select EHCI port"); |
805 | gpio_direction_output(OMAP3_EVM_EHCI_SELECT, 0); | |
806 | gpio_set_value(OMAP3_EVM_EHCI_SELECT, 0); | |
807 | ||
808 | /* setup EHCI phy reset config */ | |
4896e394 | 809 | omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP); |
e8e51d29 AKG |
810 | ehci_pdata.reset_gpio_port[1] = 21; |
811 | ||
58815fa3 AKG |
812 | /* EVM REV >= E can supply 500mA with EXTVBUS programming */ |
813 | musb_board_data.power = 500; | |
814 | musb_board_data.extvbus = 1; | |
e8e51d29 AKG |
815 | } else { |
816 | /* setup EHCI phy reset on MDC */ | |
4896e394 | 817 | omap_mux_init_gpio(135, OMAP_PIN_OUTPUT); |
e8e51d29 AKG |
818 | ehci_pdata.reset_gpio_port[1] = 135; |
819 | } | |
884b8369 | 820 | usb_musb_init(&musb_board_data); |
58a5491c | 821 | usb_ehci_init(&ehci_pdata); |
53c5ec31 | 822 | ads7846_dev_init(); |
562138a4 | 823 | omap3evm_init_smsc911x(); |
703e3061 | 824 | omap3_evm_display_init(); |
741927f7 ER |
825 | |
826 | #ifdef CONFIG_WL12XX_PLATFORM_DATA | |
827 | /* WL12xx WLAN Init */ | |
828 | if (wl12xx_set_platform_data(&omap3evm_wlan_data)) | |
829 | pr_err("error setting wl12xx data\n"); | |
830 | platform_device_register(&omap3evm_vwlan_device); | |
831 | #endif | |
53c5ec31 SMK |
832 | } |
833 | ||
53c5ec31 SMK |
834 | MACHINE_START(OMAP3EVM, "OMAP3 EVM") |
835 | /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ | |
53c5ec31 | 836 | .boot_params = 0x80000100, |
71ee7dad | 837 | .reserve = omap_reserve, |
3dc3bad6 RKAL |
838 | .map_io = omap3_map_io, |
839 | .init_early = omap3_evm_init_early, | |
840 | .init_irq = omap_init_irq, | |
53c5ec31 SMK |
841 | .init_machine = omap3_evm_init, |
842 | .timer = &omap_timer, | |
843 | MACHINE_END |