projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: omap4: Pass core and wakeup mux tables to omap4_mux_init
[deliverable/linux.git] / arch / arm / mach-omap2 / board-omap4panda.c
CommitLineData
b075f58b
DA		 1/*
2 * Board support file for OMAP4430 based PandaBoard.
3 *
4 * Copyright (C) 2010 Texas Instruments
5 *
6 * Author: David Anders <x0132446@ti.com>
7 *
8 * Based on mach-omap2/board-4430sdp.c
9 *
10 * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
12 * Based on mach-omap2/board-3430sdp.c
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
1740d483 22#include <linux/clk.h>
b075f58b 23#include <linux/io.h>
3da434ac 24#include <linux/leds.h>
b075f58b
DA		 25#include <linux/gpio.h>
26#include <linux/usb/otg.h>
27#include <linux/i2c/twl.h>
28#include <linux/regulator/machine.h>
edc84061 29#include <linux/regulator/fixed.h>
b17e0979 30#include <linux/wl12xx.h>
b075f58b
DA		 31
32#include <mach/hardware.h>
33#include <mach/omap4-common.h>
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
a0b38cc4 37#include <video/omapdss.h>
b075f58b
DA		 38
39#include <plat/board.h>
40#include <plat/common.h>
b075f58b
DA		 41#include <plat/usb.h>
42#include <plat/mmc.h>
f8ae2f08 43#include <video/omap-panel-generic-dpi.h>
04aeae77 44#include "timer-gp.h"
b075f58b 45
b075f58b 46#include "hsmmc.h"
4814ced5 47#include "control.h"
fc63de82 48#include "mux.h"
fbd8071c 49#include "common-board-devices.h"
b075f58b 50
4415beb6
DA		 51#define GPIO_HUB_POWER 1
52#define GPIO_HUB_NRESET 62
edc84061 53#define GPIO_WIFI_PMENA 43
b17e0979 54#define GPIO_WIFI_IRQ 53
17c84ef1
M		 55#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
56#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
4415beb6 57
ec179ea5
GE		 58/* wl127x BT, FM, GPS connectivity chip */
59static int wl1271_gpios[] = {46, -1, -1};
60static struct platform_device wl1271_device = {
61 .name = "kim",
62 .id = -1,
63 .dev = {
64 .platform_data = &wl1271_gpios,
65 },
66};
4415beb6 67
3da434ac
RSA		 68static struct gpio_led gpio_leds[] = {
69 {
70 .name = "pandaboard::status1",
71 .default_trigger = "heartbeat",
72 .gpio = 7,
73 },
74 {
75 .name = "pandaboard::status2",
76 .default_trigger = "mmc0",
77 .gpio = 8,
78 },
79};
b075f58b 80
3da434ac
RSA		 81static struct gpio_led_platform_data gpio_led_info = {
82 .leds = gpio_leds,
83 .num_leds = ARRAY_SIZE(gpio_leds),
84};
85
86static struct platform_device leds_gpio = {
87 .name = "leds-gpio",
88 .id = -1,
89 .dev = {
90 .platform_data = &gpio_led_info,
91 },
92};
93
94static struct platform_device *panda_devices[] __initdata = {
95 &leds_gpio,
ec179ea5 96 &wl1271_device,
3da434ac 97};
b075f58b 98
3dc3bad6 99static void __init omap4_panda_init_early(void)
b075f58b 100{
4805734b
PW		 101 omap2_init_common_infrastructure();
102 omap2_init_common_devices(NULL, NULL);
b075f58b
DA		 103}
104
181b250c
KM		 105static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
106 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
107 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
108 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
4415beb6
DA		 109 .phy_reset = false,
110 .reset_gpio_port[0] = -EINVAL,
111 .reset_gpio_port[1] = -EINVAL,
112 .reset_gpio_port[2] = -EINVAL
113};
114
bc593f5d
IG		 115static struct gpio panda_ehci_gpios[] __initdata = {
116 { GPIO_HUB_POWER, GPIOF_OUT_INIT_LOW, "hub_power" },
117 { GPIO_HUB_NRESET, GPIOF_OUT_INIT_LOW, "hub_nreset" },
118};
119
4415beb6
DA		 120static void __init omap4_ehci_init(void)
121{
122 int ret;
1740d483 123 struct clk *phy_ref_clk;
4415beb6 124
1740d483
AG		 125 /* FREF_CLK3 provides the 19.2 MHz reference clock to the PHY */
126 phy_ref_clk = clk_get(NULL, "auxclk3_ck");
127 if (IS_ERR(phy_ref_clk)) {
128 pr_err("Cannot request auxclk3\n");
bc593f5d 129 return;
1740d483
AG		 130 }
131 clk_set_rate(phy_ref_clk, 19200000);
132 clk_enable(phy_ref_clk);
4415beb6 133
bc593f5d
IG		 134 /* disable the power to the usb hub prior to init and reset phy+hub */
135 ret = gpio_request_array(panda_ehci_gpios,
136 ARRAY_SIZE(panda_ehci_gpios));
4415beb6 137 if (ret) {
bc593f5d
IG		 138 pr_err("Unable to initialize EHCI power/reset\n");
139 return;
4415beb6 140 }
4415beb6 141
bc593f5d 142 gpio_export(GPIO_HUB_POWER, 0);
4415beb6 143 gpio_export(GPIO_HUB_NRESET, 0);
4415beb6
DA		 144 gpio_set_value(GPIO_HUB_NRESET, 1);
145
9e64bb1e 146 usbhs_init(&usbhs_bdata);
4415beb6
DA		 147
148 /* enable power to hub */
149 gpio_set_value(GPIO_HUB_POWER, 1);
4415beb6
DA		 150}
151
b075f58b
DA		 152static struct omap_musb_board_data musb_board_data = {
153 .interface_type = MUSB_INTERFACE_UTMI,
09e72002 154 .mode = MUSB_OTG,
b075f58b
DA		 155 .power = 100,
156};
157
e70357e3
HH		 158static struct twl4030_usb_data omap4_usbphy_data = {
159 .phy_init = omap4430_phy_init,
160 .phy_exit = omap4430_phy_exit,
161 .phy_power = omap4430_phy_power,
162 .phy_set_clock = omap4430_phy_set_clk,
ee896e34 163 .phy_suspend = omap4430_phy_suspend,
e70357e3
HH		 164};
165
b075f58b
DA		 166static struct omap2_hsmmc_info mmc[] = {
167 {
168 .mmc = 1,
3a63833e 169 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
b075f58b 170 .gpio_wp = -EINVAL,
5b59cc2f 171 .gpio_cd = -EINVAL,
b075f58b 172 },
b17e0979
PM		 173 {
174 .name = "wl1271",
175 .mmc = 5,
176 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
177 .gpio_wp = -EINVAL,
178 .gpio_cd = -EINVAL,
179 .ocr_mask = MMC_VDD_165_195,
180 .nonremovable = true,
181 },
b075f58b
DA		 182 {} /* Terminator */
183};
184
185static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = {
186 {
187 .supply = "vmmc",
0005ae73 188 .dev_name = "omap_hsmmc.0",
b075f58b 189 },
b075f58b
DA		 190};
191
edc84061
PM		 192static struct regulator_consumer_supply omap4_panda_vmmc5_supply = {
193 .supply = "vmmc",
0005ae73 194 .dev_name = "omap_hsmmc.4",
edc84061
PM		 195};
196
197static struct regulator_init_data panda_vmmc5 = {
198 .constraints = {
199 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
200 },
201 .num_consumer_supplies = 1,
202 .consumer_supplies = &omap4_panda_vmmc5_supply,
203};
204
205static struct fixed_voltage_config panda_vwlan = {
206 .supply_name = "vwl1271",
207 .microvolts = 1800000, /* 1.8V */
208 .gpio = GPIO_WIFI_PMENA,
209 .startup_delay = 70000, /* 70msec */
210 .enable_high = 1,
211 .enabled_at_boot = 0,
212 .init_data = &panda_vmmc5,
213};
214
215static struct platform_device omap_vwlan_device = {
216 .name = "reg-fixed-voltage",
217 .id = 1,
218 .dev = {
219 .platform_data = &panda_vwlan,
220 },
221};
222
b17e0979
PM		 223struct wl12xx_platform_data omap_panda_wlan_data __initdata = {
224 .irq = OMAP_GPIO_IRQ(GPIO_WIFI_IRQ),
225 /* PANDA ref clock is 38.4 MHz */
226 .board_ref_clock = 2,
227};
228
b075f58b
DA		 229static int omap4_twl6030_hsmmc_late_init(struct device *dev)
230{
231 int ret = 0;
232 struct platform_device *pdev = container_of(dev,
233 struct platform_device, dev);
234 struct omap_mmc_platform_data *pdata = dev->platform_data;
235
bf56f0a6
MN		 236 if (!pdata) {
237 dev_err(dev, "%s: NULL platform data\n", __func__);
238 return -EINVAL;
239 }
b075f58b 240 /* Setting MMC1 Card detect Irq */
bf56f0a6
MN		 241 if (pdev->id == 0) {
242 ret = twl6030_mmc_card_detect_config();
243 if (ret)
244 dev_err(dev, "%s: Error card detect config(%d)\n",
245 __func__, ret);
246 else
247 pdata->slots[0].card_detect = twl6030_mmc_card_detect;
248 }
b075f58b
DA		 249 return ret;
250}
251
252static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
253{
b9b52620
DA		 254 struct omap_mmc_platform_data *pdata;
255
256 /* dev can be null if CONFIG_MMC_OMAP_HS is not set */
257 if (!dev) {
258 pr_err("Failed omap4_twl6030_hsmmc_set_late_init\n");
259 return;
260 }
261 pdata = dev->platform_data;
b075f58b
DA		 262
263 pdata->init = omap4_twl6030_hsmmc_late_init;
264}
265
266static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
267{
268 struct omap2_hsmmc_info *c;
269
270 omap2_hsmmc_init(controllers);
271 for (c = controllers; c->mmc; c++)
272 omap4_twl6030_hsmmc_set_late_init(c->dev);
273
274 return 0;
275}
276
b075f58b
DA		 277static struct regulator_init_data omap4_panda_vaux2 = {
278 .constraints = {
279 .min_uV = 1200000,
280 .max_uV = 2800000,
281 .apply_uV = true,
282 .valid_modes_mask = REGULATOR_MODE_NORMAL
283 | REGULATOR_MODE_STANDBY,
284 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
285 | REGULATOR_CHANGE_MODE
286 | REGULATOR_CHANGE_STATUS,
287 },
288};
289
290static struct regulator_init_data omap4_panda_vaux3 = {
291 .constraints = {
292 .min_uV = 1000000,
293 .max_uV = 3000000,
294 .apply_uV = true,
295 .valid_modes_mask = REGULATOR_MODE_NORMAL
296 | REGULATOR_MODE_STANDBY,
297 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
298 | REGULATOR_CHANGE_MODE
299 | REGULATOR_CHANGE_STATUS,
300 },
301};
302
303/* VMMC1 for MMC1 card */
304static struct regulator_init_data omap4_panda_vmmc = {
305 .constraints = {
306 .min_uV = 1200000,
307 .max_uV = 3000000,
308 .apply_uV = true,
309 .valid_modes_mask = REGULATOR_MODE_NORMAL
310 | REGULATOR_MODE_STANDBY,
311 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
312 | REGULATOR_CHANGE_MODE
313 | REGULATOR_CHANGE_STATUS,
314 },
191183b9 315 .num_consumer_supplies = 1,
b075f58b
DA		 316 .consumer_supplies = omap4_panda_vmmc_supply,
317};
318
319static struct regulator_init_data omap4_panda_vpp = {
320 .constraints = {
321 .min_uV = 1800000,
322 .max_uV = 2500000,
323 .apply_uV = true,
324 .valid_modes_mask = REGULATOR_MODE_NORMAL
325 | REGULATOR_MODE_STANDBY,
326 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
327 | REGULATOR_CHANGE_MODE
328 | REGULATOR_CHANGE_STATUS,
329 },
330};
331
b075f58b
DA		 332static struct regulator_init_data omap4_panda_vana = {
333 .constraints = {
334 .min_uV = 2100000,
335 .max_uV = 2100000,
b075f58b
DA		 336 .valid_modes_mask = REGULATOR_MODE_NORMAL
337 | REGULATOR_MODE_STANDBY,
338 .valid_ops_mask = REGULATOR_CHANGE_MODE
339 | REGULATOR_CHANGE_STATUS,
340 },
341};
342
343static struct regulator_init_data omap4_panda_vcxio = {
344 .constraints = {
345 .min_uV = 1800000,
346 .max_uV = 1800000,
b075f58b
DA		 347 .valid_modes_mask = REGULATOR_MODE_NORMAL
348 | REGULATOR_MODE_STANDBY,
349 .valid_ops_mask = REGULATOR_CHANGE_MODE
350 | REGULATOR_CHANGE_STATUS,
351 },
352};
353
354static struct regulator_init_data omap4_panda_vdac = {
355 .constraints = {
356 .min_uV = 1800000,
357 .max_uV = 1800000,
b075f58b
DA		 358 .valid_modes_mask = REGULATOR_MODE_NORMAL
359 | REGULATOR_MODE_STANDBY,
360 .valid_ops_mask = REGULATOR_CHANGE_MODE
361 | REGULATOR_CHANGE_STATUS,
362 },
363};
364
365static struct regulator_init_data omap4_panda_vusb = {
366 .constraints = {
367 .min_uV = 3300000,
368 .max_uV = 3300000,
369 .apply_uV = true,
370 .valid_modes_mask = REGULATOR_MODE_NORMAL
371 | REGULATOR_MODE_STANDBY,
372 .valid_ops_mask = REGULATOR_CHANGE_MODE
373 | REGULATOR_CHANGE_STATUS,
374 },
375};
376
8af1b0d7
B		 377static struct regulator_init_data omap4_panda_clk32kg = {
378 .constraints = {
379 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
380 },
381};
382
b075f58b
DA		 383static struct twl4030_platform_data omap4_panda_twldata = {
384 .irq_base = TWL6030_IRQ_BASE,
385 .irq_end = TWL6030_IRQ_END,
386
387 /* Regulators */
388 .vmmc = &omap4_panda_vmmc,
389 .vpp = &omap4_panda_vpp,
b075f58b
DA		 390 .vana = &omap4_panda_vana,
391 .vcxio = &omap4_panda_vcxio,
392 .vdac = &omap4_panda_vdac,
393 .vusb = &omap4_panda_vusb,
b075f58b
DA		 394 .vaux2 = &omap4_panda_vaux2,
395 .vaux3 = &omap4_panda_vaux3,
8af1b0d7 396 .clk32kg = &omap4_panda_clk32kg,
e70357e3 397 .usb = &omap4_usbphy_data,
b075f58b
DA		 398};
399
b295d6e5
MR		 400/*
401 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
402 * is connected as I2C slave device, and can be accessed at address 0x50
403 */
404static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
405 {
406 I2C_BOARD_INFO("eeprom", 0x50),
407 },
408};
409
b075f58b
DA		 410static int __init omap4_panda_i2c_init(void)
411{
fbd8071c 412 omap4_pmic_init("twl6030", &omap4_panda_twldata);
b075f58b 413 omap_register_i2c_bus(2, 400, NULL, 0);
b295d6e5
MR		 414 /*
415 * Bus 3 is attached to the DVI port where devices like the pico DLP
416 * projector don't work reliably with 400kHz
417 */
418 omap_register_i2c_bus(3, 100, panda_i2c_eeprom,
419 ARRAY_SIZE(panda_i2c_eeprom));
b075f58b
DA		 420 omap_register_i2c_bus(4, 400, NULL, 0);
421 return 0;
422}
fc63de82 423
424#ifdef CONFIG_OMAP_MUX
425static struct omap_board_mux board_mux[] __initdata = {
66e171a3
PM		 426 /* WLAN IRQ - GPIO 53 */
427 OMAP4_MUX(GPMC_NCS3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
428 /* WLAN POWER ENABLE - GPIO 43 */
429 OMAP4_MUX(GPMC_A19, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
430 /* WLAN SDIO: MMC5 CMD */
431 OMAP4_MUX(SDMMC5_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
432 /* WLAN SDIO: MMC5 CLK */
433 OMAP4_MUX(SDMMC5_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
434 /* WLAN SDIO: MMC5 DAT[0-3] */
435 OMAP4_MUX(SDMMC5_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
436 OMAP4_MUX(SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
437 OMAP4_MUX(SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
438 OMAP4_MUX(SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
b295d6e5
MR		 439 /* gpio 0 - TFP410 PD */
440 OMAP4_MUX(KPD_COL1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
441 /* dispc2_data23 */
442 OMAP4_MUX(USBB2_ULPITLL_STP, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
443 /* dispc2_data22 */
444 OMAP4_MUX(USBB2_ULPITLL_DIR, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
445 /* dispc2_data21 */
446 OMAP4_MUX(USBB2_ULPITLL_NXT, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
447 /* dispc2_data20 */
448 OMAP4_MUX(USBB2_ULPITLL_DAT0, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
449 /* dispc2_data19 */
450 OMAP4_MUX(USBB2_ULPITLL_DAT1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
451 /* dispc2_data18 */
452 OMAP4_MUX(USBB2_ULPITLL_DAT2, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
453 /* dispc2_data15 */
454 OMAP4_MUX(USBB2_ULPITLL_DAT3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
455 /* dispc2_data14 */
456 OMAP4_MUX(USBB2_ULPITLL_DAT4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
457 /* dispc2_data13 */
458 OMAP4_MUX(USBB2_ULPITLL_DAT5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
459 /* dispc2_data12 */
460 OMAP4_MUX(USBB2_ULPITLL_DAT6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
461 /* dispc2_data11 */
462 OMAP4_MUX(USBB2_ULPITLL_DAT7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
463 /* dispc2_data10 */
464 OMAP4_MUX(DPM_EMU3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
465 /* dispc2_data9 */
466 OMAP4_MUX(DPM_EMU4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
467 /* dispc2_data16 */
468 OMAP4_MUX(DPM_EMU5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
469 /* dispc2_data17 */
470 OMAP4_MUX(DPM_EMU6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
471 /* dispc2_hsync */
472 OMAP4_MUX(DPM_EMU7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
473 /* dispc2_pclk */
474 OMAP4_MUX(DPM_EMU8, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
475 /* dispc2_vsync */
476 OMAP4_MUX(DPM_EMU9, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
477 /* dispc2_de */
478 OMAP4_MUX(DPM_EMU10, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
479 /* dispc2_data8 */
480 OMAP4_MUX(DPM_EMU11, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
481 /* dispc2_data7 */
482 OMAP4_MUX(DPM_EMU12, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
483 /* dispc2_data6 */
484 OMAP4_MUX(DPM_EMU13, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
485 /* dispc2_data5 */
486 OMAP4_MUX(DPM_EMU14, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
487 /* dispc2_data4 */
488 OMAP4_MUX(DPM_EMU15, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
489 /* dispc2_data3 */
490 OMAP4_MUX(DPM_EMU16, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
491 /* dispc2_data2 */
492 OMAP4_MUX(DPM_EMU17, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
493 /* dispc2_data1 */
494 OMAP4_MUX(DPM_EMU18, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
495 /* dispc2_data0 */
496 OMAP4_MUX(DPM_EMU19, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
fc63de82 497 { .reg_offset = OMAP_MUX_TERMINATOR },
498};
573efc2b
S		 499
500static struct omap_device_pad serial2_pads[] __initdata = {
501 OMAP_MUX_STATIC("uart2_cts.uart2_cts",
502 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
503 OMAP_MUX_STATIC("uart2_rts.uart2_rts",
504 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
505 OMAP_MUX_STATIC("uart2_rx.uart2_rx",
506 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
507 OMAP_MUX_STATIC("uart2_tx.uart2_tx",
508 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
509};
510
511static struct omap_device_pad serial3_pads[] __initdata = {
512 OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
513 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
514 OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
515 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
516 OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
517 OMAP_PIN_INPUT | OMAP_MUX_MODE0),
518 OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
519 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
520};
521
522static struct omap_device_pad serial4_pads[] __initdata = {
523 OMAP_MUX_STATIC("uart4_rx.uart4_rx",
524 OMAP_PIN_INPUT | OMAP_MUX_MODE0),
525 OMAP_MUX_STATIC("uart4_tx.uart4_tx",
526 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
527};
528
89c4705e 529static struct omap_board_data serial2_data __initdata = {
573efc2b
S		 530 .id = 1,
531 .pads = serial2_pads,
532 .pads_cnt = ARRAY_SIZE(serial2_pads),
533};
534
89c4705e 535static struct omap_board_data serial3_data __initdata = {
573efc2b
S		 536 .id = 2,
537 .pads = serial3_pads,
538 .pads_cnt = ARRAY_SIZE(serial3_pads),
539};
540
89c4705e 541static struct omap_board_data serial4_data __initdata = {
573efc2b
S		 542 .id = 3,
543 .pads = serial4_pads,
544 .pads_cnt = ARRAY_SIZE(serial4_pads),
545};
546
547static inline void board_serial_init(void)
548{
549 struct omap_board_data bdata;
550 bdata.flags = 0;
551 bdata.pads = NULL;
552 bdata.pads_cnt = 0;
553 bdata.id = 0;
554 /* pass dummy data for UART1 */
555 omap_serial_init_port(&bdata);
556
557 omap_serial_init_port(&serial2_data);
558 omap_serial_init_port(&serial3_data);
559 omap_serial_init_port(&serial4_data);
560}
fc63de82 561#else
562#define board_mux NULL
573efc2b
S		 563
564static inline void board_serial_init(void)
565{
566 omap_serial_init();
567}
fc63de82 568#endif
569
b295d6e5
MR		 570/* Display DVI */
571#define PANDA_DVI_TFP410_POWER_DOWN_GPIO 0
572
573static int omap4_panda_enable_dvi(struct omap_dss_device *dssdev)
574{
575 gpio_set_value(dssdev->reset_gpio, 1);
576 return 0;
577}
578
579static void omap4_panda_disable_dvi(struct omap_dss_device *dssdev)
580{
581 gpio_set_value(dssdev->reset_gpio, 0);
582}
583
584/* Using generic display panel */
585static struct panel_generic_dpi_data omap4_dvi_panel = {
586 .name = "generic",
587 .platform_enable = omap4_panda_enable_dvi,
588 .platform_disable = omap4_panda_disable_dvi,
589};
590
591struct omap_dss_device omap4_panda_dvi_device = {
592 .type = OMAP_DISPLAY_TYPE_DPI,
593 .name = "dvi",
594 .driver_name = "generic_dpi_panel",
595 .data = &omap4_dvi_panel,
596 .phy.dpi.data_lines = 24,
597 .reset_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO,
598 .channel = OMAP_DSS_CHANNEL_LCD2,
599};
600
601int __init omap4_panda_dvi_init(void)
602{
603 int r;
604
605 /* Requesting TFP410 DVI GPIO and disabling it, at bootup */
606 r = gpio_request_one(omap4_panda_dvi_device.reset_gpio,
607 GPIOF_OUT_INIT_LOW, "DVI PD");
608 if (r)
609 pr_err("Failed to get DVI powerdown GPIO\n");
610
611 return r;
612}
613
614
17c84ef1
M		 615static void omap4_panda_hdmi_mux_init(void)
616{
617 /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
618 omap_mux_init_signal("hdmi_hpd",
619 OMAP_PIN_INPUT_PULLUP);
620 omap_mux_init_signal("hdmi_cec",
621 OMAP_PIN_INPUT_PULLUP);
622 /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
623 omap_mux_init_signal("hdmi_ddc_scl",
624 OMAP_PIN_INPUT_PULLUP);
625 omap_mux_init_signal("hdmi_ddc_sda",
626 OMAP_PIN_INPUT_PULLUP);
627}
628
bc593f5d
IG		 629static struct gpio panda_hdmi_gpios[] = {
630 { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" },
631 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
632};
633
17c84ef1
M		 634static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
635{
636 int status;
637
bc593f5d
IG		 638 status = gpio_request_array(panda_hdmi_gpios,
639 ARRAY_SIZE(panda_hdmi_gpios));
640 if (status)
641 pr_err("Cannot request HDMI GPIOs\n");
17c84ef1
M		 642
643 return status;
644}
645
646static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
647{
648 gpio_free(HDMI_GPIO_LS_OE);
649 gpio_free(HDMI_GPIO_HPD);
650}
651
652static struct omap_dss_device omap4_panda_hdmi_device = {
653 .name = "hdmi",
654 .driver_name = "hdmi_panel",
655 .type = OMAP_DISPLAY_TYPE_HDMI,
656 .platform_enable = omap4_panda_panel_enable_hdmi,
657 .platform_disable = omap4_panda_panel_disable_hdmi,
658 .channel = OMAP_DSS_CHANNEL_DIGIT,
659};
660
661static struct omap_dss_device *omap4_panda_dss_devices[] = {
b295d6e5 662 &omap4_panda_dvi_device,
17c84ef1
M		 663 &omap4_panda_hdmi_device,
664};
665
666static struct omap_dss_board_info omap4_panda_dss_data = {
667 .num_devices = ARRAY_SIZE(omap4_panda_dss_devices),
668 .devices = omap4_panda_dss_devices,
b295d6e5 669 .default_device = &omap4_panda_dvi_device,
17c84ef1
M		 670};
671
672void omap4_panda_display_init(void)
673{
b295d6e5
MR		 674 int r;
675
676 r = omap4_panda_dvi_init();
677 if (r)
678 pr_err("error initializing panda DVI\n");
679
17c84ef1
M		 680 omap4_panda_hdmi_mux_init();
681 omap_display_init(&omap4_panda_dss_data);
682}
683
b075f58b
DA		 684static void __init omap4_panda_init(void)
685{
fc63de82 686 int package = OMAP_PACKAGE_CBS;
687
688 if (omap_rev() == OMAP4430_REV_ES1_0)
689 package = OMAP_PACKAGE_CBL;
21a42c92 690 omap4_mux_init(board_mux, NULL, package);
fc63de82 691
b17e0979
PM		 692 if (wl12xx_set_platform_data(&omap_panda_wlan_data))
693 pr_err("error setting wl12xx data\n");
694
b075f58b 695 omap4_panda_i2c_init();
3da434ac 696 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
edc84061 697 platform_device_register(&omap_vwlan_device);
573efc2b 698 board_serial_init();
b075f58b 699 omap4_twl6030_hsmmc_init(mmc);
4415beb6 700 omap4_ehci_init();
1ea7f352 701 usb_musb_init(&musb_board_data);
17c84ef1 702 omap4_panda_display_init();
b075f58b
DA		 703}
704
705static void __init omap4_panda_map_io(void)
706{
707 omap2_set_globals_443x();
708 omap44xx_map_common_io();
709}
710
711MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
712 /* Maintainer: David Anders - Texas Instruments Inc */
b075f58b 713 .boot_params = 0x80000100,
d920e520 714 .reserve = omap_reserve,
b075f58b 715 .map_io = omap4_panda_map_io,
3dc3bad6
RKAL		 716 .init_early = omap4_panda_init_early,
717 .init_irq = gic_init_irq,
b075f58b
DA		 718 .init_machine = omap4_panda_init,
719 .timer = &omap_timer,
720MACHINE_END
Linux kernel - Deliverables
This page took 0.216047 seconds and 5 git commands to generate.