[deliverable/linux.git] / arch / arm / mach-omap2 / board-overo.c

/*
 * board-overo.c (Gumstix Overo)
 *
 * Initial code: Steve Sakoman <steve@sakoman.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/i2c/twl.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <linux/spi/spi.h>

#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mmc/host.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <plat/board.h>
#include <plat/common.h>
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
#include <mach/gpio.h>
#include <plat/gpmc.h>
#include <mach/hardware.h>
#include <plat/nand.h>
#include <plat/mcspi.h>
#include <plat/mux.h>
#include <plat/usb.h>

#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "hsmmc.h"

#define OVERO_GPIO_BT_XGATE	15
#define OVERO_GPIO_W2W_NRESET	16
#define OVERO_GPIO_PENDOWN	114
#define OVERO_GPIO_BT_NRESET	164
#define OVERO_GPIO_USBH_CPEN	168
#define OVERO_GPIO_USBH_NRESET	183

#define NAND_BLOCK_SIZE SZ_128K

#define OVERO_SMSC911X_CS      5
#define OVERO_SMSC911X_GPIO    176
#define OVERO_SMSC911X2_CS     4
#define OVERO_SMSC911X2_GPIO   65

#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
	defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)

#include <linux/spi/ads7846.h>

static struct omap2_mcspi_device_config ads7846_mcspi_config = {
	.turbo_mode	= 0,
	.single_channel	= 1,	/* 0: slave, 1: master */
};

static int ads7846_get_pendown_state(void)
{
	return !gpio_get_value(OVERO_GPIO_PENDOWN);
}

static struct ads7846_platform_data ads7846_config = {
	.x_max			= 0x0fff,
	.y_max			= 0x0fff,
	.x_plate_ohms		= 180,
	.pressure_max		= 255,
	.debounce_max		= 10,
	.debounce_tol		= 3,
	.debounce_rep		= 1,
	.get_pendown_state	= ads7846_get_pendown_state,
	.keep_vref_on		= 1,
};

/* fixed regulator for ads7846 */
static struct regulator_consumer_supply ads7846_supply =
	REGULATOR_SUPPLY("vcc", "spi1.0");

static struct regulator_init_data vads7846_regulator = {
	.constraints = {
		.valid_ops_mask		= REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= 1,
	.consumer_supplies	= &ads7846_supply,
};

static struct fixed_voltage_config vads7846 = {
	.supply_name		= "vads7846",
	.microvolts		= 3300000, /* 3.3V */
	.gpio			= -EINVAL,
	.startup_delay		= 0,
	.init_data		= &vads7846_regulator,
};

static struct platform_device vads7846_device = {
	.name		= "reg-fixed-voltage",
	.id		= 1,
	.dev = {
		.platform_data = &vads7846,
	},
};

static void __init overo_ads7846_init(void)
{
	if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
	    (gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) {
		gpio_export(OVERO_GPIO_PENDOWN, 0);
	} else {
		printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
		return;
	}

	platform_device_register(&vads7846_device);
}

#else
static inline void __init overo_ads7846_init(void) { return; }
#endif

#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)

#include <linux/smsc911x.h>

static struct resource overo_smsc911x_resources[] = {
	{
		.name	= "smsc911x-memory",
		.flags	= IORESOURCE_MEM,
	},
	{
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	},
};

static struct resource overo_smsc911x2_resources[] = {
	{
		.name	= "smsc911x2-memory",
		.flags	= IORESOURCE_MEM,
	},
	{
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	},
};

static struct smsc911x_platform_config overo_smsc911x_config = {
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.flags		= SMSC911X_USE_32BIT ,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
};

static struct platform_device overo_smsc911x_device = {
	.name		= "smsc911x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(overo_smsc911x_resources),
	.resource	= overo_smsc911x_resources,
	.dev		= {
		.platform_data = &overo_smsc911x_config,
	},
};

static struct platform_device overo_smsc911x2_device = {
	.name		= "smsc911x",
	.id		= 1,
	.num_resources	= ARRAY_SIZE(overo_smsc911x2_resources),
	.resource	= overo_smsc911x2_resources,
	.dev		= {
		.platform_data = &overo_smsc911x_config,
	},
};

static struct platform_device *smsc911x_devices[] = {
	&overo_smsc911x_device,
	&overo_smsc911x2_device,
};

static inline void __init overo_init_smsc911x(void)
{
	unsigned long cs_mem_base, cs_mem_base2;

	/* set up first smsc911x chip */

	if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
		printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n");
		return;
	}

	overo_smsc911x_resources[0].start = cs_mem_base + 0x0;
	overo_smsc911x_resources[0].end   = cs_mem_base + 0xff;

	if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) &&
	    (gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) {
		gpio_export(OVERO_SMSC911X_GPIO, 0);
	} else {
		printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n");
		return;
	}

	overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
	overo_smsc911x_resources[1].end	  = 0;

	/* set up second smsc911x chip */

	if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) {
		printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n");
		return;
	}

	overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
	overo_smsc911x2_resources[0].end   = cs_mem_base2 + 0xff;

	if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) &&
	    (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
		gpio_export(OVERO_SMSC911X2_GPIO, 0);
	} else {
		printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n");
		return;
	}

	overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
	overo_smsc911x2_resources[1].end   = 0;

	platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
}

#else
static inline void __init overo_init_smsc911x(void) { return; }
#endif

/* DSS */
static int lcd_enabled;
static int dvi_enabled;

#define OVERO_GPIO_LCD_EN 144
#define OVERO_GPIO_LCD_BL 145

static void __init overo_display_init(void)
{
	if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) &&
	    (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0))
		gpio_export(OVERO_GPIO_LCD_EN, 0);
	else
		printk(KERN_ERR "could not obtain gpio for "
					"OVERO_GPIO_LCD_EN\n");

	if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) &&
	    (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0))
		gpio_export(OVERO_GPIO_LCD_BL, 0);
	else
		printk(KERN_ERR "could not obtain gpio for "
					"OVERO_GPIO_LCD_BL\n");
}

static int overo_panel_enable_dvi(struct omap_dss_device *dssdev)
{
	if (lcd_enabled) {
		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
		return -EINVAL;
	}
	dvi_enabled = 1;

	return 0;
}

static void overo_panel_disable_dvi(struct omap_dss_device *dssdev)
{
	dvi_enabled = 0;
}

static struct panel_generic_dpi_data dvi_panel = {
	.name			= "generic",
	.platform_enable	= overo_panel_enable_dvi,
	.platform_disable	= overo_panel_disable_dvi,
};

static struct omap_dss_device overo_dvi_device = {
	.name			= "dvi",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.driver_name		= "generic_dpi_panel",
	.data			= &dvi_panel,
	.phy.dpi.data_lines	= 24,
};

static struct omap_dss_device overo_tv_device = {
	.name = "tv",
	.driver_name = "venc",
	.type = OMAP_DISPLAY_TYPE_VENC,
	.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
};

static int overo_panel_enable_lcd(struct omap_dss_device *dssdev)
{
	if (dvi_enabled) {
		printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
		return -EINVAL;
	}

	gpio_set_value(OVERO_GPIO_LCD_EN, 1);
	gpio_set_value(OVERO_GPIO_LCD_BL, 1);
	lcd_enabled = 1;
	return 0;
}

static void overo_panel_disable_lcd(struct omap_dss_device *dssdev)
{
	gpio_set_value(OVERO_GPIO_LCD_EN, 0);
	gpio_set_value(OVERO_GPIO_LCD_BL, 0);
	lcd_enabled = 0;
}

static struct panel_generic_dpi_data lcd43_panel = {
	.name			= "samsung_lte430wq_f0c",
	.platform_enable	= overo_panel_enable_lcd,
	.platform_disable	= overo_panel_disable_lcd,
};

static struct omap_dss_device overo_lcd43_device = {
	.name			= "lcd43",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.driver_name		= "generic_dpi_panel",
	.data			= &lcd43_panel,
	.phy.dpi.data_lines	= 24,
};

#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
static struct omap_dss_device overo_lcd35_device = {
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.name			= "lcd35",
	.driver_name		= "lgphilips_lb035q02_panel",
	.phy.dpi.data_lines	= 24,
	.platform_enable	= overo_panel_enable_lcd,
	.platform_disable	= overo_panel_disable_lcd,
};
#endif

static struct omap_dss_device *overo_dss_devices[] = {
	&overo_dvi_device,
	&overo_tv_device,
#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
	&overo_lcd35_device,
#endif
	&overo_lcd43_device,
};

static struct omap_dss_board_info overo_dss_data = {
	.num_devices	= ARRAY_SIZE(overo_dss_devices),
	.devices	= overo_dss_devices,
	.default_device	= &overo_dvi_device,
};

static struct regulator_consumer_supply overo_vdda_dac_supply =
	REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");

static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
	REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
	REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};

static struct mtd_partition overo_nand_partitions[] = {
	{
		.name           = "xloader",
		.offset         = 0,			/* Offset = 0x00000 */
		.size           = 4 * NAND_BLOCK_SIZE,
		.mask_flags     = MTD_WRITEABLE
	},
	{
		.name           = "uboot",
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
		.size           = 14 * NAND_BLOCK_SIZE,
	},
	{
		.name           = "uboot environment",
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x240000 */
		.size           = 2 * NAND_BLOCK_SIZE,
	},
	{
		.name           = "linux",
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x280000 */
		.size           = 32 * NAND_BLOCK_SIZE,
	},
	{
		.name           = "rootfs",
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x680000 */
		.size           = MTDPART_SIZ_FULL,
	},
};

static struct omap_nand_platform_data overo_nand_data = {
	.parts = overo_nand_partitions,
	.nr_parts = ARRAY_SIZE(overo_nand_partitions),
	.dma_channel = -1,	/* disable DMA in OMAP NAND driver */
};

static void __init overo_flash_init(void)
{
	u8 cs = 0;
	u8 nandcs = GPMC_CS_NUM + 1;

	/* find out the chip-select on which NAND exists */
	while (cs < GPMC_CS_NUM) {
		u32 ret = 0;
		ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);

		if ((ret & 0xC00) == 0x800) {
			printk(KERN_INFO "Found NAND on CS%d\n", cs);
			if (nandcs > GPMC_CS_NUM)
				nandcs = cs;
		}
		cs++;
	}

	if (nandcs > GPMC_CS_NUM) {
		printk(KERN_INFO "NAND: Unable to find configuration "
				 "in GPMC\n ");
		return;
	}

	if (nandcs < GPMC_CS_NUM) {
		overo_nand_data.cs = nandcs;

		printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
		if (gpmc_nand_init(&overo_nand_data) < 0)
			printk(KERN_ERR "Unable to register NAND device\n");
	}
}

static struct omap2_hsmmc_info mmc[] = {
	{
		.mmc		= 1,
		.caps		= MMC_CAP_4_BIT_DATA,
		.gpio_cd	= -EINVAL,
		.gpio_wp	= -EINVAL,
	},
	{
		.mmc		= 2,
		.caps		= MMC_CAP_4_BIT_DATA,
		.gpio_cd	= -EINVAL,
		.gpio_wp	= -EINVAL,
		.transceiver	= true,
		.ocr_mask	= 0x00100000,	/* 3.3V */
	},
	{}	/* Terminator */
};

static struct regulator_consumer_supply overo_vmmc1_supply = {
	.supply			= "vmmc",
};

static int overo_twl_gpio_setup(struct device *dev,
		unsigned gpio, unsigned ngpio)
{
	omap2_hsmmc_init(mmc);

	overo_vmmc1_supply.dev = mmc[0].dev;

	return 0;
}

static struct twl4030_gpio_platform_data overo_gpio_data = {
	.gpio_base	= OMAP_MAX_GPIO_LINES,
	.irq_base	= TWL4030_GPIO_IRQ_BASE,
	.irq_end	= TWL4030_GPIO_IRQ_END,
	.setup		= overo_twl_gpio_setup,
};

static struct twl4030_usb_data overo_usb_data = {
	.usb_mode	= T2_USB_MODE_ULPI,
};

static struct regulator_init_data overo_vmmc1 = {
	.constraints = {
		.min_uV			= 1850000,
		.max_uV			= 3150000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
					| REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= 1,
	.consumer_supplies	= &overo_vmmc1_supply,
};

/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
static struct regulator_init_data overo_vdac = {
	.constraints = {
		.min_uV			= 1800000,
		.max_uV			= 1800000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= 1,
	.consumer_supplies	= &overo_vdda_dac_supply,
};

/* VPLL2 for digital video outputs */
static struct regulator_init_data overo_vpll2 = {
	.constraints = {
		.name			= "VDVI",
		.min_uV			= 1800000,
		.max_uV			= 1800000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(overo_vdds_dsi_supply),
	.consumer_supplies	= overo_vdds_dsi_supply,
};

static struct twl4030_codec_audio_data overo_audio_data;

static struct twl4030_codec_data overo_codec_data = {
	.audio_mclk = 26000000,
	.audio = &overo_audio_data,
};

static struct twl4030_platform_data overo_twldata = {
	.irq_base	= TWL4030_IRQ_BASE,
	.irq_end	= TWL4030_IRQ_END,
	.gpio		= &overo_gpio_data,
	.usb		= &overo_usb_data,
	.codec		= &overo_codec_data,
	.vmmc1		= &overo_vmmc1,
	.vdac		= &overo_vdac,
	.vpll2		= &overo_vpll2,
};

static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
	{
		I2C_BOARD_INFO("tps65950", 0x48),
		.flags = I2C_CLIENT_WAKE,
		.irq = INT_34XX_SYS_NIRQ,
		.platform_data = &overo_twldata,
	},
};

static int __init overo_i2c_init(void)
{
	omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo,
			ARRAY_SIZE(overo_i2c_boardinfo));
	/* i2c2 pins are used for gpio */
	omap_register_i2c_bus(3, 400, NULL, 0);
	return 0;
}

static struct spi_board_info overo_spi_board_info[] __initdata = {
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
	defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
	{
		.modalias		= "ads7846",
		.bus_num		= 1,
		.chip_select		= 0,
		.max_speed_hz		= 1500000,
		.controller_data	= &ads7846_mcspi_config,
		.irq			= OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
		.platform_data		= &ads7846_config,
	},
#endif
#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
	{
		.modalias		= "lgphilips_lb035q02_panel-spi",
		.bus_num		= 1,
		.chip_select		= 1,
		.max_speed_hz		= 500000,
		.mode			= SPI_MODE_3,
	},
#endif
};

static int __init overo_spi_init(void)
{
	overo_ads7846_init();
	spi_register_board_info(overo_spi_board_info,
			ARRAY_SIZE(overo_spi_board_info));
	return 0;
}

static void __init overo_init_early(void)
{
	omap2_init_common_infrastructure();
	omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
				  mt46h32m32lf6_sdrc_params);
}

static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
	.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
	.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,

	.phy_reset  = true,
	.reset_gpio_port[0]  = -EINVAL,
	.reset_gpio_port[1]  = OVERO_GPIO_USBH_NRESET,
	.reset_gpio_port[2]  = -EINVAL
};

#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
	{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#endif

static struct omap_musb_board_data musb_board_data = {
	.interface_type		= MUSB_INTERFACE_ULPI,
	.mode			= MUSB_OTG,
	.power			= 100,
};

static void __init overo_init(void)
{
	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
	overo_i2c_init();
	omap_display_init(&overo_dss_data);
	omap_serial_init();
	overo_flash_init();
	usb_musb_init(&musb_board_data);
	usb_ehci_init(&ehci_pdata);
	overo_spi_init();
	overo_init_smsc911x();
	overo_display_init();

	/* Ensure SDRC pins are mux'd for self-refresh */
	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);

	if ((gpio_request(OVERO_GPIO_W2W_NRESET,
			  "OVERO_GPIO_W2W_NRESET") == 0) &&
	    (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
		gpio_export(OVERO_GPIO_W2W_NRESET, 0);
		gpio_set_value(OVERO_GPIO_W2W_NRESET, 0);
		udelay(10);
		gpio_set_value(OVERO_GPIO_W2W_NRESET, 1);
	} else {
		printk(KERN_ERR "could not obtain gpio for "
					"OVERO_GPIO_W2W_NRESET\n");
	}

	if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) &&
	    (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0))
		gpio_export(OVERO_GPIO_BT_XGATE, 0);
	else
		printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n");

	if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) &&
	    (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) {
		gpio_export(OVERO_GPIO_BT_NRESET, 0);
		gpio_set_value(OVERO_GPIO_BT_NRESET, 0);
		mdelay(6);
		gpio_set_value(OVERO_GPIO_BT_NRESET, 1);
	} else {
		printk(KERN_ERR "could not obtain gpio for "
					"OVERO_GPIO_BT_NRESET\n");
	}

	if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) &&
	    (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0))
		gpio_export(OVERO_GPIO_USBH_CPEN, 0);
	else
		printk(KERN_ERR "could not obtain gpio for "
					"OVERO_GPIO_USBH_CPEN\n");
}

MACHINE_START(OVERO, "Gumstix Overo")
	.boot_params	= 0x80000100,
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= overo_init_early,
	.init_irq	= omap_init_irq,
	.init_machine	= overo_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
eba2645a SS	1	/*
	2	* board-overo.c (Gumstix Overo)
	3	*
	4	* Initial code: Steve Sakoman <steve@sakoman.com>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* version 2 as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	18	* 02110-1301 USA
	19	*
	20	*/
	21
	22	#include <linux/clk.h>
	23	#include <linux/delay.h>
	24	#include <linux/err.h>
	25	#include <linux/init.h>
	26	#include <linux/io.h>
	27	#include <linux/kernel.h>
	28	#include <linux/platform_device.h>
b07682b6	29	#include <linux/i2c/twl.h>
bb3b9d8e	30	#include <linux/regulator/machine.h>
ca0a6a64	31	#include <linux/regulator/fixed.h>
7b12d7b6	32	#include <linux/spi/spi.h>
eba2645a SS	33
	34	#include <linux/mtd/mtd.h>
	35	#include <linux/mtd/nand.h>
	36	#include <linux/mtd/partitions.h>
3a63833e	37	#include <linux/mmc/host.h>
eba2645a SS	38
	39	#include <asm/mach-types.h>
	40	#include <asm/mach/arch.h>
	41	#include <asm/mach/flash.h>
	42	#include <asm/mach/map.h>
	43
ce491cf8 TL	44	#include <plat/board.h>
ce491cf8 TL	45	#include <plat/common.h>
7b12d7b6 SS	46	#include <plat/display.h>
7b12d7b6 SS	47	#include <plat/panel-generic-dpi.h>
eba2645a	48	#include <mach/gpio.h>
ce491cf8	49	#include <plat/gpmc.h>
eba2645a	50	#include <mach/hardware.h>
ce491cf8	51	#include <plat/nand.h>
7b12d7b6 SS	52	#include <plat/mcspi.h>
7b12d7b6 SS	53	#include <plat/mux.h>
ce491cf8	54	#include <plat/usb.h>
eba2645a	55
ca5742bd	56	#include "mux.h"
2e12bd7e	57	#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b	58	#include "hsmmc.h"
90c62bf0	59
0d4d9ab0 TL	60	#define OVERO_GPIO_BT_XGATE 15
0d4d9ab0 TL	61	#define OVERO_GPIO_W2W_NRESET 16
6fd210a9	62	#define OVERO_GPIO_PENDOWN 114
0d4d9ab0 TL	63	#define OVERO_GPIO_BT_NRESET 164
	64	#define OVERO_GPIO_USBH_CPEN 168
	65	#define OVERO_GPIO_USBH_NRESET 183
	66
eba2645a	67	#define NAND_BLOCK_SIZE SZ_128K
eba2645a	68
172ef275 SS	69	#define OVERO_SMSC911X_CS 5
172ef275 SS	70	#define OVERO_SMSC911X_GPIO 176
5c9a29ed SS	71	#define OVERO_SMSC911X2_CS 4
5c9a29ed SS	72	#define OVERO_SMSC911X2_GPIO 65
172ef275	73
c6a81316 SS	74	#if defined(CONFIG_TOUCHSCREEN_ADS7846) \|\| \
	75	defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
	76
c6a81316 SS	77	#include <linux/spi/ads7846.h>
	78
	79	static struct omap2_mcspi_device_config ads7846_mcspi_config = {
	80	.turbo_mode = 0,
	81	.single_channel = 1, /* 0: slave, 1: master */
	82	};
	83
	84	static int ads7846_get_pendown_state(void)
	85	{
	86	return !gpio_get_value(OVERO_GPIO_PENDOWN);
	87	}
	88
	89	static struct ads7846_platform_data ads7846_config = {
	90	.x_max = 0x0fff,
	91	.y_max = 0x0fff,
	92	.x_plate_ohms = 180,
	93	.pressure_max = 255,
	94	.debounce_max = 10,
	95	.debounce_tol = 3,
	96	.debounce_rep = 1,
	97	.get_pendown_state = ads7846_get_pendown_state,
	98	.keep_vref_on = 1,
	99	};
	100
ca0a6a64 SS	101	/* fixed regulator for ads7846 */
	102	static struct regulator_consumer_supply ads7846_supply =
	103	REGULATOR_SUPPLY("vcc", "spi1.0");
	104
	105	static struct regulator_init_data vads7846_regulator = {
	106	.constraints = {
	107	.valid_ops_mask = REGULATOR_CHANGE_STATUS,
	108	},
	109	.num_consumer_supplies = 1,
	110	.consumer_supplies = &ads7846_supply,
	111	};
	112
	113	static struct fixed_voltage_config vads7846 = {
	114	.supply_name = "vads7846",
	115	.microvolts = 3300000, /* 3.3V */
	116	.gpio = -EINVAL,
	117	.startup_delay = 0,
	118	.init_data = &vads7846_regulator,
	119	};
	120
	121	static struct platform_device vads7846_device = {
	122	.name = "reg-fixed-voltage",
	123	.id = 1,
	124	.dev = {
	125	.platform_data = &vads7846,
	126	},
	127	};
	128
c6a81316 SS	129	static void __init overo_ads7846_init(void)
	130	{
	131	if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
	132	(gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) {
	133	gpio_export(OVERO_GPIO_PENDOWN, 0);
	134	} else {
	135	printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
	136	return;
	137	}
ca0a6a64 SS	138
ca0a6a64 SS	139	platform_device_register(&vads7846_device);
c6a81316 SS	140	}
	141
	142	#else
	143	static inline void __init overo_ads7846_init(void) { return; }
	144	#endif
	145
172ef275 SS	146	#if defined(CONFIG_SMSC911X) \|\| defined(CONFIG_SMSC911X_MODULE)
	147
	148	#include <linux/smsc911x.h>
	149
	150	static struct resource overo_smsc911x_resources[] = {
	151	{
	152	.name = "smsc911x-memory",
	153	.flags = IORESOURCE_MEM,
	154	},
	155	{
	156	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	157	},
	158	};
	159
5c9a29ed SS	160	static struct resource overo_smsc911x2_resources[] = {
	161	{
	162	.name = "smsc911x2-memory",
	163	.flags = IORESOURCE_MEM,
	164	},
	165	{
	166	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	167	},
	168	};
	169
172ef275 SS	170	static struct smsc911x_platform_config overo_smsc911x_config = {
	171	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	172	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	173	.flags = SMSC911X_USE_32BIT ,
	174	.phy_interface = PHY_INTERFACE_MODE_MII,
	175	};
	176
	177	static struct platform_device overo_smsc911x_device = {
	178	.name = "smsc911x",
5c9a29ed	179	.id = 0,
172ef275	180	.num_resources = ARRAY_SIZE(overo_smsc911x_resources),
5032902c	181	.resource = overo_smsc911x_resources,
172ef275 SS	182	.dev = {
	183	.platform_data = &overo_smsc911x_config,
	184	},
	185	};
	186
a5ba7ae2 SS	187	static struct platform_device overo_smsc911x2_device = {
	188	.name = "smsc911x",
	189	.id = 1,
	190	.num_resources = ARRAY_SIZE(overo_smsc911x2_resources),
	191	.resource = overo_smsc911x2_resources,
	192	.dev = {
	193	.platform_data = &overo_smsc911x_config,
	194	},
	195	};
	196
	197	static struct platform_device *smsc911x_devices[] = {
	198	&overo_smsc911x_device,
	199	&overo_smsc911x2_device,
	200	};
	201
172ef275 SS	202	static inline void __init overo_init_smsc911x(void)
172ef275 SS	203	{
a5ba7ae2 SS	204	unsigned long cs_mem_base, cs_mem_base2;
	205
	206	/* set up first smsc911x chip */
172ef275 SS	207
	208	if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
	209	printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n");
	210	return;
	211	}
	212
	213	overo_smsc911x_resources[0].start = cs_mem_base + 0x0;
	214	overo_smsc911x_resources[0].end = cs_mem_base + 0xff;
	215
	216	if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) &&
	217	(gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) {
	218	gpio_export(OVERO_SMSC911X_GPIO, 0);
	219	} else {
	220	printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n");
	221	return;
	222	}
	223
	224	overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
	225	overo_smsc911x_resources[1].end = 0;
	226
a5ba7ae2 SS	227	/* set up second smsc911x chip */
	228
	229	if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) {
	230	printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n");
	231	return;
	232	}
	233
	234	overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
	235	overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff;
	236
	237	if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) &&
	238	(gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
	239	gpio_export(OVERO_SMSC911X2_GPIO, 0);
	240	} else {
	241	printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n");
	242	return;
	243	}
	244
	245	overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
	246	overo_smsc911x2_resources[1].end = 0;
	247
	248	platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
172ef275 SS	249	}
	250
	251	#else
	252	static inline void __init overo_init_smsc911x(void) { return; }
	253	#endif
	254
7b12d7b6 SS	255	/* DSS */
	256	static int lcd_enabled;
	257	static int dvi_enabled;
	258
	259	#define OVERO_GPIO_LCD_EN 144
	260	#define OVERO_GPIO_LCD_BL 145
	261
	262	static void __init overo_display_init(void)
	263	{
	264	if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) &&
	265	(gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0))
	266	gpio_export(OVERO_GPIO_LCD_EN, 0);
	267	else
	268	printk(KERN_ERR "could not obtain gpio for "
	269	"OVERO_GPIO_LCD_EN\n");
	270
	271	if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) &&
	272	(gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0))
	273	gpio_export(OVERO_GPIO_LCD_BL, 0);
	274	else
	275	printk(KERN_ERR "could not obtain gpio for "
	276	"OVERO_GPIO_LCD_BL\n");
	277	}
	278
	279	static int overo_panel_enable_dvi(struct omap_dss_device *dssdev)
	280	{
	281	if (lcd_enabled) {
	282	printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
	283	return -EINVAL;
	284	}
	285	dvi_enabled = 1;
	286
	287	return 0;
	288	}
	289
	290	static void overo_panel_disable_dvi(struct omap_dss_device *dssdev)
	291	{
	292	dvi_enabled = 0;
	293	}
	294
	295	static struct panel_generic_dpi_data dvi_panel = {
	296	.name = "generic",
	297	.platform_enable = overo_panel_enable_dvi,
	298	.platform_disable = overo_panel_disable_dvi,
	299	};
	300
	301	static struct omap_dss_device overo_dvi_device = {
	302	.name = "dvi",
	303	.type = OMAP_DISPLAY_TYPE_DPI,
	304	.driver_name = "generic_dpi_panel",
	305	.data = &dvi_panel,
	306	.phy.dpi.data_lines = 24,
	307	};
	308
	309	static struct omap_dss_device overo_tv_device = {
	310	.name = "tv",
	311	.driver_name = "venc",
	312	.type = OMAP_DISPLAY_TYPE_VENC,
	313	.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
	314	};
	315
	316	static int overo_panel_enable_lcd(struct omap_dss_device *dssdev)
	317	{
	318	if (dvi_enabled) {
319	printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
320	return -EINVAL;
321	}
322
323	gpio_set_value(OVERO_GPIO_LCD_EN, 1);
324	gpio_set_value(OVERO_GPIO_LCD_BL, 1);
325	lcd_enabled = 1;
326	return 0;
327	}
328
329	static void overo_panel_disable_lcd(struct omap_dss_device *dssdev)
330	{
331	gpio_set_value(OVERO_GPIO_LCD_EN, 0);
332	gpio_set_value(OVERO_GPIO_LCD_BL, 0);
333	lcd_enabled = 0;
334	}
335
336	static struct panel_generic_dpi_data lcd43_panel = {
337	.name = "samsung_lte430wq_f0c",
338	.platform_enable = overo_panel_enable_lcd,
339	.platform_disable = overo_panel_disable_lcd,
340	};
341
342	static struct omap_dss_device overo_lcd43_device = {
343	.name = "lcd43",
344	.type = OMAP_DISPLAY_TYPE_DPI,
345	.driver_name = "generic_dpi_panel",
346	.data = &lcd43_panel,
347	.phy.dpi.data_lines = 24,
348	};
349
350	#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) \|\| \
351	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
352	static struct omap_dss_device overo_lcd35_device = {
353	.type = OMAP_DISPLAY_TYPE_DPI,
354	.name = "lcd35",
355	.driver_name = "lgphilips_lb035q02_panel",
356	.phy.dpi.data_lines = 24,
357	.platform_enable = overo_panel_enable_lcd,
358	.platform_disable = overo_panel_disable_lcd,
359	};
360	#endif
361
362	static struct omap_dss_device *overo_dss_devices[] = {
363	&overo_dvi_device,
364	&overo_tv_device,
365	#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) \|\| \
366	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
367	&overo_lcd35_device,
368	#endif
369	&overo_lcd43_device,
370	};
371
372	static struct omap_dss_board_info overo_dss_data = {
373	.num_devices = ARRAY_SIZE(overo_dss_devices),
374	.devices = overo_dss_devices,
375	.default_device = &overo_dvi_device,
376	};
377
378	static struct regulator_consumer_supply overo_vdda_dac_supply =
379	REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
380
381	static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
382	REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
383	REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
384	};
385
eba2645a SS	386	static struct mtd_partition overo_nand_partitions[] = {
	387	{
	388	.name = "xloader",
	389	.offset = 0, /* Offset = 0x00000 */
	390	.size = 4 * NAND_BLOCK_SIZE,
	391	.mask_flags = MTD_WRITEABLE
	392	},
	393	{
	394	.name = "uboot",
	395	.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
	396	.size = 14 * NAND_BLOCK_SIZE,
	397	},
	398	{
	399	.name = "uboot environment",
	400	.offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */
	401	.size = 2 * NAND_BLOCK_SIZE,
	402	},
	403	{
	404	.name = "linux",
	405	.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
	406	.size = 32 * NAND_BLOCK_SIZE,
	407	},
	408	{
	409	.name = "rootfs",
	410	.offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
	411	.size = MTDPART_SIZ_FULL,
	412	},
	413	};
	414
	415	static struct omap_nand_platform_data overo_nand_data = {
	416	.parts = overo_nand_partitions,
	417	.nr_parts = ARRAY_SIZE(overo_nand_partitions),
	418	.dma_channel = -1, /* disable DMA in OMAP NAND driver */
	419	};
	420
eba2645a SS	421	static void __init overo_flash_init(void)
	422	{
	423	u8 cs = 0;
	424	u8 nandcs = GPMC_CS_NUM + 1;
	425
eba2645a SS	426	/* find out the chip-select on which NAND exists */
	427	while (cs < GPMC_CS_NUM) {
	428	u32 ret = 0;
	429	ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
	430
	431	if ((ret & 0xC00) == 0x800) {
	432	printk(KERN_INFO "Found NAND on CS%d\n", cs);
	433	if (nandcs > GPMC_CS_NUM)
	434	nandcs = cs;
	435	}
	436	cs++;
	437	}
	438
	439	if (nandcs > GPMC_CS_NUM) {
	440	printk(KERN_INFO "NAND: Unable to find configuration "
	441	"in GPMC\n ");
	442	return;
	443	}
	444
	445	if (nandcs < GPMC_CS_NUM) {
	446	overo_nand_data.cs = nandcs;
eba2645a SS	447
eba2645a SS	448	printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
f450d867	449	if (gpmc_nand_init(&overo_nand_data) < 0)
eba2645a SS	450	printk(KERN_ERR "Unable to register NAND device\n");
	451	}
	452	}
eba2645a	453
68ff0423	454	static struct omap2_hsmmc_info mmc[] = {
bb3b9d8e DB	455	{
bb3b9d8e DB	456	.mmc = 1,
3a63833e	457	.caps = MMC_CAP_4_BIT_DATA,
bb3b9d8e DB	458	.gpio_cd = -EINVAL,
	459	.gpio_wp = -EINVAL,
	460	},
	461	{
	462	.mmc = 2,
3a63833e	463	.caps = MMC_CAP_4_BIT_DATA,
bb3b9d8e DB	464	.gpio_cd = -EINVAL,
	465	.gpio_wp = -EINVAL,
	466	.transceiver = true,
	467	.ocr_mask = 0x00100000, /* 3.3V */
	468	},
	469	{} /* Terminator */
	470	};
	471
	472	static struct regulator_consumer_supply overo_vmmc1_supply = {
	473	.supply = "vmmc",
	474	};
	475
	476	static int overo_twl_gpio_setup(struct device *dev,
	477	unsigned gpio, unsigned ngpio)
	478	{
68ff0423	479	omap2_hsmmc_init(mmc);
bb3b9d8e DB	480
	481	overo_vmmc1_supply.dev = mmc[0].dev;
	482
	483	return 0;
	484	}
	485
90c62bf0 TL	486	static struct twl4030_gpio_platform_data overo_gpio_data = {
	487	.gpio_base = OMAP_MAX_GPIO_LINES,
	488	.irq_base = TWL4030_GPIO_IRQ_BASE,
	489	.irq_end = TWL4030_GPIO_IRQ_END,
bb3b9d8e DB	490	.setup = overo_twl_gpio_setup,
	491	};
	492
	493	static struct twl4030_usb_data overo_usb_data = {
	494	.usb_mode = T2_USB_MODE_ULPI,
	495	};
	496
	497	static struct regulator_init_data overo_vmmc1 = {
	498	.constraints = {
	499	.min_uV = 1850000,
	500	.max_uV = 3150000,
	501	.valid_modes_mask = REGULATOR_MODE_NORMAL
	502	\| REGULATOR_MODE_STANDBY,
	503	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
	504	\| REGULATOR_CHANGE_MODE
	505	\| REGULATOR_CHANGE_STATUS,
	506	},
	507	.num_consumer_supplies = 1,
	508	.consumer_supplies = &overo_vmmc1_supply,
90c62bf0 TL	509	};
90c62bf0 TL	510
7b12d7b6 SS	511	/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
	512	static struct regulator_init_data overo_vdac = {
	513	.constraints = {
	514	.min_uV = 1800000,
	515	.max_uV = 1800000,
	516	.valid_modes_mask = REGULATOR_MODE_NORMAL
	517	\| REGULATOR_MODE_STANDBY,
	518	.valid_ops_mask = REGULATOR_CHANGE_MODE
	519	\| REGULATOR_CHANGE_STATUS,
	520	},
	521	.num_consumer_supplies = 1,
	522	.consumer_supplies = &overo_vdda_dac_supply,
	523	};
	524
	525	/* VPLL2 for digital video outputs */
	526	static struct regulator_init_data overo_vpll2 = {
	527	.constraints = {
	528	.name = "VDVI",
	529	.min_uV = 1800000,
	530	.max_uV = 1800000,
	531	.valid_modes_mask = REGULATOR_MODE_NORMAL
	532	\| REGULATOR_MODE_STANDBY,
	533	.valid_ops_mask = REGULATOR_CHANGE_MODE
	534	\| REGULATOR_CHANGE_STATUS,
	535	},
	536	.num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply),
	537	.consumer_supplies = overo_vdds_dsi_supply,
	538	};
	539
6a58baf8	540	static struct twl4030_codec_audio_data overo_audio_data;
e86fa0b4 PU	541
e86fa0b4 PU	542	static struct twl4030_codec_data overo_codec_data = {
6df74efb	543	.audio_mclk = 26000000,
e86fa0b4 PU	544	.audio = &overo_audio_data,
	545	};
	546
90c62bf0 TL	547	static struct twl4030_platform_data overo_twldata = {
	548	.irq_base = TWL4030_IRQ_BASE,
	549	.irq_end = TWL4030_IRQ_END,
	550	.gpio = &overo_gpio_data,
bb3b9d8e	551	.usb = &overo_usb_data,
e86fa0b4	552	.codec = &overo_codec_data,
bb3b9d8e	553	.vmmc1 = &overo_vmmc1,
7b12d7b6 SS	554	.vdac = &overo_vdac,
7b12d7b6 SS	555	.vpll2 = &overo_vpll2,
90c62bf0 TL	556	};
	557
	558	static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
	559	{
bb3b9d8e	560	I2C_BOARD_INFO("tps65950", 0x48),
90c62bf0 TL	561	.flags = I2C_CLIENT_WAKE,
	562	.irq = INT_34XX_SYS_NIRQ,
	563	.platform_data = &overo_twldata,
	564	},
	565	};
	566
eba2645a SS	567	static int __init overo_i2c_init(void)
eba2645a SS	568	{
90c62bf0 TL	569	omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo,
90c62bf0 TL	570	ARRAY_SIZE(overo_i2c_boardinfo));
eba2645a SS	571	/* i2c2 pins are used for gpio */
	572	omap_register_i2c_bus(3, 400, NULL, 0);
	573	return 0;
	574	}
	575
7b12d7b6 SS	576	static struct spi_board_info overo_spi_board_info[] __initdata = {
	577	#if defined(CONFIG_TOUCHSCREEN_ADS7846) \|\| \
	578	defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
	579	{
	580	.modalias = "ads7846",
	581	.bus_num = 1,
	582	.chip_select = 0,
	583	.max_speed_hz = 1500000,
	584	.controller_data = &ads7846_mcspi_config,
	585	.irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
	586	.platform_data = &ads7846_config,
	587	},
	588	#endif
	589	#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) \|\| \
	590	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
	591	{
	592	.modalias = "lgphilips_lb035q02_panel-spi",
	593	.bus_num = 1,
	594	.chip_select = 1,
	595	.max_speed_hz = 500000,
	596	.mode = SPI_MODE_3,
	597	},
	598	#endif
eba2645a SS	599	};
eba2645a SS	600
7b12d7b6 SS	601	static int __init overo_spi_init(void)
	602	{
	603	overo_ads7846_init();
	604	spi_register_board_info(overo_spi_board_info,
	605	ARRAY_SIZE(overo_spi_board_info));
	606	return 0;
	607	}
eba2645a	608
3dc3bad6	609	static void __init overo_init_early(void)
b3c6df3a	610	{
4805734b PW	611	omap2_init_common_infrastructure();
	612	omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
	613	mt46h32m32lf6_sdrc_params);
b3c6df3a PW	614	}
b3c6df3a PW	615
6f69a181	616	static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
58a5491c FB	617	.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
	618	.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
	619	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
	620
	621	.phy_reset = true,
	622	.reset_gpio_port[0] = -EINVAL,
	623	.reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET,
	624	.reset_gpio_port[2] = -EINVAL
	625	};
	626
ca5742bd TL	627	#ifdef CONFIG_OMAP_MUX
	628	static struct omap_board_mux board_mux[] __initdata = {
	629	{ .reg_offset = OMAP_MUX_TERMINATOR },
	630	};
ca5742bd	631	#endif
58a5491c	632
884b8369 MM	633	static struct omap_musb_board_data musb_board_data = {
	634	.interface_type = MUSB_INTERFACE_ULPI,
	635	.mode = MUSB_OTG,
	636	.power = 100,
	637	};
	638
eba2645a SS	639	static void __init overo_init(void)
eba2645a SS	640	{
ca5742bd	641	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
eba2645a	642	overo_i2c_init();
7b12d7b6	643	omap_display_init(&overo_dss_data);
eba2645a SS	644	omap_serial_init();
eba2645a SS	645	overo_flash_init();
884b8369	646	usb_musb_init(&musb_board_data);
58a5491c	647	usb_ehci_init(&ehci_pdata);
7b12d7b6	648	overo_spi_init();
172ef275	649	overo_init_smsc911x();
7b12d7b6	650	overo_display_init();
eba2645a	651
9fb97412	652	/* Ensure SDRC pins are mux'd for self-refresh */
4896e394 TL	653	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
4896e394 TL	654	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
9fb97412	655
eba2645a SS	656	if ((gpio_request(OVERO_GPIO_W2W_NRESET,
	657	"OVERO_GPIO_W2W_NRESET") == 0) &&
	658	(gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
	659	gpio_export(OVERO_GPIO_W2W_NRESET, 0);
	660	gpio_set_value(OVERO_GPIO_W2W_NRESET, 0);
	661	udelay(10);
	662	gpio_set_value(OVERO_GPIO_W2W_NRESET, 1);
	663	} else {
	664	printk(KERN_ERR "could not obtain gpio for "
	665	"OVERO_GPIO_W2W_NRESET\n");
	666	}
	667
	668	if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) &&
	669	(gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0))
	670	gpio_export(OVERO_GPIO_BT_XGATE, 0);
	671	else
	672	printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n");
	673
	674	if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) &&
	675	(gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) {
	676	gpio_export(OVERO_GPIO_BT_NRESET, 0);
	677	gpio_set_value(OVERO_GPIO_BT_NRESET, 0);
	678	mdelay(6);
	679	gpio_set_value(OVERO_GPIO_BT_NRESET, 1);
	680	} else {
	681	printk(KERN_ERR "could not obtain gpio for "
	682	"OVERO_GPIO_BT_NRESET\n");
	683	}
	684
	685	if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) &&
	686	(gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0))
	687	gpio_export(OVERO_GPIO_USBH_CPEN, 0);
	688	else
	689	printk(KERN_ERR "could not obtain gpio for "
	690	"OVERO_GPIO_USBH_CPEN\n");
eba2645a SS	691	}
eba2645a SS	692
eba2645a	693	MACHINE_START(OVERO, "Gumstix Overo")
eba2645a	694	.boot_params = 0x80000100,
71ee7dad	695	.reserve = omap_reserve,
3dc3bad6 RKAL	696	.map_io = omap3_map_io,
	697	.init_early = overo_init_early,
	698	.init_irq = omap_init_irq,
eba2645a SS	699	.init_machine = overo_init,
	700	.timer = &omap_timer,
	701	MACHINE_END