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Merge branch 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL		 21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
5e763d29 26#include <linux/mmc/host.h>
10299e2e 27#include <linux/power/isp1704_charger.h>
2203747c
AB		 28#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <linux/platform_data/mtd-onenand-omap2.h>
30
9f97da78 31#include <asm/system_info.h>
ffe7f95b 32
4e65331c 33#include "common.h"
45c3eb7d 34#include <linux/omap-dma.h>
60628152 35#include "gpmc-smc91x.h"
ffe7f95b 36
0a6f98c9 37#include "board-rx51.h"
04aeae77 38
87581fd4 39#include <sound/tlv320aic3x.h>
64d06691 40#include <sound/tpa6130a2-plat.h>
589541c0
JN		 41#include <media/radio-si4713.h>
42#include <media/si4713.h>
df4094d2 43#include <linux/platform_data/leds-lp55xx.h>
87581fd4 44
9c2251dd 45#include <linux/platform_data/tsl2563.h>
3b511201 46#include <linux/lis3lv02d.h>
70b5d737 47
322c183c
TK		 48#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
49#include <media/ir-rx51.h>
50#endif
51
4896e394 52#include "mux.h"
1d5aef49 53#include "omap-pm.h"
d02a900b 54#include "hsmmc.h"
fbd8071c 55#include "common-board-devices.h"
99f0b8d6 56#include "gpmc.h"
b6ab13e7 57#include "gpmc-onenand.h"
ffe7f95b 58
f52eeee8
AH		 59#define SYSTEM_REV_B_USES_VAUX3 0x1699
60#define SYSTEM_REV_S_USES_VAUX3 0x8
61
a24e61a9
KV		 62#define RX51_WL1251_POWER_GPIO 87
63#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN		 64#define RX51_FMTX_RESET_GPIO 163
65#define RX51_FMTX_IRQ 53
eeada9e8 66#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 67
10299e2e
KJ		 68#define RX51_USB_TRANSCEIVER_RST_GPIO 67
69
3dad5356
AK		 70#define RX51_TSC2005_RESET_GPIO 104
71#define RX51_TSC2005_IRQ_GPIO 100
72
3b511201
AP		 73#define LIS302_IRQ1_GPIO 181
74#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
75
a24e61a9
KV		 76/* list all spi devices here */
77enum {
78 RX51_SPI_WL1251,
03e11104 79 RX51_SPI_MIPID, /* LCD panel */
6996e7ff 80 RX51_SPI_TSC2005, /* Touch Controller */
a24e61a9
KV		 81};
82
83static struct wl12xx_platform_data wl1251_pdata;
3dad5356 84static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 85
3b511201
AP		 86#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
87static int lis302_setup(void)
88{
89 int err;
90 int irq1 = LIS302_IRQ1_GPIO;
91 int irq2 = LIS302_IRQ2_GPIO;
92
93 /* gpio for interrupt pin 1 */
94 err = gpio_request(irq1, "lis3lv02dl_irq1");
95 if (err) {
96 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
97 goto out;
98 }
99
100 /* gpio for interrupt pin 2 */
101 err = gpio_request(irq2, "lis3lv02dl_irq2");
102 if (err) {
103 gpio_free(irq1);
104 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
105 goto out;
106 }
107
108 gpio_direction_input(irq1);
109 gpio_direction_input(irq2);
110
111out:
112 return err;
113}
114
115static int lis302_release(void)
116{
117 gpio_free(LIS302_IRQ1_GPIO);
118 gpio_free(LIS302_IRQ2_GPIO);
119
120 return 0;
121}
122
123static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
124 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
125 LIS3_CLICK_SINGLE_Z,
126 /* Limits are 0.5g * value */
127 .click_thresh_x = 8,
128 .click_thresh_y = 8,
129 .click_thresh_z = 10,
130 /* Click must be longer than time limit */
131 .click_time_limit = 9,
132 /* Kind of debounce filter */
133 .click_latency = 50,
134
135 /* Limits for all axis. millig-value / 18 to get HW values */
136 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
137 .wakeup_thresh = 800 / 18,
138 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
139 .wakeup_thresh2 = 900 / 18,
140
141 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
142
143 /* Interrupt line 2 for click detection, line 1 for thresholds */
144 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
145
146 .axis_x = LIS3_DEV_X,
147 .axis_y = LIS3_INV_DEV_Y,
148 .axis_z = LIS3_INV_DEV_Z,
149 .setup_resources = lis302_setup,
150 .release_resources = lis302_release,
151 .st_min_limits = {-32, 3, 3},
152 .st_max_limits = {-3, 32, 32},
3b511201
AP		 153};
154#endif
155
70b5d737
MN		 156#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
157static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
158 .cover_comp_gain = 16,
159};
160#endif
161
eeada9e8 162#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
df4094d2 163static struct lp55xx_led_config rx51_lp5523_led_config[] = {
eeada9e8 164 {
1e7bf5e3 165 .name = "lp5523:kb1",
eeada9e8
AP		 166 .chan_nr = 0,
167 .led_current = 50,
168 }, {
1e7bf5e3 169 .name = "lp5523:kb2",
eeada9e8
AP		 170 .chan_nr = 1,
171 .led_current = 50,
172 }, {
1e7bf5e3 173 .name = "lp5523:kb3",
eeada9e8
AP		 174 .chan_nr = 2,
175 .led_current = 50,
176 }, {
1e7bf5e3 177 .name = "lp5523:kb4",
eeada9e8
AP		 178 .chan_nr = 3,
179 .led_current = 50,
180 }, {
1e7bf5e3 181 .name = "lp5523:b",
eeada9e8
AP		 182 .chan_nr = 4,
183 .led_current = 50,
184 }, {
1e7bf5e3 185 .name = "lp5523:g",
eeada9e8
AP		 186 .chan_nr = 5,
187 .led_current = 50,
188 }, {
1e7bf5e3 189 .name = "lp5523:r",
eeada9e8
AP		 190 .chan_nr = 6,
191 .led_current = 50,
192 }, {
1e7bf5e3 193 .name = "lp5523:kb5",
eeada9e8
AP		 194 .chan_nr = 7,
195 .led_current = 50,
196 }, {
1e7bf5e3 197 .name = "lp5523:kb6",
eeada9e8
AP		 198 .chan_nr = 8,
199 .led_current = 50,
200 }
201};
202
203static int rx51_lp5523_setup(void)
204{
205 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
206 "lp5523_enable");
207}
208
209static void rx51_lp5523_release(void)
210{
211 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
212}
213
214static void rx51_lp5523_enable(bool state)
215{
216 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
217}
218
df4094d2 219static struct lp55xx_platform_data rx51_lp5523_platform_data = {
eeada9e8
AP		 220 .led_config = rx51_lp5523_led_config,
221 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
df4094d2 222 .clock_mode = LP55XX_CLOCK_AUTO,
eeada9e8
AP		 223 .setup_resources = rx51_lp5523_setup,
224 .release_resources = rx51_lp5523_release,
225 .enable = rx51_lp5523_enable,
226};
227#endif
228
a24e61a9
KV		 229static struct omap2_mcspi_device_config wl1251_mcspi_config = {
230 .turbo_mode = 0,
a24e61a9
KV		 231};
232
03e11104
RQ		 233static struct omap2_mcspi_device_config mipid_mcspi_config = {
234 .turbo_mode = 0,
03e11104
RQ		 235};
236
6996e7ff
RQ		 237static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
238 .turbo_mode = 0,
6996e7ff
RQ		 239};
240
a24e61a9
KV		 241static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
242 [RX51_SPI_WL1251] = {
243 .modalias = "wl1251",
244 .bus_num = 4,
245 .chip_select = 0,
246 .max_speed_hz = 48000000,
860fc976 247 .mode = SPI_MODE_3,
a24e61a9
KV		 248 .controller_data = &wl1251_mcspi_config,
249 .platform_data = &wl1251_pdata,
250 },
03e11104
RQ		 251 [RX51_SPI_MIPID] = {
252 .modalias = "acx565akm",
253 .bus_num = 1,
254 .chip_select = 2,
255 .max_speed_hz = 6000000,
256 .controller_data = &mipid_mcspi_config,
257 },
6996e7ff
RQ		 258 [RX51_SPI_TSC2005] = {
259 .modalias = "tsc2005",
260 .bus_num = 1,
261 .chip_select = 0,
6996e7ff
RQ		 262 .max_speed_hz = 6000000,
263 .controller_data = &tsc2005_mcspi_config,
3dad5356 264 .platform_data = &tsc2005_pdata,
6996e7ff 265 },
a24e61a9
KV		 266};
267
7605c0b0
PR		 268static struct platform_device rx51_battery_device = {
269 .name = "rx51-battery",
270 .id = -1,
271};
272
10299e2e
KJ		 273static void rx51_charger_set_power(bool on)
274{
275 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
276}
277
278static struct isp1704_charger_data rx51_charger_data = {
279 .set_power = rx51_charger_set_power,
280};
281
fd0964c5 282static struct platform_device rx51_charger_device = {
10299e2e
KJ		 283 .name = "isp1704_charger",
284 .dev = {
285 .platform_data = &rx51_charger_data,
286 },
fd0964c5
HK		 287};
288
10299e2e
KJ		 289static void __init rx51_charger_init(void)
290{
291 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 292 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e 293
7605c0b0 294 platform_device_register(&rx51_battery_device);
10299e2e
KJ		 295 platform_device_register(&rx51_charger_device);
296}
297
f014ee32
JN		 298#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
299
300#define RX51_GPIO_CAMERA_LENS_COVER 110
301#define RX51_GPIO_CAMERA_FOCUS 68
302#define RX51_GPIO_CAMERA_CAPTURE 69
303#define RX51_GPIO_KEYPAD_SLIDE 71
304#define RX51_GPIO_LOCK_BUTTON 113
305#define RX51_GPIO_PROXIMITY 89
306
307#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
308
309static struct gpio_keys_button rx51_gpio_keys[] = {
310 {
311 .desc = "Camera Lens Cover",
312 .type = EV_SW,
313 .code = SW_CAMERA_LENS_COVER,
314 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
315 .active_low = 1,
316 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
317 }, {
318 .desc = "Camera Focus",
319 .type = EV_KEY,
320 .code = KEY_CAMERA_FOCUS,
321 .gpio = RX51_GPIO_CAMERA_FOCUS,
322 .active_low = 1,
323 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
324 }, {
325 .desc = "Camera Capture",
326 .type = EV_KEY,
327 .code = KEY_CAMERA,
328 .gpio = RX51_GPIO_CAMERA_CAPTURE,
329 .active_low = 1,
330 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
331 }, {
332 .desc = "Lock Button",
333 .type = EV_KEY,
334 .code = KEY_SCREENLOCK,
335 .gpio = RX51_GPIO_LOCK_BUTTON,
336 .active_low = 1,
337 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
338 }, {
339 .desc = "Keypad Slide",
340 .type = EV_SW,
341 .code = SW_KEYPAD_SLIDE,
342 .gpio = RX51_GPIO_KEYPAD_SLIDE,
343 .active_low = 1,
344 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
345 }, {
346 .desc = "Proximity Sensor",
347 .type = EV_SW,
348 .code = SW_FRONT_PROXIMITY,
349 .gpio = RX51_GPIO_PROXIMITY,
350 .active_low = 0,
351 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
352 }
353};
354
355static struct gpio_keys_platform_data rx51_gpio_keys_data = {
356 .buttons = rx51_gpio_keys,
357 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
358};
359
360static struct platform_device rx51_gpio_keys_device = {
361 .name = "gpio-keys",
362 .id = -1,
363 .dev = {
364 .platform_data = &rx51_gpio_keys_data,
365 },
366};
367
368static void __init rx51_add_gpio_keys(void)
369{
370 platform_device_register(&rx51_gpio_keys_device);
371}
372#else
373static void __init rx51_add_gpio_keys(void)
374{
375}
376#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
377
bead4375 378static uint32_t board_keymap[] = {
3fea6026
DT		 379 /*
380 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
381 * connected to the ground" matrix state.
382 */
ffe7f95b 383 KEY(0, 0, KEY_Q),
acf442dc
AK		 384 KEY(0, 1, KEY_O),
385 KEY(0, 2, KEY_P),
386 KEY(0, 3, KEY_COMMA),
387 KEY(0, 4, KEY_BACKSPACE),
388 KEY(0, 6, KEY_A),
389 KEY(0, 7, KEY_S),
3fea6026 390
acf442dc 391 KEY(1, 0, KEY_W),
ffe7f95b 392 KEY(1, 1, KEY_D),
acf442dc
AK		 393 KEY(1, 2, KEY_F),
394 KEY(1, 3, KEY_G),
395 KEY(1, 4, KEY_H),
396 KEY(1, 5, KEY_J),
397 KEY(1, 6, KEY_K),
398 KEY(1, 7, KEY_L),
3fea6026 399
acf442dc
AK		 400 KEY(2, 0, KEY_E),
401 KEY(2, 1, KEY_DOT),
ffe7f95b 402 KEY(2, 2, KEY_UP),
acf442dc
AK		 403 KEY(2, 3, KEY_ENTER),
404 KEY(2, 5, KEY_Z),
405 KEY(2, 6, KEY_X),
406 KEY(2, 7, KEY_C),
3fea6026
DT		 407 KEY(2, 8, KEY_F9),
408
acf442dc
AK		 409 KEY(3, 0, KEY_R),
410 KEY(3, 1, KEY_V),
411 KEY(3, 2, KEY_B),
ffe7f95b 412 KEY(3, 3, KEY_N),
acf442dc
AK		 413 KEY(3, 4, KEY_M),
414 KEY(3, 5, KEY_SPACE),
415 KEY(3, 6, KEY_SPACE),
416 KEY(3, 7, KEY_LEFT),
3fea6026 417
acf442dc
AK		 418 KEY(4, 0, KEY_T),
419 KEY(4, 1, KEY_DOWN),
420 KEY(4, 2, KEY_RIGHT),
ffe7f95b 421 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 422 KEY(4, 5, KEY_RIGHTALT),
423 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 424 KEY(4, 8, KEY_F10),
3fea6026 425
acf442dc 426 KEY(5, 0, KEY_Y),
2e65a207 427 KEY(5, 8, KEY_F11),
3fea6026 428
acf442dc 429 KEY(6, 0, KEY_U),
3fea6026 430
acf442dc
AK		 431 KEY(7, 0, KEY_I),
432 KEY(7, 1, KEY_F7),
433 KEY(7, 2, KEY_F8),
ffe7f95b
LL		 434};
435
4f543332
TL		 436static struct matrix_keymap_data board_map_data = {
437 .keymap = board_keymap,
438 .keymap_size = ARRAY_SIZE(board_keymap),
439};
440
ffe7f95b 441static struct twl4030_keypad_data rx51_kp_data = {
4f543332 442 .keymap_data = &board_map_data,
ffe7f95b
LL		 443 .rows = 8,
444 .cols = 8,
ffe7f95b
LL		 445 .rep = 1,
446};
447
ce6f0016
AH		 448/* Enable input logic and pull all lines up when eMMC is on. */
449static struct omap_board_mux rx51_mmc2_on_mux[] = {
450 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
451 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
452 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
453 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
454 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
455 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
456 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
457 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
458 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
459 { .reg_offset = OMAP_MUX_TERMINATOR },
460};
461
462/* Disable input logic and pull all lines down when eMMC is off. */
463static struct omap_board_mux rx51_mmc2_off_mux[] = {
464 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
465 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
466 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
467 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
468 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
469 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
470 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
471 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
472 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
473 { .reg_offset = OMAP_MUX_TERMINATOR },
474};
475
112485e9
BC		 476static struct omap_mux_partition *partition;
477
ce6f0016
AH		 478/*
479 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
480 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
481 */
482static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
483{
484 if (power_on)
112485e9 485 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 486 else
112485e9 487 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH		 488}
489
68ff0423 490static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 491 {
492 .name = "external",
493 .mmc = 1,
3a63833e 494 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL		 495 .cover_only = true,
496 .gpio_cd = 160,
497 .gpio_wp = -EINVAL,
5e763d29 498 .power_saving = true,
ffe7f95b
LL		 499 },
500 {
501 .name = "internal",
502 .mmc = 2,
3a63833e
SG		 503 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
504 /* See also rx51_mmc2_remux */
ffe7f95b
LL		 505 .gpio_cd = -EINVAL,
506 .gpio_wp = -EINVAL,
5e763d29
AH		 507 .nonremovable = true,
508 .power_saving = true,
ce6f0016 509 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 510 },
511 {} /* Terminator */
512};
513
786b01a8
OD		 514static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
515 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
516};
ffe7f95b 517
664a41b8
LT		 518static struct regulator_consumer_supply rx51_vaux2_supply[] = {
519 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
520};
75ccf268 521
786b01a8
OD		 522static struct regulator_consumer_supply rx51_vaux3_supply[] = {
523 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
524};
ffe7f95b 525
786b01a8
OD		 526static struct regulator_consumer_supply rx51_vsim_supply[] = {
527 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
528};
ffe7f95b 529
4cfcaef1
JN		 530static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
531 /* tlv320aic3x analog supplies */
5c7d9bbe
JN		 532 REGULATOR_SUPPLY("AVDD", "2-0018"),
533 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN		 534 REGULATOR_SUPPLY("AVDD", "2-0019"),
535 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN		 536 /* tpa6130a2 */
537 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 538 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 539 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN		 540};
541
542static struct regulator_consumer_supply rx51_vio_supplies[] = {
543 /* tlv320aic3x digital supplies */
5c7d9bbe
JN		 544 REGULATOR_SUPPLY("IOVDD", "2-0018"),
545 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN		 546 REGULATOR_SUPPLY("IOVDD", "2-0019"),
547 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN		 548 /* Si4713 IO supply */
549 REGULATOR_SUPPLY("vio", "2-0063"),
4cfcaef1
JN		 550};
551
0581b52e 552static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 553 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
589541c0
JN		 554 /* Si4713 supply */
555 REGULATOR_SUPPLY("vdd", "2-0063"),
0581b52e
RQ		 556};
557
ffe7f95b
LL		 558static struct regulator_init_data rx51_vaux1 = {
559 .constraints = {
560 .name = "V28",
561 .min_uV = 2800000,
562 .max_uV = 2800000,
000d534e 563 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL		 564 .valid_modes_mask = REGULATOR_MODE_NORMAL
565 | REGULATOR_MODE_STANDBY,
566 .valid_ops_mask = REGULATOR_CHANGE_MODE
567 | REGULATOR_CHANGE_STATUS,
568 },
0581b52e
RQ		 569 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
570 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 571};
572
573static struct regulator_init_data rx51_vaux2 = {
574 .constraints = {
575 .name = "VCSI",
576 .min_uV = 1800000,
577 .max_uV = 1800000,
578 .valid_modes_mask = REGULATOR_MODE_NORMAL
579 | REGULATOR_MODE_STANDBY,
580 .valid_ops_mask = REGULATOR_CHANGE_MODE
581 | REGULATOR_CHANGE_STATUS,
582 },
664a41b8
LT		 583 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
584 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL		 585};
586
587/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 588static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 589 .constraints = {
590 .name = "VCAM_DIG_18",
591 .min_uV = 1800000,
592 .max_uV = 1800000,
593 .apply_uV = true,
594 .valid_modes_mask = REGULATOR_MODE_NORMAL
595 | REGULATOR_MODE_STANDBY,
596 .valid_ops_mask = REGULATOR_CHANGE_MODE
597 | REGULATOR_CHANGE_STATUS,
598 },
599};
600
f52eeee8
AH		 601static struct regulator_init_data rx51_vaux3_mmc = {
602 .constraints = {
603 .name = "VMMC2_30",
604 .min_uV = 2800000,
605 .max_uV = 3000000,
606 .apply_uV = true,
607 .valid_modes_mask = REGULATOR_MODE_NORMAL
608 | REGULATOR_MODE_STANDBY,
609 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
610 | REGULATOR_CHANGE_MODE
611 | REGULATOR_CHANGE_STATUS,
612 },
786b01a8
OD		 613 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
614 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH		 615};
616
ffe7f95b
LL		 617static struct regulator_init_data rx51_vaux4 = {
618 .constraints = {
619 .name = "VCAM_ANA_28",
620 .min_uV = 2800000,
621 .max_uV = 2800000,
622 .apply_uV = true,
623 .valid_modes_mask = REGULATOR_MODE_NORMAL
624 | REGULATOR_MODE_STANDBY,
625 .valid_ops_mask = REGULATOR_CHANGE_MODE
626 | REGULATOR_CHANGE_STATUS,
627 },
628};
629
630static struct regulator_init_data rx51_vmmc1 = {
631 .constraints = {
632 .min_uV = 1850000,
633 .max_uV = 3150000,
634 .valid_modes_mask = REGULATOR_MODE_NORMAL
635 | REGULATOR_MODE_STANDBY,
636 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
637 | REGULATOR_CHANGE_MODE
638 | REGULATOR_CHANGE_STATUS,
639 },
786b01a8
OD		 640 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
641 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL		 642};
643
644static struct regulator_init_data rx51_vmmc2 = {
645 .constraints = {
f2add1de
JN		 646 .name = "V28_A",
647 .min_uV = 2800000,
648 .max_uV = 3000000,
2827411e 649 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL		 650 .apply_uV = true,
651 .valid_modes_mask = REGULATOR_MODE_NORMAL
652 | REGULATOR_MODE_STANDBY,
653 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
654 | REGULATOR_CHANGE_MODE
655 | REGULATOR_CHANGE_STATUS,
656 },
4cfcaef1
JN		 657 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
658 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 659};
660
094fc559
KJ		 661static struct regulator_init_data rx51_vpll1 = {
662 .constraints = {
663 .name = "VPLL",
664 .min_uV = 1800000,
665 .max_uV = 1800000,
666 .apply_uV = true,
667 .always_on = true,
668 .valid_modes_mask = REGULATOR_MODE_NORMAL
669 | REGULATOR_MODE_STANDBY,
670 .valid_ops_mask = REGULATOR_CHANGE_MODE,
671 },
672};
673
674static struct regulator_init_data rx51_vpll2 = {
675 .constraints = {
676 .name = "VSDI_CSI",
677 .min_uV = 1800000,
678 .max_uV = 1800000,
679 .apply_uV = true,
680 .always_on = true,
681 .valid_modes_mask = REGULATOR_MODE_NORMAL
682 | REGULATOR_MODE_STANDBY,
683 .valid_ops_mask = REGULATOR_CHANGE_MODE,
684 },
685};
686
ffe7f95b
LL		 687static struct regulator_init_data rx51_vsim = {
688 .constraints = {
689 .name = "VMMC2_IO_18",
690 .min_uV = 1800000,
691 .max_uV = 1800000,
692 .apply_uV = true,
693 .valid_modes_mask = REGULATOR_MODE_NORMAL
694 | REGULATOR_MODE_STANDBY,
695 .valid_ops_mask = REGULATOR_CHANGE_MODE
696 | REGULATOR_CHANGE_STATUS,
697 },
786b01a8
OD		 698 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
699 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL		 700};
701
4cfcaef1
JN		 702static struct regulator_init_data rx51_vio = {
703 .constraints = {
704 .min_uV = 1800000,
705 .max_uV = 1800000,
706 .valid_modes_mask = REGULATOR_MODE_NORMAL
707 | REGULATOR_MODE_STANDBY,
708 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
709 | REGULATOR_CHANGE_MODE
710 | REGULATOR_CHANGE_STATUS,
711 },
712 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
713 .consumer_supplies = rx51_vio_supplies,
714};
715
094fc559
KJ		 716static struct regulator_init_data rx51_vintana1 = {
717 .constraints = {
718 .name = "VINTANA1",
719 .min_uV = 1500000,
720 .max_uV = 1500000,
721 .always_on = true,
722 .valid_modes_mask = REGULATOR_MODE_NORMAL
723 | REGULATOR_MODE_STANDBY,
724 .valid_ops_mask = REGULATOR_CHANGE_MODE,
725 },
726};
727
728static struct regulator_init_data rx51_vintana2 = {
729 .constraints = {
730 .name = "VINTANA2",
731 .min_uV = 2750000,
732 .max_uV = 2750000,
733 .apply_uV = true,
734 .always_on = true,
735 .valid_modes_mask = REGULATOR_MODE_NORMAL
736 | REGULATOR_MODE_STANDBY,
737 .valid_ops_mask = REGULATOR_CHANGE_MODE,
738 },
739};
740
741static struct regulator_init_data rx51_vintdig = {
742 .constraints = {
743 .name = "VINTDIG",
744 .min_uV = 1500000,
745 .max_uV = 1500000,
746 .always_on = true,
747 .valid_modes_mask = REGULATOR_MODE_NORMAL
748 | REGULATOR_MODE_STANDBY,
749 .valid_ops_mask = REGULATOR_CHANGE_MODE,
750 },
751};
752
589541c0
JN		 753static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
754 .gpio_reset = RX51_FMTX_RESET_GPIO,
755};
756
757static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
758 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
759 .platform_data = &rx51_si4713_i2c_data,
760};
761
762static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
763 .i2c_bus = 2,
764 .subdev_board_info = &rx51_si4713_board_info,
765};
766
12aee6c6 767static struct platform_device rx51_si4713_dev __initdata_or_module = {
589541c0
JN		 768 .name = "radio-si4713",
769 .id = -1,
770 .dev = {
771 .platform_data = &rx51_si4713_data,
772 },
773};
774
775static __init void rx51_init_si4713(void)
776{
777 int err;
778
779 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
780 if (err) {
781 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
782 return;
783 }
784 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
785 platform_device_register(&rx51_si4713_dev);
786}
787
ffe7f95b
LL		 788static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
789{
790 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 791 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 792 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 793
ffe7f95b
LL		 794 return 0;
795}
796
797static struct twl4030_gpio_platform_data rx51_gpio_data = {
ffe7f95b
LL		 798 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
799 | BIT(4) | BIT(5)
800 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
801 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
802 | BIT(16) | BIT(17) ,
803 .setup = rx51_twlgpio_setup,
804};
805
9312fffb
AK		 806static struct twl4030_ins sleep_on_seq[] __initdata = {
807/*
3c684e84 808 * Turn off everything
9312fffb 809 */
3c684e84 810 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 811};
812
813static struct twl4030_script sleep_on_script __initdata = {
814 .script = sleep_on_seq,
815 .size = ARRAY_SIZE(sleep_on_seq),
816 .flags = TWL4030_SLEEP_SCRIPT,
817};
818
819static struct twl4030_ins wakeup_seq[] __initdata = {
820/*
3c684e84 821 * Reenable everything
9312fffb 822 */
3c684e84 823 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 824};
825
826static struct twl4030_script wakeup_script __initdata = {
827 .script = wakeup_seq,
828 .size = ARRAY_SIZE(wakeup_seq),
829 .flags = TWL4030_WAKEUP12_SCRIPT,
830};
831
832static struct twl4030_ins wakeup_p3_seq[] __initdata = {
833/*
3c684e84 834 * Reenable everything
9312fffb 835 */
3c684e84 836 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 837};
838
839static struct twl4030_script wakeup_p3_script __initdata = {
840 .script = wakeup_p3_seq,
841 .size = ARRAY_SIZE(wakeup_p3_seq),
842 .flags = TWL4030_WAKEUP3_SCRIPT,
843};
844
845static struct twl4030_ins wrst_seq[] __initdata = {
846/*
847 * Reset twl4030.
848 * Reset VDD1 regulator.
849 * Reset VDD2 regulator.
850 * Reset VPLL1 regulator.
851 * Enable sysclk output.
852 * Reenable twl4030.
853 */
854 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
855 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
856 0x13},
9312fffb
AK		 857 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
858 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
859 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
860 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 861 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 862 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
863};
864
865static struct twl4030_script wrst_script __initdata = {
866 .script = wrst_seq,
867 .size = ARRAY_SIZE(wrst_seq),
868 .flags = TWL4030_WRST_SCRIPT,
869};
870
871static struct twl4030_script *twl4030_scripts[] __initdata = {
872 /* wakeup12 script should be loaded before sleep script, otherwise a
873 board might hit retention before loading of wakeup script is
874 completed. This can cause boot failures depending on timing issues.
875 */
876 &wakeup_script,
877 &sleep_on_script,
878 &wakeup_p3_script,
879 &wrst_script,
880};
881
882static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 883 { .resource = RES_VDD1, .devgroup = -1,
884 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
885 .remap_sleep = RES_STATE_OFF
886 },
887 { .resource = RES_VDD2, .devgroup = -1,
888 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
889 .remap_sleep = RES_STATE_OFF
890 },
891 { .resource = RES_VPLL1, .devgroup = -1,
892 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
893 .remap_sleep = RES_STATE_OFF
894 },
895 { .resource = RES_VPLL2, .devgroup = -1,
896 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
897 },
898 { .resource = RES_VAUX1, .devgroup = -1,
899 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
900 },
901 { .resource = RES_VAUX2, .devgroup = -1,
902 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
903 },
904 { .resource = RES_VAUX3, .devgroup = -1,
905 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
906 },
907 { .resource = RES_VAUX4, .devgroup = -1,
908 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
909 },
910 { .resource = RES_VMMC1, .devgroup = -1,
911 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
912 },
913 { .resource = RES_VMMC2, .devgroup = -1,
914 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
915 },
916 { .resource = RES_VDAC, .devgroup = -1,
917 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
918 },
919 { .resource = RES_VSIM, .devgroup = -1,
920 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
921 },
922 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
923 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
924 },
925 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
926 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
927 },
928 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
929 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
930 },
931 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
932 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
933 },
934 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
935 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
936 },
937 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
938 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
939 },
940 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
941 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
942 },
943 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
944 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
945 },
946 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
947 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
948 },
949 { .resource = RES_32KCLKOUT, .devgroup = -1,
950 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
951 },
952 { .resource = RES_RESET, .devgroup = -1,
953 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
954 },
d7ac829f 955 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK		 956 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
957 },
9312fffb
AK		 958 { 0, 0},
959};
960
961static struct twl4030_power_data rx51_t2scripts_data __initdata = {
962 .scripts = twl4030_scripts,
963 .num = ARRAY_SIZE(twl4030_scripts),
964 .resource_config = twl4030_rconfig,
965};
966
8c3d4534 967static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK		 968 .coexist = 0,
969};
970
8c3d4534 971static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK		 972 .audio_mclk = 26000000,
973 .vibra = &rx51_vibra_data,
974};
9312fffb 975
9312fffb 976static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 977 /* platform_data for children goes here */
978 .gpio = &rx51_gpio_data,
979 .keypad = &rx51_kp_data,
9312fffb 980 .power = &rx51_t2scripts_data,
4ae6df5e 981 .audio = &rx51_audio_data,
ffe7f95b
LL		 982
983 .vaux1 = &rx51_vaux1,
984 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 985 .vaux4 = &rx51_vaux4,
986 .vmmc1 = &rx51_vmmc1,
094fc559
KJ		 987 .vpll1 = &rx51_vpll1,
988 .vpll2 = &rx51_vpll2,
ffe7f95b 989 .vsim = &rx51_vsim,
094fc559
KJ		 990 .vintana1 = &rx51_vintana1,
991 .vintana2 = &rx51_vintana2,
992 .vintdig = &rx51_vintdig,
4cfcaef1 993 .vio = &rx51_vio,
ffe7f95b
LL		 994};
995
f0c61d3d 996static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN		 997 .power_gpio = 98,
998};
999
f0fba2ad
LG		 1000/* Audio setup data */
1001static struct aic3x_setup_data rx51_aic34_setup = {
1002 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
1003 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
1004};
1005
e4862f2f 1006static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG		 1007 .setup = &rx51_aic34_setup,
1008 .gpio_reset = 60,
1009};
1010
caeeb4aa
JN		 1011static struct aic3x_pdata rx51_aic3x_data2 = {
1012 .gpio_reset = 60,
1013};
1014
dabe929b
JN		 1015static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
1016 {
1017 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 1018 .platform_data = &rx51_aic3x_data,
dabe929b 1019 },
caeeb4aa
JN		 1020 {
1021 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1022 .platform_data = &rx51_aic3x_data2,
1023 },
70b5d737
MN		 1024#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1025 {
1026 I2C_BOARD_INFO("tsl2563", 0x29),
1027 .platform_data = &rx51_tsl2563_platform_data,
1028 },
eeada9e8
AP		 1029#endif
1030#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1031 {
1032 I2C_BOARD_INFO("lp5523", 0x32),
1033 .platform_data = &rx51_lp5523_platform_data,
1034 },
70b5d737 1035#endif
d77711aa
PR		 1036 {
1037 I2C_BOARD_INFO("bq27200", 0x55),
1038 },
64d06691
JN		 1039 {
1040 I2C_BOARD_INFO("tpa6130a2", 0x60),
1041 .platform_data = &rx51_tpa6130a2_data,
1042 }
dabe929b
JN		 1043};
1044
3b511201
AP		 1045static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1046#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1047 {
1048 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1049 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP		 1050 },
1051#endif
1052};
1053
ffe7f95b
LL		 1054static int __init rx51_i2c_init(void)
1055{
f52eeee8 1056 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1057 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1058 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 1059 /* Only older boards use VMMC2 for internal MMC */
1060 rx51_vmmc2.num_consumer_supplies--;
1061 } else {
f52eeee8 1062 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1063 }
4cfcaef1 1064 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1065 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU		 1066 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1067 TWL_COMMON_REGULATOR_VDAC);
1068
1069 rx51_twldata.vdac->constraints.apply_uV = true;
1070 rx51_twldata.vdac->constraints.name = "VDAC";
1071
7d7e1eba 1072 omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
dabe929b
JN		 1073 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1074 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL		 1075#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1076 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1077 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1078#endif
3b511201
AP		 1079 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1080 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL		 1081 return 0;
1082}
1083
aa62e90f
JY		 1084#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1085 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1086
1087static struct mtd_partition onenand_partitions[] = {
1088 {
1089 .name = "bootloader",
1090 .offset = 0,
1091 .size = 0x20000,
1092 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1093 },
1094 {
1095 .name = "config",
1096 .offset = MTDPART_OFS_APPEND,
1097 .size = 0x60000,
1098 },
1099 {
1100 .name = "log",
1101 .offset = MTDPART_OFS_APPEND,
1102 .size = 0x40000,
1103 },
1104 {
1105 .name = "kernel",
1106 .offset = MTDPART_OFS_APPEND,
1107 .size = 0x200000,
1108 },
1109 {
1110 .name = "initfs",
1111 .offset = MTDPART_OFS_APPEND,
1112 .size = 0x200000,
1113 },
1114 {
1115 .name = "rootfs",
1116 .offset = MTDPART_OFS_APPEND,
1117 .size = MTDPART_SIZ_FULL,
1118 },
1119};
1120
5403187f
AK		 1121static struct omap_onenand_platform_data board_onenand_data[] = {
1122 {
1123 .cs = 0,
1124 .gpio_irq = 65,
1125 .parts = onenand_partitions,
1126 .nr_parts = ARRAY_SIZE(onenand_partitions),
1127 .flags = ONENAND_SYNC_READWRITE,
1128 }
aa62e90f 1129};
aa62e90f 1130#endif
ffe7f95b 1131
1a48e157
TL		 1132#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1133
1134static struct omap_smc91x_platform_data board_smc91x_data = {
1135 .cs = 1,
1136 .gpio_irq = 54,
1137 .gpio_pwrdwn = 86,
1138 .gpio_reset = 164,
1139 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1140};
1141
1142static void __init board_smc91x_init(void)
1143{
4896e394
TL		 1144 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1145 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1146 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL		 1147
1148 gpmc_smc91x_init(&board_smc91x_data);
1149}
1150
1151#else
1152
1153static inline void board_smc91x_init(void)
1154{
1155}
1156
1157#endif
1158
a24e61a9
KV		 1159static void rx51_wl1251_set_power(bool enable)
1160{
1161 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1162}
1163
bc593f5d
IG		 1164static struct gpio rx51_wl1251_gpios[] __initdata = {
1165 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1166 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1167};
1168
a24e61a9
KV		 1169static void __init rx51_init_wl1251(void)
1170{
1171 int irq, ret;
1172
bc593f5d
IG		 1173 ret = gpio_request_array(rx51_wl1251_gpios,
1174 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV		 1175 if (ret < 0)
1176 goto error;
1177
a24e61a9
KV		 1178 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1179 if (irq < 0)
1180 goto err_irq;
1181
1182 wl1251_pdata.set_power = rx51_wl1251_set_power;
1183 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1184
1185 return;
1186
1187err_irq:
1188 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1189 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV		 1190error:
1191 printk(KERN_ERR "wl1251 board initialisation failed\n");
1192 wl1251_pdata.set_power = NULL;
1193
1194 /*
1195 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1196 * set_power is null, and wl1251_probe() will fail.
1197 */
1198}
1199
3dad5356
AK		 1200static struct tsc2005_platform_data tsc2005_pdata = {
1201 .ts_pressure_max = 2048,
1202 .ts_pressure_fudge = 2,
1203 .ts_x_max = 4096,
1204 .ts_x_fudge = 4,
1205 .ts_y_max = 4096,
1206 .ts_y_fudge = 7,
1207 .ts_x_plate_ohm = 280,
1208 .esd_timeout_ms = 8000,
1209};
1210
d4860ebe
VZ		 1211static struct gpio rx51_tsc2005_gpios[] __initdata = {
1212 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1213 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1214};
1215
3dad5356
AK		 1216static void rx51_tsc2005_set_reset(bool enable)
1217{
1218 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1219}
1220
1221static void __init rx51_init_tsc2005(void)
1222{
1223 int r;
1224
d4860ebe
VZ		 1225 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1226 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1227
d4860ebe
VZ		 1228 r = gpio_request_array(rx51_tsc2005_gpios,
1229 ARRAY_SIZE(rx51_tsc2005_gpios));
1230 if (r < 0) {
1231 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1232 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1233 return;
3dad5356 1234 }
d4860ebe
VZ		 1235
1236 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL		 1237 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1238 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK		 1239}
1240
322c183c
TK		 1241#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
1242static struct lirc_rx51_platform_data rx51_lirc_data = {
1243 .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
1244 .pwm_timer = 9, /* Use GPT 9 for CIR */
1245};
1246
1247static struct platform_device rx51_lirc_device = {
1248 .name = "lirc_rx51",
1249 .id = -1,
1250 .dev = {
1251 .platform_data = &rx51_lirc_data,
1252 },
1253};
1254
1255static void __init rx51_init_lirc(void)
1256{
1257 platform_device_register(&rx51_lirc_device);
1258}
1259#else
1260static void __init rx51_init_lirc(void)
1261{
1262}
1263#endif
1264
749a34b3
PR		 1265static struct platform_device madc_hwmon = {
1266 .name = "twl4030_madc_hwmon",
1267 .id = -1,
1268};
1269
1270static void __init rx51_init_twl4030_hwmon(void)
1271{
1272 platform_device_register(&madc_hwmon);
1273}
1274
ffe7f95b
LL		 1275void __init rx51_peripherals_init(void)
1276{
ffe7f95b 1277 rx51_i2c_init();
094fc559 1278 regulator_has_full_constraints();
5403187f 1279 gpmc_onenand_init(board_onenand_data);
1a48e157 1280 board_smc91x_init();
f014ee32 1281 rx51_add_gpio_keys();
a24e61a9 1282 rx51_init_wl1251();
3dad5356 1283 rx51_init_tsc2005();
589541c0 1284 rx51_init_si4713();
322c183c 1285 rx51_init_lirc();
a24e61a9
KV		 1286 spi_register_board_info(rx51_peripherals_spi_board_info,
1287 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC		 1288
1289 partition = omap_mux_get("core");
1290 if (partition)
3b972bf0 1291 omap_hsmmc_init(mmc);
112485e9 1292
10299e2e 1293 rx51_charger_init();
749a34b3 1294 rx51_init_twl4030_hwmon();
ffe7f95b
LL		 1295}
1296
Linux kernel - Deliverables
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