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ARM: OMAP: Remove unused old gpio-switch.h
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL		 21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
5e763d29 26#include <linux/mmc/host.h>
10299e2e 27#include <linux/power/isp1704_charger.h>
9f97da78 28#include <asm/system_info.h>
ffe7f95b 29
ce491cf8 30#include <plat/mcspi.h>
4e65331c 31#include "common.h"
ce491cf8
TL		 32#include <plat/dma.h>
33#include <plat/gpmc.h>
ce491cf8
TL		 34#include <plat/onenand.h>
35#include <plat/gpmc-smc91x.h>
ffe7f95b 36
04aeae77
MK		 37#include <mach/board-rx51.h>
38
87581fd4 39#include <sound/tlv320aic3x.h>
64d06691 40#include <sound/tpa6130a2-plat.h>
589541c0
JN		 41#include <media/radio-si4713.h>
42#include <media/si4713.h>
eeada9e8 43#include <linux/leds-lp5523.h>
87581fd4 44
70b5d737 45#include <../drivers/staging/iio/light/tsl2563.h>
3b511201 46#include <linux/lis3lv02d.h>
70b5d737 47
4896e394 48#include "mux.h"
d02a900b 49#include "hsmmc.h"
fbd8071c 50#include "common-board-devices.h"
ffe7f95b 51
f52eeee8
AH		 52#define SYSTEM_REV_B_USES_VAUX3 0x1699
53#define SYSTEM_REV_S_USES_VAUX3 0x8
54
a24e61a9
KV		 55#define RX51_WL1251_POWER_GPIO 87
56#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN		 57#define RX51_FMTX_RESET_GPIO 163
58#define RX51_FMTX_IRQ 53
eeada9e8 59#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 60
10299e2e
KJ		 61#define RX51_USB_TRANSCEIVER_RST_GPIO 67
62
3dad5356
AK		 63#define RX51_TSC2005_RESET_GPIO 104
64#define RX51_TSC2005_IRQ_GPIO 100
65
3b511201
AP		 66#define LIS302_IRQ1_GPIO 181
67#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
68
a24e61a9
KV		 69/* list all spi devices here */
70enum {
71 RX51_SPI_WL1251,
03e11104 72 RX51_SPI_MIPID, /* LCD panel */
6996e7ff 73 RX51_SPI_TSC2005, /* Touch Controller */
a24e61a9
KV		 74};
75
76static struct wl12xx_platform_data wl1251_pdata;
3dad5356 77static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 78
3b511201
AP		 79#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
80static int lis302_setup(void)
81{
82 int err;
83 int irq1 = LIS302_IRQ1_GPIO;
84 int irq2 = LIS302_IRQ2_GPIO;
85
86 /* gpio for interrupt pin 1 */
87 err = gpio_request(irq1, "lis3lv02dl_irq1");
88 if (err) {
89 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
90 goto out;
91 }
92
93 /* gpio for interrupt pin 2 */
94 err = gpio_request(irq2, "lis3lv02dl_irq2");
95 if (err) {
96 gpio_free(irq1);
97 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
98 goto out;
99 }
100
101 gpio_direction_input(irq1);
102 gpio_direction_input(irq2);
103
104out:
105 return err;
106}
107
108static int lis302_release(void)
109{
110 gpio_free(LIS302_IRQ1_GPIO);
111 gpio_free(LIS302_IRQ2_GPIO);
112
113 return 0;
114}
115
116static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
117 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
118 LIS3_CLICK_SINGLE_Z,
119 /* Limits are 0.5g * value */
120 .click_thresh_x = 8,
121 .click_thresh_y = 8,
122 .click_thresh_z = 10,
123 /* Click must be longer than time limit */
124 .click_time_limit = 9,
125 /* Kind of debounce filter */
126 .click_latency = 50,
127
128 /* Limits for all axis. millig-value / 18 to get HW values */
129 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
130 .wakeup_thresh = 800 / 18,
131 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
132 .wakeup_thresh2 = 900 / 18,
133
134 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
135
136 /* Interrupt line 2 for click detection, line 1 for thresholds */
137 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
138
139 .axis_x = LIS3_DEV_X,
140 .axis_y = LIS3_INV_DEV_Y,
141 .axis_z = LIS3_INV_DEV_Z,
142 .setup_resources = lis302_setup,
143 .release_resources = lis302_release,
144 .st_min_limits = {-32, 3, 3},
145 .st_max_limits = {-3, 32, 32},
3b511201
AP		 146};
147#endif
148
70b5d737
MN		 149#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
150static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
151 .cover_comp_gain = 16,
152};
153#endif
154
eeada9e8
AP		 155#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
156static struct lp5523_led_config rx51_lp5523_led_config[] = {
157 {
158 .chan_nr = 0,
159 .led_current = 50,
160 }, {
161 .chan_nr = 1,
162 .led_current = 50,
163 }, {
164 .chan_nr = 2,
165 .led_current = 50,
166 }, {
167 .chan_nr = 3,
168 .led_current = 50,
169 }, {
170 .chan_nr = 4,
171 .led_current = 50,
172 }, {
173 .chan_nr = 5,
174 .led_current = 50,
175 }, {
176 .chan_nr = 6,
177 .led_current = 50,
178 }, {
179 .chan_nr = 7,
180 .led_current = 50,
181 }, {
182 .chan_nr = 8,
183 .led_current = 50,
184 }
185};
186
187static int rx51_lp5523_setup(void)
188{
189 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
190 "lp5523_enable");
191}
192
193static void rx51_lp5523_release(void)
194{
195 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
196}
197
198static void rx51_lp5523_enable(bool state)
199{
200 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
201}
202
203static struct lp5523_platform_data rx51_lp5523_platform_data = {
204 .led_config = rx51_lp5523_led_config,
205 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
206 .clock_mode = LP5523_CLOCK_AUTO,
207 .setup_resources = rx51_lp5523_setup,
208 .release_resources = rx51_lp5523_release,
209 .enable = rx51_lp5523_enable,
210};
211#endif
212
a24e61a9
KV		 213static struct omap2_mcspi_device_config wl1251_mcspi_config = {
214 .turbo_mode = 0,
a24e61a9
KV		 215};
216
03e11104
RQ		 217static struct omap2_mcspi_device_config mipid_mcspi_config = {
218 .turbo_mode = 0,
03e11104
RQ		 219};
220
6996e7ff
RQ		 221static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
222 .turbo_mode = 0,
6996e7ff
RQ		 223};
224
a24e61a9
KV		 225static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
226 [RX51_SPI_WL1251] = {
227 .modalias = "wl1251",
228 .bus_num = 4,
229 .chip_select = 0,
230 .max_speed_hz = 48000000,
860fc976 231 .mode = SPI_MODE_3,
a24e61a9
KV		 232 .controller_data = &wl1251_mcspi_config,
233 .platform_data = &wl1251_pdata,
234 },
03e11104
RQ		 235 [RX51_SPI_MIPID] = {
236 .modalias = "acx565akm",
237 .bus_num = 1,
238 .chip_select = 2,
239 .max_speed_hz = 6000000,
240 .controller_data = &mipid_mcspi_config,
241 },
6996e7ff
RQ		 242 [RX51_SPI_TSC2005] = {
243 .modalias = "tsc2005",
244 .bus_num = 1,
245 .chip_select = 0,
6996e7ff
RQ		 246 .max_speed_hz = 6000000,
247 .controller_data = &tsc2005_mcspi_config,
3dad5356 248 .platform_data = &tsc2005_pdata,
6996e7ff 249 },
a24e61a9
KV		 250};
251
10299e2e
KJ		 252static void rx51_charger_set_power(bool on)
253{
254 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
255}
256
257static struct isp1704_charger_data rx51_charger_data = {
258 .set_power = rx51_charger_set_power,
259};
260
fd0964c5 261static struct platform_device rx51_charger_device = {
10299e2e
KJ		 262 .name = "isp1704_charger",
263 .dev = {
264 .platform_data = &rx51_charger_data,
265 },
fd0964c5
HK		 266};
267
10299e2e
KJ		 268static void __init rx51_charger_init(void)
269{
270 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 271 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e
KJ		 272
273 platform_device_register(&rx51_charger_device);
274}
275
f014ee32
JN		 276#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
277
278#define RX51_GPIO_CAMERA_LENS_COVER 110
279#define RX51_GPIO_CAMERA_FOCUS 68
280#define RX51_GPIO_CAMERA_CAPTURE 69
281#define RX51_GPIO_KEYPAD_SLIDE 71
282#define RX51_GPIO_LOCK_BUTTON 113
283#define RX51_GPIO_PROXIMITY 89
284
285#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
286
287static struct gpio_keys_button rx51_gpio_keys[] = {
288 {
289 .desc = "Camera Lens Cover",
290 .type = EV_SW,
291 .code = SW_CAMERA_LENS_COVER,
292 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
293 .active_low = 1,
294 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
295 }, {
296 .desc = "Camera Focus",
297 .type = EV_KEY,
298 .code = KEY_CAMERA_FOCUS,
299 .gpio = RX51_GPIO_CAMERA_FOCUS,
300 .active_low = 1,
301 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
302 }, {
303 .desc = "Camera Capture",
304 .type = EV_KEY,
305 .code = KEY_CAMERA,
306 .gpio = RX51_GPIO_CAMERA_CAPTURE,
307 .active_low = 1,
308 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
309 }, {
310 .desc = "Lock Button",
311 .type = EV_KEY,
312 .code = KEY_SCREENLOCK,
313 .gpio = RX51_GPIO_LOCK_BUTTON,
314 .active_low = 1,
315 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
316 }, {
317 .desc = "Keypad Slide",
318 .type = EV_SW,
319 .code = SW_KEYPAD_SLIDE,
320 .gpio = RX51_GPIO_KEYPAD_SLIDE,
321 .active_low = 1,
322 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
323 }, {
324 .desc = "Proximity Sensor",
325 .type = EV_SW,
326 .code = SW_FRONT_PROXIMITY,
327 .gpio = RX51_GPIO_PROXIMITY,
328 .active_low = 0,
329 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
330 }
331};
332
333static struct gpio_keys_platform_data rx51_gpio_keys_data = {
334 .buttons = rx51_gpio_keys,
335 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
336};
337
338static struct platform_device rx51_gpio_keys_device = {
339 .name = "gpio-keys",
340 .id = -1,
341 .dev = {
342 .platform_data = &rx51_gpio_keys_data,
343 },
344};
345
346static void __init rx51_add_gpio_keys(void)
347{
348 platform_device_register(&rx51_gpio_keys_device);
349}
350#else
351static void __init rx51_add_gpio_keys(void)
352{
353}
354#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
355
bead4375 356static uint32_t board_keymap[] = {
3fea6026
DT		 357 /*
358 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
359 * connected to the ground" matrix state.
360 */
ffe7f95b 361 KEY(0, 0, KEY_Q),
acf442dc
AK		 362 KEY(0, 1, KEY_O),
363 KEY(0, 2, KEY_P),
364 KEY(0, 3, KEY_COMMA),
365 KEY(0, 4, KEY_BACKSPACE),
366 KEY(0, 6, KEY_A),
367 KEY(0, 7, KEY_S),
3fea6026 368
acf442dc 369 KEY(1, 0, KEY_W),
ffe7f95b 370 KEY(1, 1, KEY_D),
acf442dc
AK		 371 KEY(1, 2, KEY_F),
372 KEY(1, 3, KEY_G),
373 KEY(1, 4, KEY_H),
374 KEY(1, 5, KEY_J),
375 KEY(1, 6, KEY_K),
376 KEY(1, 7, KEY_L),
3fea6026 377
acf442dc
AK		 378 KEY(2, 0, KEY_E),
379 KEY(2, 1, KEY_DOT),
ffe7f95b 380 KEY(2, 2, KEY_UP),
acf442dc
AK		 381 KEY(2, 3, KEY_ENTER),
382 KEY(2, 5, KEY_Z),
383 KEY(2, 6, KEY_X),
384 KEY(2, 7, KEY_C),
3fea6026
DT		 385 KEY(2, 8, KEY_F9),
386
acf442dc
AK		 387 KEY(3, 0, KEY_R),
388 KEY(3, 1, KEY_V),
389 KEY(3, 2, KEY_B),
ffe7f95b 390 KEY(3, 3, KEY_N),
acf442dc
AK		 391 KEY(3, 4, KEY_M),
392 KEY(3, 5, KEY_SPACE),
393 KEY(3, 6, KEY_SPACE),
394 KEY(3, 7, KEY_LEFT),
3fea6026 395
acf442dc
AK		 396 KEY(4, 0, KEY_T),
397 KEY(4, 1, KEY_DOWN),
398 KEY(4, 2, KEY_RIGHT),
ffe7f95b 399 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 400 KEY(4, 5, KEY_RIGHTALT),
401 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 402 KEY(4, 8, KEY_F10),
3fea6026 403
acf442dc 404 KEY(5, 0, KEY_Y),
2e65a207 405 KEY(5, 8, KEY_F11),
3fea6026 406
acf442dc 407 KEY(6, 0, KEY_U),
3fea6026 408
acf442dc
AK		 409 KEY(7, 0, KEY_I),
410 KEY(7, 1, KEY_F7),
411 KEY(7, 2, KEY_F8),
ffe7f95b
LL		 412};
413
4f543332
TL		 414static struct matrix_keymap_data board_map_data = {
415 .keymap = board_keymap,
416 .keymap_size = ARRAY_SIZE(board_keymap),
417};
418
ffe7f95b 419static struct twl4030_keypad_data rx51_kp_data = {
4f543332 420 .keymap_data = &board_map_data,
ffe7f95b
LL		 421 .rows = 8,
422 .cols = 8,
ffe7f95b
LL		 423 .rep = 1,
424};
425
ce6f0016
AH		 426/* Enable input logic and pull all lines up when eMMC is on. */
427static struct omap_board_mux rx51_mmc2_on_mux[] = {
428 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
429 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
430 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
431 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
432 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
433 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
434 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
435 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
436 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
437 { .reg_offset = OMAP_MUX_TERMINATOR },
438};
439
440/* Disable input logic and pull all lines down when eMMC is off. */
441static struct omap_board_mux rx51_mmc2_off_mux[] = {
442 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
443 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
444 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
445 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
446 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
447 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
448 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
449 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
450 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
451 { .reg_offset = OMAP_MUX_TERMINATOR },
452};
453
112485e9
BC		 454static struct omap_mux_partition *partition;
455
ce6f0016
AH		 456/*
457 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
458 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
459 */
460static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
461{
462 if (power_on)
112485e9 463 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 464 else
112485e9 465 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH		 466}
467
68ff0423 468static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 469 {
470 .name = "external",
471 .mmc = 1,
3a63833e 472 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL		 473 .cover_only = true,
474 .gpio_cd = 160,
475 .gpio_wp = -EINVAL,
5e763d29 476 .power_saving = true,
ffe7f95b
LL		 477 },
478 {
479 .name = "internal",
480 .mmc = 2,
3a63833e
SG		 481 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
482 /* See also rx51_mmc2_remux */
ffe7f95b
LL		 483 .gpio_cd = -EINVAL,
484 .gpio_wp = -EINVAL,
5e763d29
AH		 485 .nonremovable = true,
486 .power_saving = true,
ce6f0016 487 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 488 },
489 {} /* Terminator */
490};
491
786b01a8
OD		 492static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
493 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
494};
ffe7f95b 495
664a41b8
LT		 496static struct regulator_consumer_supply rx51_vaux2_supply[] = {
497 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
498};
75ccf268 499
786b01a8
OD		 500static struct regulator_consumer_supply rx51_vaux3_supply[] = {
501 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
502};
ffe7f95b 503
786b01a8
OD		 504static struct regulator_consumer_supply rx51_vsim_supply[] = {
505 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
506};
ffe7f95b 507
4cfcaef1
JN		 508static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
509 /* tlv320aic3x analog supplies */
5c7d9bbe
JN		 510 REGULATOR_SUPPLY("AVDD", "2-0018"),
511 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN		 512 REGULATOR_SUPPLY("AVDD", "2-0019"),
513 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN		 514 /* tpa6130a2 */
515 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 516 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 517 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN		 518};
519
520static struct regulator_consumer_supply rx51_vio_supplies[] = {
521 /* tlv320aic3x digital supplies */
5c7d9bbe
JN		 522 REGULATOR_SUPPLY("IOVDD", "2-0018"),
523 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN		 524 REGULATOR_SUPPLY("IOVDD", "2-0019"),
525 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN		 526 /* Si4713 IO supply */
527 REGULATOR_SUPPLY("vio", "2-0063"),
4cfcaef1
JN		 528};
529
0581b52e 530static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 531 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
589541c0
JN		 532 /* Si4713 supply */
533 REGULATOR_SUPPLY("vdd", "2-0063"),
0581b52e
RQ		 534};
535
ffe7f95b
LL		 536static struct regulator_init_data rx51_vaux1 = {
537 .constraints = {
538 .name = "V28",
539 .min_uV = 2800000,
540 .max_uV = 2800000,
000d534e 541 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL		 542 .valid_modes_mask = REGULATOR_MODE_NORMAL
543 | REGULATOR_MODE_STANDBY,
544 .valid_ops_mask = REGULATOR_CHANGE_MODE
545 | REGULATOR_CHANGE_STATUS,
546 },
0581b52e
RQ		 547 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
548 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 549};
550
551static struct regulator_init_data rx51_vaux2 = {
552 .constraints = {
553 .name = "VCSI",
554 .min_uV = 1800000,
555 .max_uV = 1800000,
556 .valid_modes_mask = REGULATOR_MODE_NORMAL
557 | REGULATOR_MODE_STANDBY,
558 .valid_ops_mask = REGULATOR_CHANGE_MODE
559 | REGULATOR_CHANGE_STATUS,
560 },
664a41b8
LT		 561 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
562 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL		 563};
564
565/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 566static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 567 .constraints = {
568 .name = "VCAM_DIG_18",
569 .min_uV = 1800000,
570 .max_uV = 1800000,
571 .apply_uV = true,
572 .valid_modes_mask = REGULATOR_MODE_NORMAL
573 | REGULATOR_MODE_STANDBY,
574 .valid_ops_mask = REGULATOR_CHANGE_MODE
575 | REGULATOR_CHANGE_STATUS,
576 },
577};
578
f52eeee8
AH		 579static struct regulator_init_data rx51_vaux3_mmc = {
580 .constraints = {
581 .name = "VMMC2_30",
582 .min_uV = 2800000,
583 .max_uV = 3000000,
584 .apply_uV = true,
585 .valid_modes_mask = REGULATOR_MODE_NORMAL
586 | REGULATOR_MODE_STANDBY,
587 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
588 | REGULATOR_CHANGE_MODE
589 | REGULATOR_CHANGE_STATUS,
590 },
786b01a8
OD		 591 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
592 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH		 593};
594
ffe7f95b
LL		 595static struct regulator_init_data rx51_vaux4 = {
596 .constraints = {
597 .name = "VCAM_ANA_28",
598 .min_uV = 2800000,
599 .max_uV = 2800000,
600 .apply_uV = true,
601 .valid_modes_mask = REGULATOR_MODE_NORMAL
602 | REGULATOR_MODE_STANDBY,
603 .valid_ops_mask = REGULATOR_CHANGE_MODE
604 | REGULATOR_CHANGE_STATUS,
605 },
606};
607
608static struct regulator_init_data rx51_vmmc1 = {
609 .constraints = {
610 .min_uV = 1850000,
611 .max_uV = 3150000,
612 .valid_modes_mask = REGULATOR_MODE_NORMAL
613 | REGULATOR_MODE_STANDBY,
614 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
615 | REGULATOR_CHANGE_MODE
616 | REGULATOR_CHANGE_STATUS,
617 },
786b01a8
OD		 618 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
619 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL		 620};
621
622static struct regulator_init_data rx51_vmmc2 = {
623 .constraints = {
f2add1de
JN		 624 .name = "V28_A",
625 .min_uV = 2800000,
626 .max_uV = 3000000,
2827411e 627 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL		 628 .apply_uV = true,
629 .valid_modes_mask = REGULATOR_MODE_NORMAL
630 | REGULATOR_MODE_STANDBY,
631 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
632 | REGULATOR_CHANGE_MODE
633 | REGULATOR_CHANGE_STATUS,
634 },
4cfcaef1
JN		 635 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
636 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 637};
638
094fc559
KJ		 639static struct regulator_init_data rx51_vpll1 = {
640 .constraints = {
641 .name = "VPLL",
642 .min_uV = 1800000,
643 .max_uV = 1800000,
644 .apply_uV = true,
645 .always_on = true,
646 .valid_modes_mask = REGULATOR_MODE_NORMAL
647 | REGULATOR_MODE_STANDBY,
648 .valid_ops_mask = REGULATOR_CHANGE_MODE,
649 },
650};
651
652static struct regulator_init_data rx51_vpll2 = {
653 .constraints = {
654 .name = "VSDI_CSI",
655 .min_uV = 1800000,
656 .max_uV = 1800000,
657 .apply_uV = true,
658 .always_on = true,
659 .valid_modes_mask = REGULATOR_MODE_NORMAL
660 | REGULATOR_MODE_STANDBY,
661 .valid_ops_mask = REGULATOR_CHANGE_MODE,
662 },
663};
664
ffe7f95b
LL		 665static struct regulator_init_data rx51_vsim = {
666 .constraints = {
667 .name = "VMMC2_IO_18",
668 .min_uV = 1800000,
669 .max_uV = 1800000,
670 .apply_uV = true,
671 .valid_modes_mask = REGULATOR_MODE_NORMAL
672 | REGULATOR_MODE_STANDBY,
673 .valid_ops_mask = REGULATOR_CHANGE_MODE
674 | REGULATOR_CHANGE_STATUS,
675 },
786b01a8
OD		 676 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
677 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL		 678};
679
4cfcaef1
JN		 680static struct regulator_init_data rx51_vio = {
681 .constraints = {
682 .min_uV = 1800000,
683 .max_uV = 1800000,
684 .valid_modes_mask = REGULATOR_MODE_NORMAL
685 | REGULATOR_MODE_STANDBY,
686 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
687 | REGULATOR_CHANGE_MODE
688 | REGULATOR_CHANGE_STATUS,
689 },
690 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
691 .consumer_supplies = rx51_vio_supplies,
692};
693
094fc559
KJ		 694static struct regulator_init_data rx51_vintana1 = {
695 .constraints = {
696 .name = "VINTANA1",
697 .min_uV = 1500000,
698 .max_uV = 1500000,
699 .always_on = true,
700 .valid_modes_mask = REGULATOR_MODE_NORMAL
701 | REGULATOR_MODE_STANDBY,
702 .valid_ops_mask = REGULATOR_CHANGE_MODE,
703 },
704};
705
706static struct regulator_init_data rx51_vintana2 = {
707 .constraints = {
708 .name = "VINTANA2",
709 .min_uV = 2750000,
710 .max_uV = 2750000,
711 .apply_uV = true,
712 .always_on = true,
713 .valid_modes_mask = REGULATOR_MODE_NORMAL
714 | REGULATOR_MODE_STANDBY,
715 .valid_ops_mask = REGULATOR_CHANGE_MODE,
716 },
717};
718
719static struct regulator_init_data rx51_vintdig = {
720 .constraints = {
721 .name = "VINTDIG",
722 .min_uV = 1500000,
723 .max_uV = 1500000,
724 .always_on = true,
725 .valid_modes_mask = REGULATOR_MODE_NORMAL
726 | REGULATOR_MODE_STANDBY,
727 .valid_ops_mask = REGULATOR_CHANGE_MODE,
728 },
729};
730
589541c0
JN		 731static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
732 .gpio_reset = RX51_FMTX_RESET_GPIO,
733};
734
735static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
736 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
737 .platform_data = &rx51_si4713_i2c_data,
738};
739
740static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
741 .i2c_bus = 2,
742 .subdev_board_info = &rx51_si4713_board_info,
743};
744
07ad6ab3 745static struct platform_device rx51_si4713_dev = {
589541c0
JN		 746 .name = "radio-si4713",
747 .id = -1,
748 .dev = {
749 .platform_data = &rx51_si4713_data,
750 },
751};
752
753static __init void rx51_init_si4713(void)
754{
755 int err;
756
757 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
758 if (err) {
759 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
760 return;
761 }
762 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
763 platform_device_register(&rx51_si4713_dev);
764}
765
ffe7f95b
LL		 766static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
767{
768 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 769 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 770 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 771
ffe7f95b
LL		 772 return 0;
773}
774
775static struct twl4030_gpio_platform_data rx51_gpio_data = {
ffe7f95b
LL		 776 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
777 | BIT(4) | BIT(5)
778 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
779 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
780 | BIT(16) | BIT(17) ,
781 .setup = rx51_twlgpio_setup,
782};
783
9312fffb
AK		 784static struct twl4030_ins sleep_on_seq[] __initdata = {
785/*
3c684e84 786 * Turn off everything
9312fffb 787 */
3c684e84 788 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 789};
790
791static struct twl4030_script sleep_on_script __initdata = {
792 .script = sleep_on_seq,
793 .size = ARRAY_SIZE(sleep_on_seq),
794 .flags = TWL4030_SLEEP_SCRIPT,
795};
796
797static struct twl4030_ins wakeup_seq[] __initdata = {
798/*
3c684e84 799 * Reenable everything
9312fffb 800 */
3c684e84 801 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 802};
803
804static struct twl4030_script wakeup_script __initdata = {
805 .script = wakeup_seq,
806 .size = ARRAY_SIZE(wakeup_seq),
807 .flags = TWL4030_WAKEUP12_SCRIPT,
808};
809
810static struct twl4030_ins wakeup_p3_seq[] __initdata = {
811/*
3c684e84 812 * Reenable everything
9312fffb 813 */
3c684e84 814 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 815};
816
817static struct twl4030_script wakeup_p3_script __initdata = {
818 .script = wakeup_p3_seq,
819 .size = ARRAY_SIZE(wakeup_p3_seq),
820 .flags = TWL4030_WAKEUP3_SCRIPT,
821};
822
823static struct twl4030_ins wrst_seq[] __initdata = {
824/*
825 * Reset twl4030.
826 * Reset VDD1 regulator.
827 * Reset VDD2 regulator.
828 * Reset VPLL1 regulator.
829 * Enable sysclk output.
830 * Reenable twl4030.
831 */
832 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
833 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
834 0x13},
9312fffb
AK		 835 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
836 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
837 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
838 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 839 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 840 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
841};
842
843static struct twl4030_script wrst_script __initdata = {
844 .script = wrst_seq,
845 .size = ARRAY_SIZE(wrst_seq),
846 .flags = TWL4030_WRST_SCRIPT,
847};
848
849static struct twl4030_script *twl4030_scripts[] __initdata = {
850 /* wakeup12 script should be loaded before sleep script, otherwise a
851 board might hit retention before loading of wakeup script is
852 completed. This can cause boot failures depending on timing issues.
853 */
854 &wakeup_script,
855 &sleep_on_script,
856 &wakeup_p3_script,
857 &wrst_script,
858};
859
860static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 861 { .resource = RES_VDD1, .devgroup = -1,
862 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
863 .remap_sleep = RES_STATE_OFF
864 },
865 { .resource = RES_VDD2, .devgroup = -1,
866 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
867 .remap_sleep = RES_STATE_OFF
868 },
869 { .resource = RES_VPLL1, .devgroup = -1,
870 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
871 .remap_sleep = RES_STATE_OFF
872 },
873 { .resource = RES_VPLL2, .devgroup = -1,
874 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
875 },
876 { .resource = RES_VAUX1, .devgroup = -1,
877 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
878 },
879 { .resource = RES_VAUX2, .devgroup = -1,
880 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
881 },
882 { .resource = RES_VAUX3, .devgroup = -1,
883 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
884 },
885 { .resource = RES_VAUX4, .devgroup = -1,
886 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
887 },
888 { .resource = RES_VMMC1, .devgroup = -1,
889 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
890 },
891 { .resource = RES_VMMC2, .devgroup = -1,
892 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
893 },
894 { .resource = RES_VDAC, .devgroup = -1,
895 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
896 },
897 { .resource = RES_VSIM, .devgroup = -1,
898 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
899 },
900 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
901 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
902 },
903 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
904 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
905 },
906 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
907 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
908 },
909 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
910 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
911 },
912 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
913 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
914 },
915 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
916 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
917 },
918 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
919 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
920 },
921 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
922 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
923 },
924 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
925 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
926 },
927 { .resource = RES_32KCLKOUT, .devgroup = -1,
928 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
929 },
930 { .resource = RES_RESET, .devgroup = -1,
931 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
932 },
d7ac829f 933 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK		 934 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
935 },
9312fffb
AK		 936 { 0, 0},
937};
938
939static struct twl4030_power_data rx51_t2scripts_data __initdata = {
940 .scripts = twl4030_scripts,
941 .num = ARRAY_SIZE(twl4030_scripts),
942 .resource_config = twl4030_rconfig,
943};
944
8c3d4534 945static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK		 946 .coexist = 0,
947};
948
8c3d4534 949static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK		 950 .audio_mclk = 26000000,
951 .vibra = &rx51_vibra_data,
952};
9312fffb 953
9312fffb 954static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 955 /* platform_data for children goes here */
956 .gpio = &rx51_gpio_data,
957 .keypad = &rx51_kp_data,
9312fffb 958 .power = &rx51_t2scripts_data,
4ae6df5e 959 .audio = &rx51_audio_data,
ffe7f95b
LL		 960
961 .vaux1 = &rx51_vaux1,
962 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 963 .vaux4 = &rx51_vaux4,
964 .vmmc1 = &rx51_vmmc1,
094fc559
KJ		 965 .vpll1 = &rx51_vpll1,
966 .vpll2 = &rx51_vpll2,
ffe7f95b 967 .vsim = &rx51_vsim,
094fc559
KJ		 968 .vintana1 = &rx51_vintana1,
969 .vintana2 = &rx51_vintana2,
970 .vintdig = &rx51_vintdig,
4cfcaef1 971 .vio = &rx51_vio,
ffe7f95b
LL		 972};
973
f0c61d3d 974static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN		 975 .power_gpio = 98,
976};
977
f0fba2ad
LG		 978/* Audio setup data */
979static struct aic3x_setup_data rx51_aic34_setup = {
980 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
981 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
982};
983
e4862f2f 984static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG		 985 .setup = &rx51_aic34_setup,
986 .gpio_reset = 60,
987};
988
caeeb4aa
JN		 989static struct aic3x_pdata rx51_aic3x_data2 = {
990 .gpio_reset = 60,
991};
992
dabe929b
JN		 993static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
994 {
995 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 996 .platform_data = &rx51_aic3x_data,
dabe929b 997 },
caeeb4aa
JN		 998 {
999 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1000 .platform_data = &rx51_aic3x_data2,
1001 },
70b5d737
MN		 1002#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1003 {
1004 I2C_BOARD_INFO("tsl2563", 0x29),
1005 .platform_data = &rx51_tsl2563_platform_data,
1006 },
eeada9e8
AP		 1007#endif
1008#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1009 {
1010 I2C_BOARD_INFO("lp5523", 0x32),
1011 .platform_data = &rx51_lp5523_platform_data,
1012 },
70b5d737 1013#endif
d77711aa
PR		 1014 {
1015 I2C_BOARD_INFO("bq27200", 0x55),
1016 },
64d06691
JN		 1017 {
1018 I2C_BOARD_INFO("tpa6130a2", 0x60),
1019 .platform_data = &rx51_tpa6130a2_data,
1020 }
dabe929b
JN		 1021};
1022
3b511201
AP		 1023static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1024#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1025 {
1026 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1027 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP		 1028 },
1029#endif
1030};
1031
ffe7f95b
LL		 1032static int __init rx51_i2c_init(void)
1033{
f52eeee8 1034 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1035 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1036 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 1037 /* Only older boards use VMMC2 for internal MMC */
1038 rx51_vmmc2.num_consumer_supplies--;
1039 } else {
f52eeee8 1040 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1041 }
4cfcaef1 1042 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1043 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU		 1044 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1045 TWL_COMMON_REGULATOR_VDAC);
1046
1047 rx51_twldata.vdac->constraints.apply_uV = true;
1048 rx51_twldata.vdac->constraints.name = "VDAC";
1049
7d7e1eba 1050 omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
dabe929b
JN		 1051 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1052 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL		 1053#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1054 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1055 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1056#endif
3b511201
AP		 1057 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1058 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL		 1059 return 0;
1060}
1061
aa62e90f
JY		 1062#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1063 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1064
1065static struct mtd_partition onenand_partitions[] = {
1066 {
1067 .name = "bootloader",
1068 .offset = 0,
1069 .size = 0x20000,
1070 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1071 },
1072 {
1073 .name = "config",
1074 .offset = MTDPART_OFS_APPEND,
1075 .size = 0x60000,
1076 },
1077 {
1078 .name = "log",
1079 .offset = MTDPART_OFS_APPEND,
1080 .size = 0x40000,
1081 },
1082 {
1083 .name = "kernel",
1084 .offset = MTDPART_OFS_APPEND,
1085 .size = 0x200000,
1086 },
1087 {
1088 .name = "initfs",
1089 .offset = MTDPART_OFS_APPEND,
1090 .size = 0x200000,
1091 },
1092 {
1093 .name = "rootfs",
1094 .offset = MTDPART_OFS_APPEND,
1095 .size = MTDPART_SIZ_FULL,
1096 },
1097};
1098
5403187f
AK		 1099static struct omap_onenand_platform_data board_onenand_data[] = {
1100 {
1101 .cs = 0,
1102 .gpio_irq = 65,
1103 .parts = onenand_partitions,
1104 .nr_parts = ARRAY_SIZE(onenand_partitions),
1105 .flags = ONENAND_SYNC_READWRITE,
1106 }
aa62e90f 1107};
aa62e90f 1108#endif
ffe7f95b 1109
1a48e157
TL		 1110#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1111
1112static struct omap_smc91x_platform_data board_smc91x_data = {
1113 .cs = 1,
1114 .gpio_irq = 54,
1115 .gpio_pwrdwn = 86,
1116 .gpio_reset = 164,
1117 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1118};
1119
1120static void __init board_smc91x_init(void)
1121{
4896e394
TL		 1122 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1123 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1124 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL		 1125
1126 gpmc_smc91x_init(&board_smc91x_data);
1127}
1128
1129#else
1130
1131static inline void board_smc91x_init(void)
1132{
1133}
1134
1135#endif
1136
a24e61a9
KV		 1137static void rx51_wl1251_set_power(bool enable)
1138{
1139 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1140}
1141
bc593f5d
IG		 1142static struct gpio rx51_wl1251_gpios[] __initdata = {
1143 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1144 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1145};
1146
a24e61a9
KV		 1147static void __init rx51_init_wl1251(void)
1148{
1149 int irq, ret;
1150
bc593f5d
IG		 1151 ret = gpio_request_array(rx51_wl1251_gpios,
1152 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV		 1153 if (ret < 0)
1154 goto error;
1155
a24e61a9
KV		 1156 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1157 if (irq < 0)
1158 goto err_irq;
1159
1160 wl1251_pdata.set_power = rx51_wl1251_set_power;
1161 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1162
1163 return;
1164
1165err_irq:
1166 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1167 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV		 1168error:
1169 printk(KERN_ERR "wl1251 board initialisation failed\n");
1170 wl1251_pdata.set_power = NULL;
1171
1172 /*
1173 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1174 * set_power is null, and wl1251_probe() will fail.
1175 */
1176}
1177
3dad5356
AK		 1178static struct tsc2005_platform_data tsc2005_pdata = {
1179 .ts_pressure_max = 2048,
1180 .ts_pressure_fudge = 2,
1181 .ts_x_max = 4096,
1182 .ts_x_fudge = 4,
1183 .ts_y_max = 4096,
1184 .ts_y_fudge = 7,
1185 .ts_x_plate_ohm = 280,
1186 .esd_timeout_ms = 8000,
1187};
1188
d4860ebe
VZ		 1189static struct gpio rx51_tsc2005_gpios[] __initdata = {
1190 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1191 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1192};
1193
3dad5356
AK		 1194static void rx51_tsc2005_set_reset(bool enable)
1195{
1196 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1197}
1198
1199static void __init rx51_init_tsc2005(void)
1200{
1201 int r;
1202
d4860ebe
VZ		 1203 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1204 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1205
d4860ebe
VZ		 1206 r = gpio_request_array(rx51_tsc2005_gpios,
1207 ARRAY_SIZE(rx51_tsc2005_gpios));
1208 if (r < 0) {
1209 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1210 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1211 return;
3dad5356 1212 }
d4860ebe
VZ		 1213
1214 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL		 1215 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1216 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK		 1217}
1218
ffe7f95b
LL		 1219void __init rx51_peripherals_init(void)
1220{
ffe7f95b 1221 rx51_i2c_init();
094fc559 1222 regulator_has_full_constraints();
5403187f 1223 gpmc_onenand_init(board_onenand_data);
1a48e157 1224 board_smc91x_init();
f014ee32 1225 rx51_add_gpio_keys();
a24e61a9 1226 rx51_init_wl1251();
3dad5356 1227 rx51_init_tsc2005();
589541c0 1228 rx51_init_si4713();
a24e61a9
KV		 1229 spi_register_board_info(rx51_peripherals_spi_board_info,
1230 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC		 1231
1232 partition = omap_mux_get("core");
1233 if (partition)
3b972bf0 1234 omap_hsmmc_init(mmc);
112485e9 1235
10299e2e 1236 rx51_charger_init();
ffe7f95b
LL		 1237}
1238
Linux kernel - Deliverables
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