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Merge branch 'msm-mmc_sdcc' of git://codeaurora.org/quic/kernel/dwalker/linux-msm
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
a24e61a9 17#include <linux/spi/wl12xx.h>
ffe7f95b 18#include <linux/i2c.h>
ebeb53e1 19#include <linux/i2c/twl.h>
ffe7f95b
LL		 20#include <linux/clk.h>
21#include <linux/delay.h>
22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
f014ee32 24#include <linux/gpio_keys.h>
5e763d29 25#include <linux/mmc/host.h>
ffe7f95b 26
ce491cf8
TL		 27#include <plat/mcspi.h>
28#include <plat/mux.h>
29#include <plat/board.h>
30#include <plat/common.h>
31#include <plat/dma.h>
32#include <plat/gpmc.h>
ce491cf8
TL		 33#include <plat/onenand.h>
34#include <plat/gpmc-smc91x.h>
ffe7f95b 35
4896e394 36#include "mux.h"
d02a900b 37#include "hsmmc.h"
ffe7f95b 38
f52eeee8
AH		 39#define SYSTEM_REV_B_USES_VAUX3 0x1699
40#define SYSTEM_REV_S_USES_VAUX3 0x8
41
a24e61a9
KV		 42#define RX51_WL1251_POWER_GPIO 87
43#define RX51_WL1251_IRQ_GPIO 42
44
45/* list all spi devices here */
46enum {
47 RX51_SPI_WL1251,
48};
49
50static struct wl12xx_platform_data wl1251_pdata;
51
52static struct omap2_mcspi_device_config wl1251_mcspi_config = {
53 .turbo_mode = 0,
54 .single_channel = 1,
55};
56
57static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
58 [RX51_SPI_WL1251] = {
59 .modalias = "wl1251",
60 .bus_num = 4,
61 .chip_select = 0,
62 .max_speed_hz = 48000000,
860fc976 63 .mode = SPI_MODE_3,
a24e61a9
KV		 64 .controller_data = &wl1251_mcspi_config,
65 .platform_data = &wl1251_pdata,
66 },
67};
68
f014ee32
JN		 69#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
70
71#define RX51_GPIO_CAMERA_LENS_COVER 110
72#define RX51_GPIO_CAMERA_FOCUS 68
73#define RX51_GPIO_CAMERA_CAPTURE 69
74#define RX51_GPIO_KEYPAD_SLIDE 71
75#define RX51_GPIO_LOCK_BUTTON 113
76#define RX51_GPIO_PROXIMITY 89
77
78#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
79
80static struct gpio_keys_button rx51_gpio_keys[] = {
81 {
82 .desc = "Camera Lens Cover",
83 .type = EV_SW,
84 .code = SW_CAMERA_LENS_COVER,
85 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
86 .active_low = 1,
87 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
88 }, {
89 .desc = "Camera Focus",
90 .type = EV_KEY,
91 .code = KEY_CAMERA_FOCUS,
92 .gpio = RX51_GPIO_CAMERA_FOCUS,
93 .active_low = 1,
94 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
95 }, {
96 .desc = "Camera Capture",
97 .type = EV_KEY,
98 .code = KEY_CAMERA,
99 .gpio = RX51_GPIO_CAMERA_CAPTURE,
100 .active_low = 1,
101 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
102 }, {
103 .desc = "Lock Button",
104 .type = EV_KEY,
105 .code = KEY_SCREENLOCK,
106 .gpio = RX51_GPIO_LOCK_BUTTON,
107 .active_low = 1,
108 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
109 }, {
110 .desc = "Keypad Slide",
111 .type = EV_SW,
112 .code = SW_KEYPAD_SLIDE,
113 .gpio = RX51_GPIO_KEYPAD_SLIDE,
114 .active_low = 1,
115 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
116 }, {
117 .desc = "Proximity Sensor",
118 .type = EV_SW,
119 .code = SW_FRONT_PROXIMITY,
120 .gpio = RX51_GPIO_PROXIMITY,
121 .active_low = 0,
122 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
123 }
124};
125
126static struct gpio_keys_platform_data rx51_gpio_keys_data = {
127 .buttons = rx51_gpio_keys,
128 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
129};
130
131static struct platform_device rx51_gpio_keys_device = {
132 .name = "gpio-keys",
133 .id = -1,
134 .dev = {
135 .platform_data = &rx51_gpio_keys_data,
136 },
137};
138
139static void __init rx51_add_gpio_keys(void)
140{
141 platform_device_register(&rx51_gpio_keys_device);
142}
143#else
144static void __init rx51_add_gpio_keys(void)
145{
146}
147#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
148
4f543332 149static int board_keymap[] = {
ffe7f95b 150 KEY(0, 0, KEY_Q),
acf442dc
AK		 151 KEY(0, 1, KEY_O),
152 KEY(0, 2, KEY_P),
153 KEY(0, 3, KEY_COMMA),
154 KEY(0, 4, KEY_BACKSPACE),
155 KEY(0, 6, KEY_A),
156 KEY(0, 7, KEY_S),
157 KEY(1, 0, KEY_W),
ffe7f95b 158 KEY(1, 1, KEY_D),
acf442dc
AK		 159 KEY(1, 2, KEY_F),
160 KEY(1, 3, KEY_G),
161 KEY(1, 4, KEY_H),
162 KEY(1, 5, KEY_J),
163 KEY(1, 6, KEY_K),
164 KEY(1, 7, KEY_L),
165 KEY(2, 0, KEY_E),
166 KEY(2, 1, KEY_DOT),
ffe7f95b 167 KEY(2, 2, KEY_UP),
acf442dc
AK		 168 KEY(2, 3, KEY_ENTER),
169 KEY(2, 5, KEY_Z),
170 KEY(2, 6, KEY_X),
171 KEY(2, 7, KEY_C),
172 KEY(3, 0, KEY_R),
173 KEY(3, 1, KEY_V),
174 KEY(3, 2, KEY_B),
ffe7f95b 175 KEY(3, 3, KEY_N),
acf442dc
AK		 176 KEY(3, 4, KEY_M),
177 KEY(3, 5, KEY_SPACE),
178 KEY(3, 6, KEY_SPACE),
179 KEY(3, 7, KEY_LEFT),
180 KEY(4, 0, KEY_T),
181 KEY(4, 1, KEY_DOWN),
182 KEY(4, 2, KEY_RIGHT),
ffe7f95b 183 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 184 KEY(4, 5, KEY_RIGHTALT),
185 KEY(4, 6, KEY_LEFTSHIFT),
186 KEY(5, 0, KEY_Y),
187 KEY(6, 0, KEY_U),
188 KEY(7, 0, KEY_I),
189 KEY(7, 1, KEY_F7),
190 KEY(7, 2, KEY_F8),
191 KEY(0xff, 2, KEY_F9),
192 KEY(0xff, 4, KEY_F10),
193 KEY(0xff, 5, KEY_F11),
ffe7f95b
LL		 194};
195
4f543332
TL		 196static struct matrix_keymap_data board_map_data = {
197 .keymap = board_keymap,
198 .keymap_size = ARRAY_SIZE(board_keymap),
199};
200
ffe7f95b 201static struct twl4030_keypad_data rx51_kp_data = {
4f543332 202 .keymap_data = &board_map_data,
ffe7f95b
LL		 203 .rows = 8,
204 .cols = 8,
ffe7f95b
LL		 205 .rep = 1,
206};
207
ffe7f95b
LL		 208static struct twl4030_madc_platform_data rx51_madc_data = {
209 .irq_line = 1,
210};
211
ce6f0016
AH		 212/* Enable input logic and pull all lines up when eMMC is on. */
213static struct omap_board_mux rx51_mmc2_on_mux[] = {
214 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
215 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
216 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
217 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
218 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
219 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
220 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
221 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
222 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
223 { .reg_offset = OMAP_MUX_TERMINATOR },
224};
225
226/* Disable input logic and pull all lines down when eMMC is off. */
227static struct omap_board_mux rx51_mmc2_off_mux[] = {
228 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
229 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
230 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
231 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
232 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
233 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
234 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
235 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
236 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
237 { .reg_offset = OMAP_MUX_TERMINATOR },
238};
239
240/*
241 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
242 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
243 */
244static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
245{
246 if (power_on)
247 omap_mux_write_array(rx51_mmc2_on_mux);
248 else
249 omap_mux_write_array(rx51_mmc2_off_mux);
250}
251
68ff0423 252static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 253 {
254 .name = "external",
255 .mmc = 1,
256 .wires = 4,
257 .cover_only = true,
258 .gpio_cd = 160,
259 .gpio_wp = -EINVAL,
5e763d29 260 .power_saving = true,
ffe7f95b
LL		 261 },
262 {
263 .name = "internal",
264 .mmc = 2,
ce6f0016 265 .wires = 8, /* See also rx51_mmc2_remux */
ffe7f95b
LL		 266 .gpio_cd = -EINVAL,
267 .gpio_wp = -EINVAL,
5e763d29
AH		 268 .nonremovable = true,
269 .power_saving = true,
ce6f0016 270 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 271 },
272 {} /* Terminator */
273};
274
275static struct regulator_consumer_supply rx51_vmmc1_supply = {
68ff0423
AH		 276 .supply = "vmmc",
277 .dev_name = "mmci-omap-hs.0",
ffe7f95b
LL		 278};
279
4cfcaef1 280static struct regulator_consumer_supply rx51_vaux3_supply = {
68ff0423
AH		 281 .supply = "vmmc",
282 .dev_name = "mmci-omap-hs.1",
ffe7f95b
LL		 283};
284
285static struct regulator_consumer_supply rx51_vsim_supply = {
68ff0423
AH		 286 .supply = "vmmc_aux",
287 .dev_name = "mmci-omap-hs.1",
ffe7f95b
LL		 288};
289
4cfcaef1
JN		 290static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
291 /* tlv320aic3x analog supplies */
292 {
293 .supply = "AVDD",
294 .dev_name = "2-0018",
295 },
296 {
297 .supply = "DRVDD",
298 .dev_name = "2-0018",
299 },
300 /* Keep vmmc as last item. It is not iterated for newer boards */
301 {
302 .supply = "vmmc",
303 .dev_name = "mmci-omap-hs.1",
304 },
305};
306
307static struct regulator_consumer_supply rx51_vio_supplies[] = {
308 /* tlv320aic3x digital supplies */
309 {
310 .supply = "IOVDD",
311 .dev_name = "2-0018"
312 },
313 {
314 .supply = "DVDD",
315 .dev_name = "2-0018"
316 },
317};
318
0581b52e
RQ		 319#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
320extern struct platform_device rx51_display_device;
321#endif
322
323static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
324#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
325 {
326 .supply = "vdds_sdi",
327 .dev = &rx51_display_device.dev,
328 },
329#endif
330};
331
ffe7f95b
LL		 332static struct regulator_init_data rx51_vaux1 = {
333 .constraints = {
334 .name = "V28",
335 .min_uV = 2800000,
336 .max_uV = 2800000,
337 .valid_modes_mask = REGULATOR_MODE_NORMAL
338 | REGULATOR_MODE_STANDBY,
339 .valid_ops_mask = REGULATOR_CHANGE_MODE
340 | REGULATOR_CHANGE_STATUS,
341 },
0581b52e
RQ		 342 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
343 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 344};
345
346static struct regulator_init_data rx51_vaux2 = {
347 .constraints = {
348 .name = "VCSI",
349 .min_uV = 1800000,
350 .max_uV = 1800000,
351 .valid_modes_mask = REGULATOR_MODE_NORMAL
352 | REGULATOR_MODE_STANDBY,
353 .valid_ops_mask = REGULATOR_CHANGE_MODE
354 | REGULATOR_CHANGE_STATUS,
355 },
356};
357
358/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 359static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 360 .constraints = {
361 .name = "VCAM_DIG_18",
362 .min_uV = 1800000,
363 .max_uV = 1800000,
364 .apply_uV = true,
365 .valid_modes_mask = REGULATOR_MODE_NORMAL
366 | REGULATOR_MODE_STANDBY,
367 .valid_ops_mask = REGULATOR_CHANGE_MODE
368 | REGULATOR_CHANGE_STATUS,
369 },
370};
371
f52eeee8
AH		 372static struct regulator_init_data rx51_vaux3_mmc = {
373 .constraints = {
374 .name = "VMMC2_30",
375 .min_uV = 2800000,
376 .max_uV = 3000000,
377 .apply_uV = true,
378 .valid_modes_mask = REGULATOR_MODE_NORMAL
379 | REGULATOR_MODE_STANDBY,
380 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
381 | REGULATOR_CHANGE_MODE
382 | REGULATOR_CHANGE_STATUS,
383 },
384 .num_consumer_supplies = 1,
4cfcaef1 385 .consumer_supplies = &rx51_vaux3_supply,
f52eeee8
AH		 386};
387
ffe7f95b
LL		 388static struct regulator_init_data rx51_vaux4 = {
389 .constraints = {
390 .name = "VCAM_ANA_28",
391 .min_uV = 2800000,
392 .max_uV = 2800000,
393 .apply_uV = true,
394 .valid_modes_mask = REGULATOR_MODE_NORMAL
395 | REGULATOR_MODE_STANDBY,
396 .valid_ops_mask = REGULATOR_CHANGE_MODE
397 | REGULATOR_CHANGE_STATUS,
398 },
399};
400
401static struct regulator_init_data rx51_vmmc1 = {
402 .constraints = {
403 .min_uV = 1850000,
404 .max_uV = 3150000,
405 .valid_modes_mask = REGULATOR_MODE_NORMAL
406 | REGULATOR_MODE_STANDBY,
407 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
408 | REGULATOR_CHANGE_MODE
409 | REGULATOR_CHANGE_STATUS,
410 },
411 .num_consumer_supplies = 1,
412 .consumer_supplies = &rx51_vmmc1_supply,
413};
414
415static struct regulator_init_data rx51_vmmc2 = {
416 .constraints = {
f2add1de
JN		 417 .name = "V28_A",
418 .min_uV = 2800000,
419 .max_uV = 3000000,
ffe7f95b
LL		 420 .apply_uV = true,
421 .valid_modes_mask = REGULATOR_MODE_NORMAL
422 | REGULATOR_MODE_STANDBY,
423 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
424 | REGULATOR_CHANGE_MODE
425 | REGULATOR_CHANGE_STATUS,
426 },
4cfcaef1
JN		 427 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
428 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 429};
430
431static struct regulator_init_data rx51_vsim = {
432 .constraints = {
433 .name = "VMMC2_IO_18",
434 .min_uV = 1800000,
435 .max_uV = 1800000,
436 .apply_uV = true,
437 .valid_modes_mask = REGULATOR_MODE_NORMAL
438 | REGULATOR_MODE_STANDBY,
439 .valid_ops_mask = REGULATOR_CHANGE_MODE
440 | REGULATOR_CHANGE_STATUS,
441 },
442 .num_consumer_supplies = 1,
443 .consumer_supplies = &rx51_vsim_supply,
444};
445
446static struct regulator_init_data rx51_vdac = {
447 .constraints = {
448 .min_uV = 1800000,
449 .max_uV = 1800000,
450 .valid_modes_mask = REGULATOR_MODE_NORMAL
451 | REGULATOR_MODE_STANDBY,
452 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
453 | REGULATOR_CHANGE_MODE
454 | REGULATOR_CHANGE_STATUS,
455 },
456};
457
4cfcaef1
JN		 458static struct regulator_init_data rx51_vio = {
459 .constraints = {
460 .min_uV = 1800000,
461 .max_uV = 1800000,
462 .valid_modes_mask = REGULATOR_MODE_NORMAL
463 | REGULATOR_MODE_STANDBY,
464 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
465 | REGULATOR_CHANGE_MODE
466 | REGULATOR_CHANGE_STATUS,
467 },
468 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
469 .consumer_supplies = rx51_vio_supplies,
470};
471
ffe7f95b
LL		 472static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
473{
474 /* FIXME this gpio setup is just a placeholder for now */
475 gpio_request(gpio + 6, "backlight_pwm");
476 gpio_direction_output(gpio + 6, 0);
477 gpio_request(gpio + 7, "speaker_en");
478 gpio_direction_output(gpio + 7, 1);
479
ffe7f95b
LL		 480 return 0;
481}
482
483static struct twl4030_gpio_platform_data rx51_gpio_data = {
484 .gpio_base = OMAP_MAX_GPIO_LINES,
485 .irq_base = TWL4030_GPIO_IRQ_BASE,
486 .irq_end = TWL4030_GPIO_IRQ_END,
487 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
488 | BIT(4) | BIT(5)
489 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
490 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
491 | BIT(16) | BIT(17) ,
492 .setup = rx51_twlgpio_setup,
493};
494
dfc27b34
RQ		 495static struct twl4030_usb_data rx51_usb_data = {
496 .usb_mode = T2_USB_MODE_ULPI,
497};
498
9312fffb
AK		 499static struct twl4030_ins sleep_on_seq[] __initdata = {
500/*
3c684e84 501 * Turn off everything
9312fffb 502 */
3c684e84 503 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 504};
505
506static struct twl4030_script sleep_on_script __initdata = {
507 .script = sleep_on_seq,
508 .size = ARRAY_SIZE(sleep_on_seq),
509 .flags = TWL4030_SLEEP_SCRIPT,
510};
511
512static struct twl4030_ins wakeup_seq[] __initdata = {
513/*
3c684e84 514 * Reenable everything
9312fffb 515 */
3c684e84 516 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 517};
518
519static struct twl4030_script wakeup_script __initdata = {
520 .script = wakeup_seq,
521 .size = ARRAY_SIZE(wakeup_seq),
522 .flags = TWL4030_WAKEUP12_SCRIPT,
523};
524
525static struct twl4030_ins wakeup_p3_seq[] __initdata = {
526/*
3c684e84 527 * Reenable everything
9312fffb 528 */
3c684e84 529 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 530};
531
532static struct twl4030_script wakeup_p3_script __initdata = {
533 .script = wakeup_p3_seq,
534 .size = ARRAY_SIZE(wakeup_p3_seq),
535 .flags = TWL4030_WAKEUP3_SCRIPT,
536};
537
538static struct twl4030_ins wrst_seq[] __initdata = {
539/*
540 * Reset twl4030.
541 * Reset VDD1 regulator.
542 * Reset VDD2 regulator.
543 * Reset VPLL1 regulator.
544 * Enable sysclk output.
545 * Reenable twl4030.
546 */
547 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
548 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
549 0x13},
9312fffb
AK		 550 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
551 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
552 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
553 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 554 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 555 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
556};
557
558static struct twl4030_script wrst_script __initdata = {
559 .script = wrst_seq,
560 .size = ARRAY_SIZE(wrst_seq),
561 .flags = TWL4030_WRST_SCRIPT,
562};
563
564static struct twl4030_script *twl4030_scripts[] __initdata = {
565 /* wakeup12 script should be loaded before sleep script, otherwise a
566 board might hit retention before loading of wakeup script is
567 completed. This can cause boot failures depending on timing issues.
568 */
569 &wakeup_script,
570 &sleep_on_script,
571 &wakeup_p3_script,
572 &wrst_script,
573};
574
575static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 576 { .resource = RES_VDD1, .devgroup = -1,
577 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
578 .remap_sleep = RES_STATE_OFF
579 },
580 { .resource = RES_VDD2, .devgroup = -1,
581 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
582 .remap_sleep = RES_STATE_OFF
583 },
584 { .resource = RES_VPLL1, .devgroup = -1,
585 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
586 .remap_sleep = RES_STATE_OFF
587 },
588 { .resource = RES_VPLL2, .devgroup = -1,
589 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
590 },
591 { .resource = RES_VAUX1, .devgroup = -1,
592 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
593 },
594 { .resource = RES_VAUX2, .devgroup = -1,
595 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
596 },
597 { .resource = RES_VAUX3, .devgroup = -1,
598 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
599 },
600 { .resource = RES_VAUX4, .devgroup = -1,
601 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
602 },
603 { .resource = RES_VMMC1, .devgroup = -1,
604 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
605 },
606 { .resource = RES_VMMC2, .devgroup = -1,
607 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
608 },
609 { .resource = RES_VDAC, .devgroup = -1,
610 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
611 },
612 { .resource = RES_VSIM, .devgroup = -1,
613 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
614 },
615 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
616 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
617 },
618 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
619 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
620 },
621 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
622 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
623 },
624 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
625 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
626 },
627 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
628 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
629 },
630 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
631 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
632 },
633 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
634 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
635 },
636 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
637 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
638 },
639 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
640 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
641 },
642 { .resource = RES_32KCLKOUT, .devgroup = -1,
643 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
644 },
645 { .resource = RES_RESET, .devgroup = -1,
646 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
647 },
648 { .resource = RES_Main_Ref, .devgroup = -1,
649 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
650 },
9312fffb
AK		 651 { 0, 0},
652};
653
654static struct twl4030_power_data rx51_t2scripts_data __initdata = {
655 .scripts = twl4030_scripts,
656 .num = ARRAY_SIZE(twl4030_scripts),
657 .resource_config = twl4030_rconfig,
658};
659
660
661
662static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 663 .irq_base = TWL4030_IRQ_BASE,
664 .irq_end = TWL4030_IRQ_END,
665
666 /* platform_data for children goes here */
667 .gpio = &rx51_gpio_data,
668 .keypad = &rx51_kp_data,
669 .madc = &rx51_madc_data,
dfc27b34 670 .usb = &rx51_usb_data,
9312fffb 671 .power = &rx51_t2scripts_data,
ffe7f95b
LL		 672
673 .vaux1 = &rx51_vaux1,
674 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 675 .vaux4 = &rx51_vaux4,
676 .vmmc1 = &rx51_vmmc1,
ffe7f95b
LL		 677 .vsim = &rx51_vsim,
678 .vdac = &rx51_vdac,
4cfcaef1 679 .vio = &rx51_vio,
ffe7f95b
LL		 680};
681
682static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
683 {
684 I2C_BOARD_INFO("twl5030", 0x48),
685 .flags = I2C_CLIENT_WAKE,
686 .irq = INT_34XX_SYS_NIRQ,
687 .platform_data = &rx51_twldata,
688 },
689};
690
dabe929b
JN		 691static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
692 {
693 I2C_BOARD_INFO("tlv320aic3x", 0x18),
694 },
695};
696
ffe7f95b
LL		 697static int __init rx51_i2c_init(void)
698{
f52eeee8 699 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 700 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 701 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 702 /* Only older boards use VMMC2 for internal MMC */
703 rx51_vmmc2.num_consumer_supplies--;
704 } else {
f52eeee8 705 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 706 }
4cfcaef1 707 rx51_twldata.vmmc2 = &rx51_vmmc2;
cb3cc45a 708 omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
dabe929b
JN		 709 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
710 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
711 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
ffe7f95b
LL		 712 omap_register_i2c_bus(3, 400, NULL, 0);
713 return 0;
714}
715
aa62e90f
JY		 716#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
717 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
718
719static struct mtd_partition onenand_partitions[] = {
720 {
721 .name = "bootloader",
722 .offset = 0,
723 .size = 0x20000,
724 .mask_flags = MTD_WRITEABLE, /* Force read-only */
725 },
726 {
727 .name = "config",
728 .offset = MTDPART_OFS_APPEND,
729 .size = 0x60000,
730 },
731 {
732 .name = "log",
733 .offset = MTDPART_OFS_APPEND,
734 .size = 0x40000,
735 },
736 {
737 .name = "kernel",
738 .offset = MTDPART_OFS_APPEND,
739 .size = 0x200000,
740 },
741 {
742 .name = "initfs",
743 .offset = MTDPART_OFS_APPEND,
744 .size = 0x200000,
745 },
746 {
747 .name = "rootfs",
748 .offset = MTDPART_OFS_APPEND,
749 .size = MTDPART_SIZ_FULL,
750 },
751};
752
753static struct omap_onenand_platform_data board_onenand_data = {
754 .cs = 0,
755 .gpio_irq = 65,
756 .parts = onenand_partitions,
757 .nr_parts = ARRAY_SIZE(onenand_partitions),
c8e6488f 758 .flags = ONENAND_SYNC_READWRITE,
aa62e90f
JY		 759};
760
761static void __init board_onenand_init(void)
762{
763 gpmc_onenand_init(&board_onenand_data);
764}
765
766#else
767
768static inline void board_onenand_init(void)
769{
770}
771
772#endif
ffe7f95b 773
1a48e157
TL		 774#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
775
776static struct omap_smc91x_platform_data board_smc91x_data = {
777 .cs = 1,
778 .gpio_irq = 54,
779 .gpio_pwrdwn = 86,
780 .gpio_reset = 164,
781 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
782};
783
784static void __init board_smc91x_init(void)
785{
4896e394
TL		 786 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
787 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
788 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL		 789
790 gpmc_smc91x_init(&board_smc91x_data);
791}
792
793#else
794
795static inline void board_smc91x_init(void)
796{
797}
798
799#endif
800
a24e61a9
KV		 801static void rx51_wl1251_set_power(bool enable)
802{
803 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
804}
805
806static void __init rx51_init_wl1251(void)
807{
808 int irq, ret;
809
810 ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power");
811 if (ret < 0)
812 goto error;
813
814 ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0);
815 if (ret < 0)
816 goto err_power;
817
818 ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq");
819 if (ret < 0)
820 goto err_power;
821
822 ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO);
823 if (ret < 0)
824 goto err_irq;
825
826 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
827 if (irq < 0)
828 goto err_irq;
829
830 wl1251_pdata.set_power = rx51_wl1251_set_power;
831 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
832
833 return;
834
835err_irq:
836 gpio_free(RX51_WL1251_IRQ_GPIO);
837
838err_power:
839 gpio_free(RX51_WL1251_POWER_GPIO);
840
841error:
842 printk(KERN_ERR "wl1251 board initialisation failed\n");
843 wl1251_pdata.set_power = NULL;
844
845 /*
846 * Now rx51_peripherals_spi_board_info[1].irq is zero and
847 * set_power is null, and wl1251_probe() will fail.
848 */
849}
850
ffe7f95b
LL		 851void __init rx51_peripherals_init(void)
852{
ffe7f95b 853 rx51_i2c_init();
aa62e90f 854 board_onenand_init();
1a48e157 855 board_smc91x_init();
f014ee32 856 rx51_add_gpio_keys();
a24e61a9
KV		 857 rx51_init_wl1251();
858 spi_register_board_info(rx51_peripherals_spi_board_info,
859 ARRAY_SIZE(rx51_peripherals_spi_board_info));
68ff0423 860 omap2_hsmmc_init(mmc);
ffe7f95b
LL		 861}
862
Linux kernel - Deliverables
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