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Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL		 21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
68a3c043 26#include <linux/gpio/machine.h>
e639cd5b 27#include <linux/omap-gpmc.h>
5e763d29 28#include <linux/mmc/host.h>
10299e2e 29#include <linux/power/isp1704_charger.h>
2203747c
AB		 30#include <linux/platform_data/spi-omap2-mcspi.h>
31#include <linux/platform_data/mtd-onenand-omap2.h>
32
8453c5ca
TL		 33#include <plat/dmtimer.h>
34
9f97da78 35#include <asm/system_info.h>
ffe7f95b 36
4e65331c 37#include "common.h"
45c3eb7d 38#include <linux/omap-dma.h>
ffe7f95b 39
0a6f98c9 40#include "board-rx51.h"
04aeae77 41
87581fd4 42#include <sound/tlv320aic3x.h>
64d06691 43#include <sound/tpa6130a2-plat.h>
eb4b0ec7 44#include <linux/platform_data/media/si4713.h>
df4094d2 45#include <linux/platform_data/leds-lp55xx.h>
87581fd4 46
9c2251dd 47#include <linux/platform_data/tsl2563.h>
3b511201 48#include <linux/lis3lv02d.h>
70b5d737 49
2320dc6f
TV		 50#include <video/omap-panel-data.h>
51
8453c5ca 52#include <linux/platform_data/pwm_omap_dmtimer.h>
eb4b0ec7 53#include <linux/platform_data/media/ir-rx51.h>
322c183c 54
4896e394 55#include "mux.h"
1d5aef49 56#include "omap-pm.h"
d02a900b 57#include "hsmmc.h"
fbd8071c 58#include "common-board-devices.h"
d2065e2b
PR		 59#include "soc.h"
60#include "omap-secure.h"
ffe7f95b 61
f52eeee8
AH		 62#define SYSTEM_REV_B_USES_VAUX3 0x1699
63#define SYSTEM_REV_S_USES_VAUX3 0x8
64
a24e61a9
KV		 65#define RX51_WL1251_POWER_GPIO 87
66#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN		 67#define RX51_FMTX_RESET_GPIO 163
68#define RX51_FMTX_IRQ 53
eeada9e8 69#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 70
10299e2e
KJ		 71#define RX51_USB_TRANSCEIVER_RST_GPIO 67
72
3dad5356
AK		 73#define RX51_TSC2005_RESET_GPIO 104
74#define RX51_TSC2005_IRQ_GPIO 100
75
3b511201
AP		 76#define LIS302_IRQ1_GPIO 181
77#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
78
e65f131a 79/* List all SPI devices here. Note that the list/probe order seems to matter! */
a24e61a9
KV		 80enum {
81 RX51_SPI_WL1251,
6996e7ff 82 RX51_SPI_TSC2005, /* Touch Controller */
e65f131a 83 RX51_SPI_MIPID, /* LCD panel */
a24e61a9
KV		 84};
85
946651cb 86static struct wl1251_platform_data wl1251_pdata;
3dad5356 87static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 88
3b511201
AP		 89#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
90static int lis302_setup(void)
91{
92 int err;
93 int irq1 = LIS302_IRQ1_GPIO;
94 int irq2 = LIS302_IRQ2_GPIO;
95
96 /* gpio for interrupt pin 1 */
97 err = gpio_request(irq1, "lis3lv02dl_irq1");
98 if (err) {
99 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
100 goto out;
101 }
102
103 /* gpio for interrupt pin 2 */
104 err = gpio_request(irq2, "lis3lv02dl_irq2");
105 if (err) {
106 gpio_free(irq1);
107 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
108 goto out;
109 }
110
111 gpio_direction_input(irq1);
112 gpio_direction_input(irq2);
113
114out:
115 return err;
116}
117
118static int lis302_release(void)
119{
120 gpio_free(LIS302_IRQ1_GPIO);
121 gpio_free(LIS302_IRQ2_GPIO);
122
123 return 0;
124}
125
126static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
127 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
128 LIS3_CLICK_SINGLE_Z,
129 /* Limits are 0.5g * value */
130 .click_thresh_x = 8,
131 .click_thresh_y = 8,
132 .click_thresh_z = 10,
133 /* Click must be longer than time limit */
134 .click_time_limit = 9,
135 /* Kind of debounce filter */
136 .click_latency = 50,
137
138 /* Limits for all axis. millig-value / 18 to get HW values */
139 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
140 .wakeup_thresh = 800 / 18,
141 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
142 .wakeup_thresh2 = 900 / 18,
143
144 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
145
146 /* Interrupt line 2 for click detection, line 1 for thresholds */
147 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
148
149 .axis_x = LIS3_DEV_X,
150 .axis_y = LIS3_INV_DEV_Y,
151 .axis_z = LIS3_INV_DEV_Z,
152 .setup_resources = lis302_setup,
153 .release_resources = lis302_release,
154 .st_min_limits = {-32, 3, 3},
155 .st_max_limits = {-3, 32, 32},
3b511201
AP		 156};
157#endif
158
70b5d737
MN		 159#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
160static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
161 .cover_comp_gain = 16,
162};
163#endif
164
eeada9e8 165#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
df4094d2 166static struct lp55xx_led_config rx51_lp5523_led_config[] = {
eeada9e8 167 {
1e7bf5e3 168 .name = "lp5523:kb1",
eeada9e8
AP		 169 .chan_nr = 0,
170 .led_current = 50,
d1f1ca36 171 .max_current = 100,
eeada9e8 172 }, {
1e7bf5e3 173 .name = "lp5523:kb2",
eeada9e8
AP		 174 .chan_nr = 1,
175 .led_current = 50,
d1f1ca36 176 .max_current = 100,
eeada9e8 177 }, {
1e7bf5e3 178 .name = "lp5523:kb3",
eeada9e8
AP		 179 .chan_nr = 2,
180 .led_current = 50,
d1f1ca36 181 .max_current = 100,
eeada9e8 182 }, {
1e7bf5e3 183 .name = "lp5523:kb4",
eeada9e8
AP		 184 .chan_nr = 3,
185 .led_current = 50,
d1f1ca36 186 .max_current = 100,
eeada9e8 187 }, {
1e7bf5e3 188 .name = "lp5523:b",
eeada9e8
AP		 189 .chan_nr = 4,
190 .led_current = 50,
d1f1ca36 191 .max_current = 100,
eeada9e8 192 }, {
1e7bf5e3 193 .name = "lp5523:g",
eeada9e8
AP		 194 .chan_nr = 5,
195 .led_current = 50,
d1f1ca36 196 .max_current = 100,
eeada9e8 197 }, {
1e7bf5e3 198 .name = "lp5523:r",
eeada9e8
AP		 199 .chan_nr = 6,
200 .led_current = 50,
d1f1ca36 201 .max_current = 100,
eeada9e8 202 }, {
1e7bf5e3 203 .name = "lp5523:kb5",
eeada9e8
AP		 204 .chan_nr = 7,
205 .led_current = 50,
d1f1ca36 206 .max_current = 100,
eeada9e8 207 }, {
1e7bf5e3 208 .name = "lp5523:kb6",
eeada9e8
AP		 209 .chan_nr = 8,
210 .led_current = 50,
d1f1ca36 211 .max_current = 100,
eeada9e8
AP		 212 }
213};
214
df4094d2 215static struct lp55xx_platform_data rx51_lp5523_platform_data = {
eeada9e8
AP		 216 .led_config = rx51_lp5523_led_config,
217 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
df4094d2 218 .clock_mode = LP55XX_CLOCK_AUTO,
30dae2f9 219 .enable_gpio = RX51_LP5523_CHIP_EN_GPIO,
eeada9e8
AP		 220};
221#endif
222
2320dc6f
TV		 223#define RX51_LCD_RESET_GPIO 90
224
225static struct panel_acx565akm_platform_data acx_pdata = {
226 .name = "lcd",
227 .source = "sdi.0",
228 .reset_gpio = RX51_LCD_RESET_GPIO,
229 .datapairs = 2,
230};
231
a24e61a9
KV		 232static struct omap2_mcspi_device_config wl1251_mcspi_config = {
233 .turbo_mode = 0,
a24e61a9
KV		 234};
235
03e11104
RQ		 236static struct omap2_mcspi_device_config mipid_mcspi_config = {
237 .turbo_mode = 0,
03e11104
RQ		 238};
239
6996e7ff
RQ		 240static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
241 .turbo_mode = 0,
6996e7ff
RQ		 242};
243
a24e61a9
KV		 244static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
245 [RX51_SPI_WL1251] = {
246 .modalias = "wl1251",
247 .bus_num = 4,
248 .chip_select = 0,
249 .max_speed_hz = 48000000,
860fc976 250 .mode = SPI_MODE_3,
a24e61a9
KV		 251 .controller_data = &wl1251_mcspi_config,
252 .platform_data = &wl1251_pdata,
253 },
03e11104
RQ		 254 [RX51_SPI_MIPID] = {
255 .modalias = "acx565akm",
256 .bus_num = 1,
257 .chip_select = 2,
258 .max_speed_hz = 6000000,
259 .controller_data = &mipid_mcspi_config,
2320dc6f 260 .platform_data = &acx_pdata,
03e11104 261 },
6996e7ff
RQ		 262 [RX51_SPI_TSC2005] = {
263 .modalias = "tsc2005",
264 .bus_num = 1,
265 .chip_select = 0,
6996e7ff
RQ		 266 .max_speed_hz = 6000000,
267 .controller_data = &tsc2005_mcspi_config,
3dad5356 268 .platform_data = &tsc2005_pdata,
6996e7ff 269 },
a24e61a9
KV		 270};
271
7605c0b0
PR		 272static struct platform_device rx51_battery_device = {
273 .name = "rx51-battery",
274 .id = -1,
275};
276
10299e2e
KJ		 277static void rx51_charger_set_power(bool on)
278{
279 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
280}
281
282static struct isp1704_charger_data rx51_charger_data = {
283 .set_power = rx51_charger_set_power,
284};
285
fd0964c5 286static struct platform_device rx51_charger_device = {
10299e2e
KJ		 287 .name = "isp1704_charger",
288 .dev = {
289 .platform_data = &rx51_charger_data,
290 },
fd0964c5
HK		 291};
292
10299e2e
KJ		 293static void __init rx51_charger_init(void)
294{
295 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 296 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e 297
7605c0b0 298 platform_device_register(&rx51_battery_device);
10299e2e
KJ		 299 platform_device_register(&rx51_charger_device);
300}
301
f014ee32
JN		 302#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
303
304#define RX51_GPIO_CAMERA_LENS_COVER 110
305#define RX51_GPIO_CAMERA_FOCUS 68
306#define RX51_GPIO_CAMERA_CAPTURE 69
307#define RX51_GPIO_KEYPAD_SLIDE 71
308#define RX51_GPIO_LOCK_BUTTON 113
309#define RX51_GPIO_PROXIMITY 89
310
311#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
312
313static struct gpio_keys_button rx51_gpio_keys[] = {
314 {
315 .desc = "Camera Lens Cover",
316 .type = EV_SW,
317 .code = SW_CAMERA_LENS_COVER,
318 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
319 .active_low = 1,
320 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
321 }, {
322 .desc = "Camera Focus",
323 .type = EV_KEY,
324 .code = KEY_CAMERA_FOCUS,
325 .gpio = RX51_GPIO_CAMERA_FOCUS,
326 .active_low = 1,
327 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
328 }, {
329 .desc = "Camera Capture",
330 .type = EV_KEY,
331 .code = KEY_CAMERA,
332 .gpio = RX51_GPIO_CAMERA_CAPTURE,
333 .active_low = 1,
334 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
335 }, {
336 .desc = "Lock Button",
337 .type = EV_KEY,
338 .code = KEY_SCREENLOCK,
339 .gpio = RX51_GPIO_LOCK_BUTTON,
340 .active_low = 1,
341 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
342 }, {
343 .desc = "Keypad Slide",
344 .type = EV_SW,
345 .code = SW_KEYPAD_SLIDE,
346 .gpio = RX51_GPIO_KEYPAD_SLIDE,
347 .active_low = 1,
348 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
349 }, {
350 .desc = "Proximity Sensor",
351 .type = EV_SW,
352 .code = SW_FRONT_PROXIMITY,
353 .gpio = RX51_GPIO_PROXIMITY,
354 .active_low = 0,
355 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
356 }
357};
358
359static struct gpio_keys_platform_data rx51_gpio_keys_data = {
360 .buttons = rx51_gpio_keys,
361 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
362};
363
364static struct platform_device rx51_gpio_keys_device = {
365 .name = "gpio-keys",
366 .id = -1,
367 .dev = {
368 .platform_data = &rx51_gpio_keys_data,
369 },
370};
371
372static void __init rx51_add_gpio_keys(void)
373{
374 platform_device_register(&rx51_gpio_keys_device);
375}
376#else
377static void __init rx51_add_gpio_keys(void)
378{
379}
380#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
381
bead4375 382static uint32_t board_keymap[] = {
3fea6026
DT		 383 /*
384 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
385 * connected to the ground" matrix state.
386 */
ffe7f95b 387 KEY(0, 0, KEY_Q),
acf442dc
AK		 388 KEY(0, 1, KEY_O),
389 KEY(0, 2, KEY_P),
390 KEY(0, 3, KEY_COMMA),
391 KEY(0, 4, KEY_BACKSPACE),
392 KEY(0, 6, KEY_A),
393 KEY(0, 7, KEY_S),
3fea6026 394
acf442dc 395 KEY(1, 0, KEY_W),
ffe7f95b 396 KEY(1, 1, KEY_D),
acf442dc
AK		 397 KEY(1, 2, KEY_F),
398 KEY(1, 3, KEY_G),
399 KEY(1, 4, KEY_H),
400 KEY(1, 5, KEY_J),
401 KEY(1, 6, KEY_K),
402 KEY(1, 7, KEY_L),
3fea6026 403
acf442dc
AK		 404 KEY(2, 0, KEY_E),
405 KEY(2, 1, KEY_DOT),
ffe7f95b 406 KEY(2, 2, KEY_UP),
acf442dc
AK		 407 KEY(2, 3, KEY_ENTER),
408 KEY(2, 5, KEY_Z),
409 KEY(2, 6, KEY_X),
410 KEY(2, 7, KEY_C),
3fea6026
DT		 411 KEY(2, 8, KEY_F9),
412
acf442dc
AK		 413 KEY(3, 0, KEY_R),
414 KEY(3, 1, KEY_V),
415 KEY(3, 2, KEY_B),
ffe7f95b 416 KEY(3, 3, KEY_N),
acf442dc
AK		 417 KEY(3, 4, KEY_M),
418 KEY(3, 5, KEY_SPACE),
419 KEY(3, 6, KEY_SPACE),
420 KEY(3, 7, KEY_LEFT),
3fea6026 421
acf442dc
AK		 422 KEY(4, 0, KEY_T),
423 KEY(4, 1, KEY_DOWN),
424 KEY(4, 2, KEY_RIGHT),
ffe7f95b 425 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 426 KEY(4, 5, KEY_RIGHTALT),
427 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 428 KEY(4, 8, KEY_F10),
3fea6026 429
acf442dc 430 KEY(5, 0, KEY_Y),
2e65a207 431 KEY(5, 8, KEY_F11),
3fea6026 432
acf442dc 433 KEY(6, 0, KEY_U),
3fea6026 434
acf442dc
AK		 435 KEY(7, 0, KEY_I),
436 KEY(7, 1, KEY_F7),
437 KEY(7, 2, KEY_F8),
ffe7f95b
LL		 438};
439
4f543332
TL		 440static struct matrix_keymap_data board_map_data = {
441 .keymap = board_keymap,
442 .keymap_size = ARRAY_SIZE(board_keymap),
443};
444
ffe7f95b 445static struct twl4030_keypad_data rx51_kp_data = {
4f543332 446 .keymap_data = &board_map_data,
ffe7f95b
LL		 447 .rows = 8,
448 .cols = 8,
ffe7f95b
LL		 449 .rep = 1,
450};
451
ce6f0016
AH		 452/* Enable input logic and pull all lines up when eMMC is on. */
453static struct omap_board_mux rx51_mmc2_on_mux[] = {
454 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
455 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
456 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
457 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
458 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
459 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
460 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
461 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
462 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
463 { .reg_offset = OMAP_MUX_TERMINATOR },
464};
465
466/* Disable input logic and pull all lines down when eMMC is off. */
467static struct omap_board_mux rx51_mmc2_off_mux[] = {
468 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
469 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
470 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
471 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
472 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
473 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
474 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
475 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
476 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
477 { .reg_offset = OMAP_MUX_TERMINATOR },
478};
479
112485e9
BC		 480static struct omap_mux_partition *partition;
481
ce6f0016
AH		 482/*
483 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
484 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
485 */
80412ca8 486static void rx51_mmc2_remux(struct device *dev, int power_on)
ce6f0016
AH		 487{
488 if (power_on)
112485e9 489 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 490 else
112485e9 491 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH		 492}
493
68ff0423 494static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 495 {
496 .name = "external",
497 .mmc = 1,
3a63833e 498 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL		 499 .cover_only = true,
500 .gpio_cd = 160,
501 .gpio_wp = -EINVAL,
502 },
503 {
504 .name = "internal",
505 .mmc = 2,
3a63833e
SG		 506 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
507 /* See also rx51_mmc2_remux */
ffe7f95b
LL		 508 .gpio_cd = -EINVAL,
509 .gpio_wp = -EINVAL,
5e763d29 510 .nonremovable = true,
ce6f0016 511 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 512 },
513 {} /* Terminator */
514};
515
786b01a8
OD		 516static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
517 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
518};
ffe7f95b 519
664a41b8
LT		 520static struct regulator_consumer_supply rx51_vaux2_supply[] = {
521 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
522};
75ccf268 523
786b01a8
OD		 524static struct regulator_consumer_supply rx51_vaux3_supply[] = {
525 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
526};
ffe7f95b 527
786b01a8
OD		 528static struct regulator_consumer_supply rx51_vsim_supply[] = {
529 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
530};
ffe7f95b 531
4cfcaef1
JN		 532static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
533 /* tlv320aic3x analog supplies */
5c7d9bbe
JN		 534 REGULATOR_SUPPLY("AVDD", "2-0018"),
535 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN		 536 REGULATOR_SUPPLY("AVDD", "2-0019"),
537 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN		 538 /* tpa6130a2 */
539 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 540 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 541 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN		 542};
543
544static struct regulator_consumer_supply rx51_vio_supplies[] = {
545 /* tlv320aic3x digital supplies */
5c7d9bbe
JN		 546 REGULATOR_SUPPLY("IOVDD", "2-0018"),
547 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN		 548 REGULATOR_SUPPLY("IOVDD", "2-0019"),
549 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN		 550 /* Si4713 IO supply */
551 REGULATOR_SUPPLY("vio", "2-0063"),
17fd8cdb
AK		 552 /* lis3lv02d */
553 REGULATOR_SUPPLY("Vdd_IO", "3-001d"),
4cfcaef1
JN		 554};
555
0581b52e 556static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 557 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
3d85f548 558 REGULATOR_SUPPLY("vdds_sdi", "omapdss_sdi.0"),
589541c0
JN		 559 /* Si4713 supply */
560 REGULATOR_SUPPLY("vdd", "2-0063"),
17fd8cdb
AK		 561 /* lis3lv02d */
562 REGULATOR_SUPPLY("Vdd", "3-001d"),
0581b52e
RQ		 563};
564
ffe7f95b
LL		 565static struct regulator_init_data rx51_vaux1 = {
566 .constraints = {
567 .name = "V28",
568 .min_uV = 2800000,
569 .max_uV = 2800000,
000d534e 570 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL		 571 .valid_modes_mask = REGULATOR_MODE_NORMAL
572 | REGULATOR_MODE_STANDBY,
573 .valid_ops_mask = REGULATOR_CHANGE_MODE
574 | REGULATOR_CHANGE_STATUS,
575 },
0581b52e
RQ		 576 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
577 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 578};
579
580static struct regulator_init_data rx51_vaux2 = {
581 .constraints = {
582 .name = "VCSI",
583 .min_uV = 1800000,
584 .max_uV = 1800000,
585 .valid_modes_mask = REGULATOR_MODE_NORMAL
586 | REGULATOR_MODE_STANDBY,
587 .valid_ops_mask = REGULATOR_CHANGE_MODE
588 | REGULATOR_CHANGE_STATUS,
589 },
664a41b8
LT		 590 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
591 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL		 592};
593
594/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 595static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 596 .constraints = {
597 .name = "VCAM_DIG_18",
598 .min_uV = 1800000,
599 .max_uV = 1800000,
600 .apply_uV = true,
601 .valid_modes_mask = REGULATOR_MODE_NORMAL
602 | REGULATOR_MODE_STANDBY,
603 .valid_ops_mask = REGULATOR_CHANGE_MODE
604 | REGULATOR_CHANGE_STATUS,
605 },
606};
607
f52eeee8
AH		 608static struct regulator_init_data rx51_vaux3_mmc = {
609 .constraints = {
610 .name = "VMMC2_30",
611 .min_uV = 2800000,
612 .max_uV = 3000000,
613 .apply_uV = true,
614 .valid_modes_mask = REGULATOR_MODE_NORMAL
615 | REGULATOR_MODE_STANDBY,
616 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
617 | REGULATOR_CHANGE_MODE
618 | REGULATOR_CHANGE_STATUS,
619 },
786b01a8
OD		 620 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
621 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH		 622};
623
ffe7f95b
LL		 624static struct regulator_init_data rx51_vaux4 = {
625 .constraints = {
626 .name = "VCAM_ANA_28",
627 .min_uV = 2800000,
628 .max_uV = 2800000,
629 .apply_uV = true,
630 .valid_modes_mask = REGULATOR_MODE_NORMAL
631 | REGULATOR_MODE_STANDBY,
632 .valid_ops_mask = REGULATOR_CHANGE_MODE
633 | REGULATOR_CHANGE_STATUS,
634 },
635};
636
637static struct regulator_init_data rx51_vmmc1 = {
638 .constraints = {
639 .min_uV = 1850000,
640 .max_uV = 3150000,
641 .valid_modes_mask = REGULATOR_MODE_NORMAL
642 | REGULATOR_MODE_STANDBY,
643 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
644 | REGULATOR_CHANGE_MODE
645 | REGULATOR_CHANGE_STATUS,
646 },
786b01a8
OD		 647 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
648 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL		 649};
650
651static struct regulator_init_data rx51_vmmc2 = {
652 .constraints = {
f2add1de
JN		 653 .name = "V28_A",
654 .min_uV = 2800000,
655 .max_uV = 3000000,
2827411e 656 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL		 657 .apply_uV = true,
658 .valid_modes_mask = REGULATOR_MODE_NORMAL
659 | REGULATOR_MODE_STANDBY,
660 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
661 | REGULATOR_CHANGE_MODE
662 | REGULATOR_CHANGE_STATUS,
663 },
4cfcaef1
JN		 664 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
665 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 666};
667
094fc559
KJ		 668static struct regulator_init_data rx51_vpll1 = {
669 .constraints = {
670 .name = "VPLL",
671 .min_uV = 1800000,
672 .max_uV = 1800000,
673 .apply_uV = true,
674 .always_on = true,
675 .valid_modes_mask = REGULATOR_MODE_NORMAL
676 | REGULATOR_MODE_STANDBY,
677 .valid_ops_mask = REGULATOR_CHANGE_MODE,
678 },
679};
680
681static struct regulator_init_data rx51_vpll2 = {
682 .constraints = {
683 .name = "VSDI_CSI",
684 .min_uV = 1800000,
685 .max_uV = 1800000,
686 .apply_uV = true,
687 .always_on = true,
688 .valid_modes_mask = REGULATOR_MODE_NORMAL
689 | REGULATOR_MODE_STANDBY,
690 .valid_ops_mask = REGULATOR_CHANGE_MODE,
691 },
692};
693
ffe7f95b
LL		 694static struct regulator_init_data rx51_vsim = {
695 .constraints = {
696 .name = "VMMC2_IO_18",
697 .min_uV = 1800000,
698 .max_uV = 1800000,
699 .apply_uV = true,
700 .valid_modes_mask = REGULATOR_MODE_NORMAL
701 | REGULATOR_MODE_STANDBY,
702 .valid_ops_mask = REGULATOR_CHANGE_MODE
703 | REGULATOR_CHANGE_STATUS,
704 },
786b01a8
OD		 705 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
706 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL		 707};
708
4cfcaef1
JN		 709static struct regulator_init_data rx51_vio = {
710 .constraints = {
711 .min_uV = 1800000,
712 .max_uV = 1800000,
713 .valid_modes_mask = REGULATOR_MODE_NORMAL
714 | REGULATOR_MODE_STANDBY,
715 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
716 | REGULATOR_CHANGE_MODE
717 | REGULATOR_CHANGE_STATUS,
718 },
719 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
720 .consumer_supplies = rx51_vio_supplies,
721};
722
094fc559
KJ		 723static struct regulator_init_data rx51_vintana1 = {
724 .constraints = {
725 .name = "VINTANA1",
726 .min_uV = 1500000,
727 .max_uV = 1500000,
728 .always_on = true,
729 .valid_modes_mask = REGULATOR_MODE_NORMAL
730 | REGULATOR_MODE_STANDBY,
731 .valid_ops_mask = REGULATOR_CHANGE_MODE,
732 },
733};
734
735static struct regulator_init_data rx51_vintana2 = {
736 .constraints = {
737 .name = "VINTANA2",
738 .min_uV = 2750000,
739 .max_uV = 2750000,
740 .apply_uV = true,
741 .always_on = true,
742 .valid_modes_mask = REGULATOR_MODE_NORMAL
743 | REGULATOR_MODE_STANDBY,
744 .valid_ops_mask = REGULATOR_CHANGE_MODE,
745 },
746};
747
748static struct regulator_init_data rx51_vintdig = {
749 .constraints = {
750 .name = "VINTDIG",
751 .min_uV = 1500000,
752 .max_uV = 1500000,
753 .always_on = true,
754 .valid_modes_mask = REGULATOR_MODE_NORMAL
755 | REGULATOR_MODE_STANDBY,
756 .valid_ops_mask = REGULATOR_CHANGE_MODE,
757 },
758};
759
68a3c043
SR		 760static struct gpiod_lookup_table rx51_fmtx_gpios_table = {
761 .dev_id = "2-0063",
762 .table = {
763 GPIO_LOOKUP("gpio.6", 3, "reset", GPIO_ACTIVE_HIGH), /* 163 */
764 { },
589541c0
JN		 765 },
766};
767
68a3c043 768static __init void rx51_gpio_init(void)
589541c0 769{
68a3c043 770 gpiod_add_lookup_table(&rx51_fmtx_gpios_table);
589541c0
JN		 771}
772
ffe7f95b
LL		 773static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
774{
775 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 776 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 777 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 778
ffe7f95b
LL		 779 return 0;
780}
781
782static struct twl4030_gpio_platform_data rx51_gpio_data = {
ffe7f95b
LL		 783 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
784 | BIT(4) | BIT(5)
785 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
786 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
787 | BIT(16) | BIT(17) ,
788 .setup = rx51_twlgpio_setup,
789};
790
9312fffb
AK		 791static struct twl4030_ins sleep_on_seq[] __initdata = {
792/*
3c684e84 793 * Turn off everything
9312fffb 794 */
3c684e84 795 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 796};
797
798static struct twl4030_script sleep_on_script __initdata = {
799 .script = sleep_on_seq,
800 .size = ARRAY_SIZE(sleep_on_seq),
801 .flags = TWL4030_SLEEP_SCRIPT,
802};
803
804static struct twl4030_ins wakeup_seq[] __initdata = {
805/*
3c684e84 806 * Reenable everything
9312fffb 807 */
3c684e84 808 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 809};
810
811static struct twl4030_script wakeup_script __initdata = {
812 .script = wakeup_seq,
813 .size = ARRAY_SIZE(wakeup_seq),
814 .flags = TWL4030_WAKEUP12_SCRIPT,
815};
816
817static struct twl4030_ins wakeup_p3_seq[] __initdata = {
818/*
3c684e84 819 * Reenable everything
9312fffb 820 */
3c684e84 821 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 822};
823
824static struct twl4030_script wakeup_p3_script __initdata = {
825 .script = wakeup_p3_seq,
826 .size = ARRAY_SIZE(wakeup_p3_seq),
827 .flags = TWL4030_WAKEUP3_SCRIPT,
828};
829
830static struct twl4030_ins wrst_seq[] __initdata = {
831/*
832 * Reset twl4030.
833 * Reset VDD1 regulator.
834 * Reset VDD2 regulator.
835 * Reset VPLL1 regulator.
836 * Enable sysclk output.
837 * Reenable twl4030.
838 */
839 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
840 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
841 0x13},
9312fffb
AK		 842 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
843 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
844 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
845 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 846 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 847 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
848};
849
850static struct twl4030_script wrst_script __initdata = {
851 .script = wrst_seq,
852 .size = ARRAY_SIZE(wrst_seq),
853 .flags = TWL4030_WRST_SCRIPT,
854};
855
856static struct twl4030_script *twl4030_scripts[] __initdata = {
857 /* wakeup12 script should be loaded before sleep script, otherwise a
858 board might hit retention before loading of wakeup script is
859 completed. This can cause boot failures depending on timing issues.
860 */
861 &wakeup_script,
862 &sleep_on_script,
863 &wakeup_p3_script,
864 &wrst_script,
865};
866
867static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 868 { .resource = RES_VDD1, .devgroup = -1,
869 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
870 .remap_sleep = RES_STATE_OFF
871 },
872 { .resource = RES_VDD2, .devgroup = -1,
873 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
874 .remap_sleep = RES_STATE_OFF
875 },
876 { .resource = RES_VPLL1, .devgroup = -1,
877 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
878 .remap_sleep = RES_STATE_OFF
879 },
880 { .resource = RES_VPLL2, .devgroup = -1,
881 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
882 },
883 { .resource = RES_VAUX1, .devgroup = -1,
884 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
885 },
886 { .resource = RES_VAUX2, .devgroup = -1,
887 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
888 },
889 { .resource = RES_VAUX3, .devgroup = -1,
890 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
891 },
892 { .resource = RES_VAUX4, .devgroup = -1,
893 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
894 },
895 { .resource = RES_VMMC1, .devgroup = -1,
896 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
897 },
898 { .resource = RES_VMMC2, .devgroup = -1,
899 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
900 },
901 { .resource = RES_VDAC, .devgroup = -1,
902 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
903 },
904 { .resource = RES_VSIM, .devgroup = -1,
905 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
906 },
907 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
908 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
909 },
910 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
911 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
912 },
913 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
914 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
915 },
916 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
917 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
918 },
919 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
920 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
921 },
922 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
923 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
924 },
925 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
926 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
927 },
928 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
929 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
930 },
931 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
932 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
933 },
934 { .resource = RES_32KCLKOUT, .devgroup = -1,
935 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
936 },
937 { .resource = RES_RESET, .devgroup = -1,
938 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
939 },
d7ac829f 940 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK		 941 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
942 },
9312fffb
AK		 943 { 0, 0},
944};
945
946static struct twl4030_power_data rx51_t2scripts_data __initdata = {
947 .scripts = twl4030_scripts,
948 .num = ARRAY_SIZE(twl4030_scripts),
949 .resource_config = twl4030_rconfig,
950};
951
8c3d4534 952static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK		 953 .coexist = 0,
954};
955
8c3d4534 956static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK		 957 .audio_mclk = 26000000,
958 .vibra = &rx51_vibra_data,
959};
9312fffb 960
9312fffb 961static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 962 /* platform_data for children goes here */
963 .gpio = &rx51_gpio_data,
964 .keypad = &rx51_kp_data,
9312fffb 965 .power = &rx51_t2scripts_data,
4ae6df5e 966 .audio = &rx51_audio_data,
ffe7f95b
LL		 967
968 .vaux1 = &rx51_vaux1,
969 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 970 .vaux4 = &rx51_vaux4,
971 .vmmc1 = &rx51_vmmc1,
094fc559
KJ		 972 .vpll1 = &rx51_vpll1,
973 .vpll2 = &rx51_vpll2,
ffe7f95b 974 .vsim = &rx51_vsim,
094fc559
KJ		 975 .vintana1 = &rx51_vintana1,
976 .vintana2 = &rx51_vintana2,
977 .vintdig = &rx51_vintdig,
4cfcaef1 978 .vio = &rx51_vio,
ffe7f95b
LL		 979};
980
f0c61d3d 981static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN		 982 .power_gpio = 98,
983};
984
f0fba2ad
LG		 985/* Audio setup data */
986static struct aic3x_setup_data rx51_aic34_setup = {
987 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
988 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
989};
990
e4862f2f 991static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG		 992 .setup = &rx51_aic34_setup,
993 .gpio_reset = 60,
994};
995
caeeb4aa
JN		 996static struct aic3x_pdata rx51_aic3x_data2 = {
997 .gpio_reset = 60,
998};
999
99d2fae9 1000#if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713)
68a3c043
SR		 1001static struct si4713_platform_data rx51_si4713_platform_data = {
1002 .is_platform_device = true
1003};
99d2fae9 1004#endif
68a3c043 1005
dabe929b 1006static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
68a3c043
SR		 1007#if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713)
1008 {
1009 I2C_BOARD_INFO("si4713", 0x63),
1010 .platform_data = &rx51_si4713_platform_data,
1011 },
1012#endif
dabe929b
JN		 1013 {
1014 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 1015 .platform_data = &rx51_aic3x_data,
dabe929b 1016 },
caeeb4aa
JN		 1017 {
1018 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1019 .platform_data = &rx51_aic3x_data2,
1020 },
70b5d737
MN		 1021#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1022 {
1023 I2C_BOARD_INFO("tsl2563", 0x29),
1024 .platform_data = &rx51_tsl2563_platform_data,
1025 },
eeada9e8
AP		 1026#endif
1027#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1028 {
1029 I2C_BOARD_INFO("lp5523", 0x32),
1030 .platform_data = &rx51_lp5523_platform_data,
1031 },
70b5d737 1032#endif
d77711aa
PR		 1033 {
1034 I2C_BOARD_INFO("bq27200", 0x55),
1035 },
64d06691
JN		 1036 {
1037 I2C_BOARD_INFO("tpa6130a2", 0x60),
1038 .platform_data = &rx51_tpa6130a2_data,
1039 }
dabe929b
JN		 1040};
1041
3b511201
AP		 1042static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1043#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1044 {
1045 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1046 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP		 1047 },
1048#endif
1049};
1050
ffe7f95b
LL		 1051static int __init rx51_i2c_init(void)
1052{
68a3c043
SR		 1053#if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713)
1054 int err;
1055#endif
1056
f52eeee8 1057 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1058 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1059 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 1060 /* Only older boards use VMMC2 for internal MMC */
1061 rx51_vmmc2.num_consumer_supplies--;
1062 } else {
f52eeee8 1063 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1064 }
4cfcaef1 1065 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1066 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU		 1067 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1068 TWL_COMMON_REGULATOR_VDAC);
1069
1070 rx51_twldata.vdac->constraints.apply_uV = true;
1071 rx51_twldata.vdac->constraints.name = "VDAC";
1072
7d7e1eba 1073 omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
68a3c043
SR		 1074#if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713)
1075 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
1076 if (err) {
1077 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
1078 return err;
1079 }
1080 rx51_peripherals_i2c_board_info_2[0].irq = gpio_to_irq(RX51_FMTX_IRQ);
1081#endif
dabe929b
JN		 1082 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1083 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL		 1084#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1085 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1086 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1087#endif
3b511201
AP		 1088 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1089 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL		 1090 return 0;
1091}
1092
aa62e90f
JY		 1093#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1094 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1095
1096static struct mtd_partition onenand_partitions[] = {
1097 {
1098 .name = "bootloader",
1099 .offset = 0,
1100 .size = 0x20000,
1101 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1102 },
1103 {
1104 .name = "config",
1105 .offset = MTDPART_OFS_APPEND,
1106 .size = 0x60000,
1107 },
1108 {
1109 .name = "log",
1110 .offset = MTDPART_OFS_APPEND,
1111 .size = 0x40000,
1112 },
1113 {
1114 .name = "kernel",
1115 .offset = MTDPART_OFS_APPEND,
1116 .size = 0x200000,
1117 },
1118 {
1119 .name = "initfs",
1120 .offset = MTDPART_OFS_APPEND,
1121 .size = 0x200000,
1122 },
1123 {
1124 .name = "rootfs",
1125 .offset = MTDPART_OFS_APPEND,
1126 .size = MTDPART_SIZ_FULL,
1127 },
1128};
1129
5403187f
AK		 1130static struct omap_onenand_platform_data board_onenand_data[] = {
1131 {
1132 .cs = 0,
1133 .gpio_irq = 65,
1134 .parts = onenand_partitions,
1135 .nr_parts = ARRAY_SIZE(onenand_partitions),
1136 .flags = ONENAND_SYNC_READWRITE,
1137 }
aa62e90f 1138};
aa62e90f 1139#endif
ffe7f95b 1140
bc593f5d 1141static struct gpio rx51_wl1251_gpios[] __initdata = {
bc593f5d
IG		 1142 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1143};
1144
a24e61a9
KV		 1145static void __init rx51_init_wl1251(void)
1146{
1147 int irq, ret;
1148
bc593f5d
IG		 1149 ret = gpio_request_array(rx51_wl1251_gpios,
1150 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV		 1151 if (ret < 0)
1152 goto error;
1153
a24e61a9
KV		 1154 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1155 if (irq < 0)
1156 goto err_irq;
1157
1d207cd3 1158 wl1251_pdata.power_gpio = RX51_WL1251_POWER_GPIO;
a24e61a9
KV		 1159 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1160
1161 return;
1162
1163err_irq:
1164 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9
KV		 1165error:
1166 printk(KERN_ERR "wl1251 board initialisation failed\n");
1d207cd3 1167 wl1251_pdata.power_gpio = -1;
a24e61a9
KV		 1168
1169 /*
1170 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1171 * set_power is null, and wl1251_probe() will fail.
1172 */
1173}
1174
3dad5356
AK		 1175static struct tsc2005_platform_data tsc2005_pdata = {
1176 .ts_pressure_max = 2048,
1177 .ts_pressure_fudge = 2,
1178 .ts_x_max = 4096,
1179 .ts_x_fudge = 4,
1180 .ts_y_max = 4096,
1181 .ts_y_fudge = 7,
1182 .ts_x_plate_ohm = 280,
1183 .esd_timeout_ms = 8000,
1184};
1185
d4860ebe
VZ		 1186static struct gpio rx51_tsc2005_gpios[] __initdata = {
1187 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1188 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1189};
1190
3dad5356
AK		 1191static void rx51_tsc2005_set_reset(bool enable)
1192{
1193 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1194}
1195
1196static void __init rx51_init_tsc2005(void)
1197{
1198 int r;
1199
d4860ebe
VZ		 1200 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1201 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1202
d4860ebe
VZ		 1203 r = gpio_request_array(rx51_tsc2005_gpios,
1204 ARRAY_SIZE(rx51_tsc2005_gpios));
1205 if (r < 0) {
1206 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1207 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1208 return;
3dad5356 1209 }
d4860ebe
VZ		 1210
1211 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL		 1212 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1213 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK		 1214}
1215
8453c5ca
TL		 1216#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
1217static struct pwm_omap_dmtimer_pdata __maybe_unused pwm_dmtimer_pdata = {
1218 .request_by_node = omap_dm_timer_request_by_node,
1219 .request_specific = omap_dm_timer_request_specific,
1220 .request = omap_dm_timer_request,
1221 .set_source = omap_dm_timer_set_source,
1222 .get_irq = omap_dm_timer_get_irq,
1223 .set_int_enable = omap_dm_timer_set_int_enable,
1224 .set_int_disable = omap_dm_timer_set_int_disable,
1225 .free = omap_dm_timer_free,
1226 .enable = omap_dm_timer_enable,
1227 .disable = omap_dm_timer_disable,
1228 .get_fclk = omap_dm_timer_get_fclk,
1229 .start = omap_dm_timer_start,
1230 .stop = omap_dm_timer_stop,
1231 .set_load = omap_dm_timer_set_load,
1232 .set_match = omap_dm_timer_set_match,
1233 .set_pwm = omap_dm_timer_set_pwm,
1234 .set_prescaler = omap_dm_timer_set_prescaler,
1235 .read_counter = omap_dm_timer_read_counter,
1236 .write_counter = omap_dm_timer_write_counter,
1237 .read_status = omap_dm_timer_read_status,
1238 .write_status = omap_dm_timer_write_status,
1239};
1240#endif
1241
322c183c
TK		 1242#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
1243static struct lirc_rx51_platform_data rx51_lirc_data = {
1244 .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
1245 .pwm_timer = 9, /* Use GPT 9 for CIR */
8453c5ca
TL		 1246#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
1247 .dmtimer = &pwm_dmtimer_pdata,
1248#endif
1249
322c183c
TK		 1250};
1251
1252static struct platform_device rx51_lirc_device = {
1253 .name = "lirc_rx51",
1254 .id = -1,
1255 .dev = {
1256 .platform_data = &rx51_lirc_data,
1257 },
1258};
1259
1260static void __init rx51_init_lirc(void)
1261{
1262 platform_device_register(&rx51_lirc_device);
1263}
1264#else
1265static void __init rx51_init_lirc(void)
1266{
1267}
1268#endif
1269
749a34b3
PR		 1270static struct platform_device madc_hwmon = {
1271 .name = "twl4030_madc_hwmon",
1272 .id = -1,
1273};
1274
1275static void __init rx51_init_twl4030_hwmon(void)
1276{
1277 platform_device_register(&madc_hwmon);
1278}
1279
d2065e2b
PR		 1280static struct platform_device omap3_rom_rng_device = {
1281 .name = "omap3-rom-rng",
1282 .id = -1,
1283 .dev = {
1284 .platform_data = rx51_secure_rng_call,
1285 },
1286};
1287
1288static void __init rx51_init_omap3_rom_rng(void)
1289{
1290 if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
448f8bc6 1291 pr_info("RX-51: Registering OMAP3 HWRNG device\n");
d2065e2b
PR		 1292 platform_device_register(&omap3_rom_rng_device);
1293 }
1294}
1295
ffe7f95b
LL		 1296void __init rx51_peripherals_init(void)
1297{
68a3c043 1298 rx51_gpio_init();
ffe7f95b 1299 rx51_i2c_init();
094fc559 1300 regulator_has_full_constraints();
5403187f 1301 gpmc_onenand_init(board_onenand_data);
f014ee32 1302 rx51_add_gpio_keys();
a24e61a9 1303 rx51_init_wl1251();
3dad5356 1304 rx51_init_tsc2005();
322c183c 1305 rx51_init_lirc();
a24e61a9
KV		 1306 spi_register_board_info(rx51_peripherals_spi_board_info,
1307 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC		 1308
1309 partition = omap_mux_get("core");
1310 if (partition)
3b972bf0 1311 omap_hsmmc_init(mmc);
112485e9 1312
10299e2e 1313 rx51_charger_init();
749a34b3 1314 rx51_init_twl4030_hwmon();
d2065e2b 1315 rx51_init_omap3_rom_rng();
ffe7f95b
LL		 1316}
1317
Linux kernel - Deliverables
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