Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL
3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL
21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
5e763d29 26#include <linux/mmc/host.h>
10299e2e 27#include <linux/power/isp1704_charger.h>
2203747c
AB
28#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <linux/platform_data/mtd-onenand-omap2.h>
30
9f97da78 31#include <asm/system_info.h>
ffe7f95b 32
4e65331c 33#include "common.h"
45c3eb7d 34#include <linux/omap-dma.h>
60628152 35#include "gpmc-smc91x.h"
ffe7f95b 36
0a6f98c9 37#include "board-rx51.h"
04aeae77 38
87581fd4 39#include <sound/tlv320aic3x.h>
64d06691 40#include <sound/tpa6130a2-plat.h>
589541c0
JN
41#include <media/radio-si4713.h>
42#include <media/si4713.h>
df4094d2 43#include <linux/platform_data/leds-lp55xx.h>
87581fd4 44
9c2251dd 45#include <linux/platform_data/tsl2563.h>
3b511201 46#include <linux/lis3lv02d.h>
70b5d737 47
2320dc6f
TV
48#include <video/omap-panel-data.h>
49
322c183c
TK
50#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
51#include <media/ir-rx51.h>
52#endif
53
4896e394 54#include "mux.h"
1d5aef49 55#include "omap-pm.h"
d02a900b 56#include "hsmmc.h"
fbd8071c 57#include "common-board-devices.h"
99f0b8d6 58#include "gpmc.h"
b6ab13e7 59#include "gpmc-onenand.h"
ffe7f95b 60
f52eeee8
AH
61#define SYSTEM_REV_B_USES_VAUX3 0x1699
62#define SYSTEM_REV_S_USES_VAUX3 0x8
63
a24e61a9
KV
64#define RX51_WL1251_POWER_GPIO 87
65#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN
66#define RX51_FMTX_RESET_GPIO 163
67#define RX51_FMTX_IRQ 53
eeada9e8 68#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 69
10299e2e
KJ
70#define RX51_USB_TRANSCEIVER_RST_GPIO 67
71
3dad5356
AK
72#define RX51_TSC2005_RESET_GPIO 104
73#define RX51_TSC2005_IRQ_GPIO 100
74
3b511201
AP
75#define LIS302_IRQ1_GPIO 181
76#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
77
e65f131a 78/* List all SPI devices here. Note that the list/probe order seems to matter! */
a24e61a9
KV
79enum {
80 RX51_SPI_WL1251,
6996e7ff 81 RX51_SPI_TSC2005, /* Touch Controller */
e65f131a 82 RX51_SPI_MIPID, /* LCD panel */
a24e61a9
KV
83};
84
85static struct wl12xx_platform_data wl1251_pdata;
3dad5356 86static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 87
3b511201
AP
88#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
89static int lis302_setup(void)
90{
91 int err;
92 int irq1 = LIS302_IRQ1_GPIO;
93 int irq2 = LIS302_IRQ2_GPIO;
94
95 /* gpio for interrupt pin 1 */
96 err = gpio_request(irq1, "lis3lv02dl_irq1");
97 if (err) {
98 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
99 goto out;
100 }
101
102 /* gpio for interrupt pin 2 */
103 err = gpio_request(irq2, "lis3lv02dl_irq2");
104 if (err) {
105 gpio_free(irq1);
106 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
107 goto out;
108 }
109
110 gpio_direction_input(irq1);
111 gpio_direction_input(irq2);
112
113out:
114 return err;
115}
116
117static int lis302_release(void)
118{
119 gpio_free(LIS302_IRQ1_GPIO);
120 gpio_free(LIS302_IRQ2_GPIO);
121
122 return 0;
123}
124
125static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
126 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
127 LIS3_CLICK_SINGLE_Z,
128 /* Limits are 0.5g * value */
129 .click_thresh_x = 8,
130 .click_thresh_y = 8,
131 .click_thresh_z = 10,
132 /* Click must be longer than time limit */
133 .click_time_limit = 9,
134 /* Kind of debounce filter */
135 .click_latency = 50,
136
137 /* Limits for all axis. millig-value / 18 to get HW values */
138 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
139 .wakeup_thresh = 800 / 18,
140 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
141 .wakeup_thresh2 = 900 / 18,
142
143 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
144
145 /* Interrupt line 2 for click detection, line 1 for thresholds */
146 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
147
148 .axis_x = LIS3_DEV_X,
149 .axis_y = LIS3_INV_DEV_Y,
150 .axis_z = LIS3_INV_DEV_Z,
151 .setup_resources = lis302_setup,
152 .release_resources = lis302_release,
153 .st_min_limits = {-32, 3, 3},
154 .st_max_limits = {-3, 32, 32},
3b511201
AP
155};
156#endif
157
70b5d737
MN
158#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
159static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
160 .cover_comp_gain = 16,
161};
162#endif
163
eeada9e8 164#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
df4094d2 165static struct lp55xx_led_config rx51_lp5523_led_config[] = {
eeada9e8 166 {
1e7bf5e3 167 .name = "lp5523:kb1",
eeada9e8
AP
168 .chan_nr = 0,
169 .led_current = 50,
170 }, {
1e7bf5e3 171 .name = "lp5523:kb2",
eeada9e8
AP
172 .chan_nr = 1,
173 .led_current = 50,
174 }, {
1e7bf5e3 175 .name = "lp5523:kb3",
eeada9e8
AP
176 .chan_nr = 2,
177 .led_current = 50,
178 }, {
1e7bf5e3 179 .name = "lp5523:kb4",
eeada9e8
AP
180 .chan_nr = 3,
181 .led_current = 50,
182 }, {
1e7bf5e3 183 .name = "lp5523:b",
eeada9e8
AP
184 .chan_nr = 4,
185 .led_current = 50,
186 }, {
1e7bf5e3 187 .name = "lp5523:g",
eeada9e8
AP
188 .chan_nr = 5,
189 .led_current = 50,
190 }, {
1e7bf5e3 191 .name = "lp5523:r",
eeada9e8
AP
192 .chan_nr = 6,
193 .led_current = 50,
194 }, {
1e7bf5e3 195 .name = "lp5523:kb5",
eeada9e8
AP
196 .chan_nr = 7,
197 .led_current = 50,
198 }, {
1e7bf5e3 199 .name = "lp5523:kb6",
eeada9e8
AP
200 .chan_nr = 8,
201 .led_current = 50,
202 }
203};
204
205static int rx51_lp5523_setup(void)
206{
207 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
208 "lp5523_enable");
209}
210
211static void rx51_lp5523_release(void)
212{
213 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
214}
215
216static void rx51_lp5523_enable(bool state)
217{
218 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
219}
220
df4094d2 221static struct lp55xx_platform_data rx51_lp5523_platform_data = {
eeada9e8
AP
222 .led_config = rx51_lp5523_led_config,
223 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
df4094d2 224 .clock_mode = LP55XX_CLOCK_AUTO,
eeada9e8
AP
225 .setup_resources = rx51_lp5523_setup,
226 .release_resources = rx51_lp5523_release,
227 .enable = rx51_lp5523_enable,
228};
229#endif
230
2320dc6f
TV
231#define RX51_LCD_RESET_GPIO 90
232
233static struct panel_acx565akm_platform_data acx_pdata = {
234 .name = "lcd",
235 .source = "sdi.0",
236 .reset_gpio = RX51_LCD_RESET_GPIO,
237 .datapairs = 2,
238};
239
a24e61a9
KV
240static struct omap2_mcspi_device_config wl1251_mcspi_config = {
241 .turbo_mode = 0,
a24e61a9
KV
242};
243
03e11104
RQ
244static struct omap2_mcspi_device_config mipid_mcspi_config = {
245 .turbo_mode = 0,
03e11104
RQ
246};
247
6996e7ff
RQ
248static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
249 .turbo_mode = 0,
6996e7ff
RQ
250};
251
a24e61a9
KV
252static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
253 [RX51_SPI_WL1251] = {
254 .modalias = "wl1251",
255 .bus_num = 4,
256 .chip_select = 0,
257 .max_speed_hz = 48000000,
860fc976 258 .mode = SPI_MODE_3,
a24e61a9
KV
259 .controller_data = &wl1251_mcspi_config,
260 .platform_data = &wl1251_pdata,
261 },
03e11104
RQ
262 [RX51_SPI_MIPID] = {
263 .modalias = "acx565akm",
264 .bus_num = 1,
265 .chip_select = 2,
266 .max_speed_hz = 6000000,
267 .controller_data = &mipid_mcspi_config,
2320dc6f 268 .platform_data = &acx_pdata,
03e11104 269 },
6996e7ff
RQ
270 [RX51_SPI_TSC2005] = {
271 .modalias = "tsc2005",
272 .bus_num = 1,
273 .chip_select = 0,
6996e7ff
RQ
274 .max_speed_hz = 6000000,
275 .controller_data = &tsc2005_mcspi_config,
3dad5356 276 .platform_data = &tsc2005_pdata,
6996e7ff 277 },
a24e61a9
KV
278};
279
7605c0b0
PR
280static struct platform_device rx51_battery_device = {
281 .name = "rx51-battery",
282 .id = -1,
283};
284
10299e2e
KJ
285static void rx51_charger_set_power(bool on)
286{
287 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
288}
289
290static struct isp1704_charger_data rx51_charger_data = {
291 .set_power = rx51_charger_set_power,
292};
293
fd0964c5 294static struct platform_device rx51_charger_device = {
10299e2e
KJ
295 .name = "isp1704_charger",
296 .dev = {
297 .platform_data = &rx51_charger_data,
298 },
fd0964c5
HK
299};
300
10299e2e
KJ
301static void __init rx51_charger_init(void)
302{
303 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 304 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e 305
7605c0b0 306 platform_device_register(&rx51_battery_device);
10299e2e
KJ
307 platform_device_register(&rx51_charger_device);
308}
309
f014ee32
JN
310#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
311
312#define RX51_GPIO_CAMERA_LENS_COVER 110
313#define RX51_GPIO_CAMERA_FOCUS 68
314#define RX51_GPIO_CAMERA_CAPTURE 69
315#define RX51_GPIO_KEYPAD_SLIDE 71
316#define RX51_GPIO_LOCK_BUTTON 113
317#define RX51_GPIO_PROXIMITY 89
318
319#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
320
321static struct gpio_keys_button rx51_gpio_keys[] = {
322 {
323 .desc = "Camera Lens Cover",
324 .type = EV_SW,
325 .code = SW_CAMERA_LENS_COVER,
326 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
327 .active_low = 1,
328 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
329 }, {
330 .desc = "Camera Focus",
331 .type = EV_KEY,
332 .code = KEY_CAMERA_FOCUS,
333 .gpio = RX51_GPIO_CAMERA_FOCUS,
334 .active_low = 1,
335 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
336 }, {
337 .desc = "Camera Capture",
338 .type = EV_KEY,
339 .code = KEY_CAMERA,
340 .gpio = RX51_GPIO_CAMERA_CAPTURE,
341 .active_low = 1,
342 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
343 }, {
344 .desc = "Lock Button",
345 .type = EV_KEY,
346 .code = KEY_SCREENLOCK,
347 .gpio = RX51_GPIO_LOCK_BUTTON,
348 .active_low = 1,
349 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
350 }, {
351 .desc = "Keypad Slide",
352 .type = EV_SW,
353 .code = SW_KEYPAD_SLIDE,
354 .gpio = RX51_GPIO_KEYPAD_SLIDE,
355 .active_low = 1,
356 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
357 }, {
358 .desc = "Proximity Sensor",
359 .type = EV_SW,
360 .code = SW_FRONT_PROXIMITY,
361 .gpio = RX51_GPIO_PROXIMITY,
362 .active_low = 0,
363 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
364 }
365};
366
367static struct gpio_keys_platform_data rx51_gpio_keys_data = {
368 .buttons = rx51_gpio_keys,
369 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
370};
371
372static struct platform_device rx51_gpio_keys_device = {
373 .name = "gpio-keys",
374 .id = -1,
375 .dev = {
376 .platform_data = &rx51_gpio_keys_data,
377 },
378};
379
380static void __init rx51_add_gpio_keys(void)
381{
382 platform_device_register(&rx51_gpio_keys_device);
383}
384#else
385static void __init rx51_add_gpio_keys(void)
386{
387}
388#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
389
bead4375 390static uint32_t board_keymap[] = {
3fea6026
DT
391 /*
392 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
393 * connected to the ground" matrix state.
394 */
ffe7f95b 395 KEY(0, 0, KEY_Q),
acf442dc
AK
396 KEY(0, 1, KEY_O),
397 KEY(0, 2, KEY_P),
398 KEY(0, 3, KEY_COMMA),
399 KEY(0, 4, KEY_BACKSPACE),
400 KEY(0, 6, KEY_A),
401 KEY(0, 7, KEY_S),
3fea6026 402
acf442dc 403 KEY(1, 0, KEY_W),
ffe7f95b 404 KEY(1, 1, KEY_D),
acf442dc
AK
405 KEY(1, 2, KEY_F),
406 KEY(1, 3, KEY_G),
407 KEY(1, 4, KEY_H),
408 KEY(1, 5, KEY_J),
409 KEY(1, 6, KEY_K),
410 KEY(1, 7, KEY_L),
3fea6026 411
acf442dc
AK
412 KEY(2, 0, KEY_E),
413 KEY(2, 1, KEY_DOT),
ffe7f95b 414 KEY(2, 2, KEY_UP),
acf442dc
AK
415 KEY(2, 3, KEY_ENTER),
416 KEY(2, 5, KEY_Z),
417 KEY(2, 6, KEY_X),
418 KEY(2, 7, KEY_C),
3fea6026
DT
419 KEY(2, 8, KEY_F9),
420
acf442dc
AK
421 KEY(3, 0, KEY_R),
422 KEY(3, 1, KEY_V),
423 KEY(3, 2, KEY_B),
ffe7f95b 424 KEY(3, 3, KEY_N),
acf442dc
AK
425 KEY(3, 4, KEY_M),
426 KEY(3, 5, KEY_SPACE),
427 KEY(3, 6, KEY_SPACE),
428 KEY(3, 7, KEY_LEFT),
3fea6026 429
acf442dc
AK
430 KEY(4, 0, KEY_T),
431 KEY(4, 1, KEY_DOWN),
432 KEY(4, 2, KEY_RIGHT),
ffe7f95b 433 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK
434 KEY(4, 5, KEY_RIGHTALT),
435 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 436 KEY(4, 8, KEY_F10),
3fea6026 437
acf442dc 438 KEY(5, 0, KEY_Y),
2e65a207 439 KEY(5, 8, KEY_F11),
3fea6026 440
acf442dc 441 KEY(6, 0, KEY_U),
3fea6026 442
acf442dc
AK
443 KEY(7, 0, KEY_I),
444 KEY(7, 1, KEY_F7),
445 KEY(7, 2, KEY_F8),
ffe7f95b
LL
446};
447
4f543332
TL
448static struct matrix_keymap_data board_map_data = {
449 .keymap = board_keymap,
450 .keymap_size = ARRAY_SIZE(board_keymap),
451};
452
ffe7f95b 453static struct twl4030_keypad_data rx51_kp_data = {
4f543332 454 .keymap_data = &board_map_data,
ffe7f95b
LL
455 .rows = 8,
456 .cols = 8,
ffe7f95b
LL
457 .rep = 1,
458};
459
ce6f0016
AH
460/* Enable input logic and pull all lines up when eMMC is on. */
461static struct omap_board_mux rx51_mmc2_on_mux[] = {
462 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
463 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
464 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
465 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
466 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
467 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
468 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
469 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
470 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
471 { .reg_offset = OMAP_MUX_TERMINATOR },
472};
473
474/* Disable input logic and pull all lines down when eMMC is off. */
475static struct omap_board_mux rx51_mmc2_off_mux[] = {
476 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
477 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
478 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
479 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
480 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
481 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
482 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
483 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
484 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
485 { .reg_offset = OMAP_MUX_TERMINATOR },
486};
487
112485e9
BC
488static struct omap_mux_partition *partition;
489
ce6f0016
AH
490/*
491 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
492 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
493 */
494static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
495{
496 if (power_on)
112485e9 497 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 498 else
112485e9 499 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH
500}
501
68ff0423 502static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL
503 {
504 .name = "external",
505 .mmc = 1,
3a63833e 506 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL
507 .cover_only = true,
508 .gpio_cd = 160,
509 .gpio_wp = -EINVAL,
5e763d29 510 .power_saving = true,
ffe7f95b
LL
511 },
512 {
513 .name = "internal",
514 .mmc = 2,
3a63833e
SG
515 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
516 /* See also rx51_mmc2_remux */
ffe7f95b
LL
517 .gpio_cd = -EINVAL,
518 .gpio_wp = -EINVAL,
5e763d29
AH
519 .nonremovable = true,
520 .power_saving = true,
ce6f0016 521 .remux = rx51_mmc2_remux,
ffe7f95b
LL
522 },
523 {} /* Terminator */
524};
525
786b01a8
OD
526static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
527 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
528};
ffe7f95b 529
664a41b8
LT
530static struct regulator_consumer_supply rx51_vaux2_supply[] = {
531 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
532};
75ccf268 533
786b01a8
OD
534static struct regulator_consumer_supply rx51_vaux3_supply[] = {
535 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
536};
ffe7f95b 537
786b01a8
OD
538static struct regulator_consumer_supply rx51_vsim_supply[] = {
539 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
540};
ffe7f95b 541
4cfcaef1
JN
542static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
543 /* tlv320aic3x analog supplies */
5c7d9bbe
JN
544 REGULATOR_SUPPLY("AVDD", "2-0018"),
545 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN
546 REGULATOR_SUPPLY("AVDD", "2-0019"),
547 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN
548 /* tpa6130a2 */
549 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 550 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 551 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN
552};
553
554static struct regulator_consumer_supply rx51_vio_supplies[] = {
555 /* tlv320aic3x digital supplies */
5c7d9bbe
JN
556 REGULATOR_SUPPLY("IOVDD", "2-0018"),
557 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN
558 REGULATOR_SUPPLY("IOVDD", "2-0019"),
559 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN
560 /* Si4713 IO supply */
561 REGULATOR_SUPPLY("vio", "2-0063"),
17fd8cdb
AK
562 /* lis3lv02d */
563 REGULATOR_SUPPLY("Vdd_IO", "3-001d"),
4cfcaef1
JN
564};
565
0581b52e 566static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 567 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
3d85f548 568 REGULATOR_SUPPLY("vdds_sdi", "omapdss_sdi.0"),
589541c0
JN
569 /* Si4713 supply */
570 REGULATOR_SUPPLY("vdd", "2-0063"),
17fd8cdb
AK
571 /* lis3lv02d */
572 REGULATOR_SUPPLY("Vdd", "3-001d"),
0581b52e
RQ
573};
574
ffe7f95b
LL
575static struct regulator_init_data rx51_vaux1 = {
576 .constraints = {
577 .name = "V28",
578 .min_uV = 2800000,
579 .max_uV = 2800000,
000d534e 580 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL
581 .valid_modes_mask = REGULATOR_MODE_NORMAL
582 | REGULATOR_MODE_STANDBY,
583 .valid_ops_mask = REGULATOR_CHANGE_MODE
584 | REGULATOR_CHANGE_STATUS,
585 },
0581b52e
RQ
586 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
587 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL
588};
589
590static struct regulator_init_data rx51_vaux2 = {
591 .constraints = {
592 .name = "VCSI",
593 .min_uV = 1800000,
594 .max_uV = 1800000,
595 .valid_modes_mask = REGULATOR_MODE_NORMAL
596 | REGULATOR_MODE_STANDBY,
597 .valid_ops_mask = REGULATOR_CHANGE_MODE
598 | REGULATOR_CHANGE_STATUS,
599 },
664a41b8
LT
600 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
601 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL
602};
603
604/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 605static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL
606 .constraints = {
607 .name = "VCAM_DIG_18",
608 .min_uV = 1800000,
609 .max_uV = 1800000,
610 .apply_uV = true,
611 .valid_modes_mask = REGULATOR_MODE_NORMAL
612 | REGULATOR_MODE_STANDBY,
613 .valid_ops_mask = REGULATOR_CHANGE_MODE
614 | REGULATOR_CHANGE_STATUS,
615 },
616};
617
f52eeee8
AH
618static struct regulator_init_data rx51_vaux3_mmc = {
619 .constraints = {
620 .name = "VMMC2_30",
621 .min_uV = 2800000,
622 .max_uV = 3000000,
623 .apply_uV = true,
624 .valid_modes_mask = REGULATOR_MODE_NORMAL
625 | REGULATOR_MODE_STANDBY,
626 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
627 | REGULATOR_CHANGE_MODE
628 | REGULATOR_CHANGE_STATUS,
629 },
786b01a8
OD
630 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
631 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH
632};
633
ffe7f95b
LL
634static struct regulator_init_data rx51_vaux4 = {
635 .constraints = {
636 .name = "VCAM_ANA_28",
637 .min_uV = 2800000,
638 .max_uV = 2800000,
639 .apply_uV = true,
640 .valid_modes_mask = REGULATOR_MODE_NORMAL
641 | REGULATOR_MODE_STANDBY,
642 .valid_ops_mask = REGULATOR_CHANGE_MODE
643 | REGULATOR_CHANGE_STATUS,
644 },
645};
646
647static struct regulator_init_data rx51_vmmc1 = {
648 .constraints = {
649 .min_uV = 1850000,
650 .max_uV = 3150000,
651 .valid_modes_mask = REGULATOR_MODE_NORMAL
652 | REGULATOR_MODE_STANDBY,
653 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
654 | REGULATOR_CHANGE_MODE
655 | REGULATOR_CHANGE_STATUS,
656 },
786b01a8
OD
657 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
658 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL
659};
660
661static struct regulator_init_data rx51_vmmc2 = {
662 .constraints = {
f2add1de
JN
663 .name = "V28_A",
664 .min_uV = 2800000,
665 .max_uV = 3000000,
2827411e 666 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL
667 .apply_uV = true,
668 .valid_modes_mask = REGULATOR_MODE_NORMAL
669 | REGULATOR_MODE_STANDBY,
670 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
671 | REGULATOR_CHANGE_MODE
672 | REGULATOR_CHANGE_STATUS,
673 },
4cfcaef1
JN
674 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
675 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL
676};
677
094fc559
KJ
678static struct regulator_init_data rx51_vpll1 = {
679 .constraints = {
680 .name = "VPLL",
681 .min_uV = 1800000,
682 .max_uV = 1800000,
683 .apply_uV = true,
684 .always_on = true,
685 .valid_modes_mask = REGULATOR_MODE_NORMAL
686 | REGULATOR_MODE_STANDBY,
687 .valid_ops_mask = REGULATOR_CHANGE_MODE,
688 },
689};
690
691static struct regulator_init_data rx51_vpll2 = {
692 .constraints = {
693 .name = "VSDI_CSI",
694 .min_uV = 1800000,
695 .max_uV = 1800000,
696 .apply_uV = true,
697 .always_on = true,
698 .valid_modes_mask = REGULATOR_MODE_NORMAL
699 | REGULATOR_MODE_STANDBY,
700 .valid_ops_mask = REGULATOR_CHANGE_MODE,
701 },
702};
703
ffe7f95b
LL
704static struct regulator_init_data rx51_vsim = {
705 .constraints = {
706 .name = "VMMC2_IO_18",
707 .min_uV = 1800000,
708 .max_uV = 1800000,
709 .apply_uV = true,
710 .valid_modes_mask = REGULATOR_MODE_NORMAL
711 | REGULATOR_MODE_STANDBY,
712 .valid_ops_mask = REGULATOR_CHANGE_MODE
713 | REGULATOR_CHANGE_STATUS,
714 },
786b01a8
OD
715 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
716 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL
717};
718
4cfcaef1
JN
719static struct regulator_init_data rx51_vio = {
720 .constraints = {
721 .min_uV = 1800000,
722 .max_uV = 1800000,
723 .valid_modes_mask = REGULATOR_MODE_NORMAL
724 | REGULATOR_MODE_STANDBY,
725 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
726 | REGULATOR_CHANGE_MODE
727 | REGULATOR_CHANGE_STATUS,
728 },
729 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
730 .consumer_supplies = rx51_vio_supplies,
731};
732
094fc559
KJ
733static struct regulator_init_data rx51_vintana1 = {
734 .constraints = {
735 .name = "VINTANA1",
736 .min_uV = 1500000,
737 .max_uV = 1500000,
738 .always_on = true,
739 .valid_modes_mask = REGULATOR_MODE_NORMAL
740 | REGULATOR_MODE_STANDBY,
741 .valid_ops_mask = REGULATOR_CHANGE_MODE,
742 },
743};
744
745static struct regulator_init_data rx51_vintana2 = {
746 .constraints = {
747 .name = "VINTANA2",
748 .min_uV = 2750000,
749 .max_uV = 2750000,
750 .apply_uV = true,
751 .always_on = true,
752 .valid_modes_mask = REGULATOR_MODE_NORMAL
753 | REGULATOR_MODE_STANDBY,
754 .valid_ops_mask = REGULATOR_CHANGE_MODE,
755 },
756};
757
758static struct regulator_init_data rx51_vintdig = {
759 .constraints = {
760 .name = "VINTDIG",
761 .min_uV = 1500000,
762 .max_uV = 1500000,
763 .always_on = true,
764 .valid_modes_mask = REGULATOR_MODE_NORMAL
765 | REGULATOR_MODE_STANDBY,
766 .valid_ops_mask = REGULATOR_CHANGE_MODE,
767 },
768};
769
589541c0
JN
770static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
771 .gpio_reset = RX51_FMTX_RESET_GPIO,
772};
773
774static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
775 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
776 .platform_data = &rx51_si4713_i2c_data,
777};
778
779static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
780 .i2c_bus = 2,
781 .subdev_board_info = &rx51_si4713_board_info,
782};
783
12aee6c6 784static struct platform_device rx51_si4713_dev __initdata_or_module = {
589541c0
JN
785 .name = "radio-si4713",
786 .id = -1,
787 .dev = {
788 .platform_data = &rx51_si4713_data,
789 },
790};
791
792static __init void rx51_init_si4713(void)
793{
794 int err;
795
796 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
797 if (err) {
798 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
799 return;
800 }
801 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
802 platform_device_register(&rx51_si4713_dev);
803}
804
ffe7f95b
LL
805static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
806{
807 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 808 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 809 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 810
ffe7f95b
LL
811 return 0;
812}
813
814static struct twl4030_gpio_platform_data rx51_gpio_data = {
ffe7f95b
LL
815 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
816 | BIT(4) | BIT(5)
817 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
818 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
819 | BIT(16) | BIT(17) ,
820 .setup = rx51_twlgpio_setup,
821};
822
9312fffb
AK
823static struct twl4030_ins sleep_on_seq[] __initdata = {
824/*
3c684e84 825 * Turn off everything
9312fffb 826 */
3c684e84 827 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK
828};
829
830static struct twl4030_script sleep_on_script __initdata = {
831 .script = sleep_on_seq,
832 .size = ARRAY_SIZE(sleep_on_seq),
833 .flags = TWL4030_SLEEP_SCRIPT,
834};
835
836static struct twl4030_ins wakeup_seq[] __initdata = {
837/*
3c684e84 838 * Reenable everything
9312fffb 839 */
3c684e84 840 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
841};
842
843static struct twl4030_script wakeup_script __initdata = {
844 .script = wakeup_seq,
845 .size = ARRAY_SIZE(wakeup_seq),
846 .flags = TWL4030_WAKEUP12_SCRIPT,
847};
848
849static struct twl4030_ins wakeup_p3_seq[] __initdata = {
850/*
3c684e84 851 * Reenable everything
9312fffb 852 */
3c684e84 853 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
854};
855
856static struct twl4030_script wakeup_p3_script __initdata = {
857 .script = wakeup_p3_seq,
858 .size = ARRAY_SIZE(wakeup_p3_seq),
859 .flags = TWL4030_WAKEUP3_SCRIPT,
860};
861
862static struct twl4030_ins wrst_seq[] __initdata = {
863/*
864 * Reset twl4030.
865 * Reset VDD1 regulator.
866 * Reset VDD2 regulator.
867 * Reset VPLL1 regulator.
868 * Enable sysclk output.
869 * Reenable twl4030.
870 */
871 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
872 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
873 0x13},
9312fffb
AK
874 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
875 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
876 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
877 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 878 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK
879 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
880};
881
882static struct twl4030_script wrst_script __initdata = {
883 .script = wrst_seq,
884 .size = ARRAY_SIZE(wrst_seq),
885 .flags = TWL4030_WRST_SCRIPT,
886};
887
888static struct twl4030_script *twl4030_scripts[] __initdata = {
889 /* wakeup12 script should be loaded before sleep script, otherwise a
890 board might hit retention before loading of wakeup script is
891 completed. This can cause boot failures depending on timing issues.
892 */
893 &wakeup_script,
894 &sleep_on_script,
895 &wakeup_p3_script,
896 &wrst_script,
897};
898
899static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK
900 { .resource = RES_VDD1, .devgroup = -1,
901 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
902 .remap_sleep = RES_STATE_OFF
903 },
904 { .resource = RES_VDD2, .devgroup = -1,
905 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
906 .remap_sleep = RES_STATE_OFF
907 },
908 { .resource = RES_VPLL1, .devgroup = -1,
909 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
910 .remap_sleep = RES_STATE_OFF
911 },
912 { .resource = RES_VPLL2, .devgroup = -1,
913 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
914 },
915 { .resource = RES_VAUX1, .devgroup = -1,
916 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
917 },
918 { .resource = RES_VAUX2, .devgroup = -1,
919 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
920 },
921 { .resource = RES_VAUX3, .devgroup = -1,
922 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
923 },
924 { .resource = RES_VAUX4, .devgroup = -1,
925 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
926 },
927 { .resource = RES_VMMC1, .devgroup = -1,
928 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
929 },
930 { .resource = RES_VMMC2, .devgroup = -1,
931 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
932 },
933 { .resource = RES_VDAC, .devgroup = -1,
934 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
935 },
936 { .resource = RES_VSIM, .devgroup = -1,
937 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
938 },
939 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
940 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
941 },
942 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
943 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
944 },
945 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
946 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
947 },
948 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
949 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
950 },
951 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
952 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
953 },
954 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
955 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
956 },
957 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
958 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
959 },
960 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
961 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
962 },
963 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
964 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
965 },
966 { .resource = RES_32KCLKOUT, .devgroup = -1,
967 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
968 },
969 { .resource = RES_RESET, .devgroup = -1,
970 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
971 },
d7ac829f 972 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK
973 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
974 },
9312fffb
AK
975 { 0, 0},
976};
977
978static struct twl4030_power_data rx51_t2scripts_data __initdata = {
979 .scripts = twl4030_scripts,
980 .num = ARRAY_SIZE(twl4030_scripts),
981 .resource_config = twl4030_rconfig,
982};
983
8c3d4534 984static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK
985 .coexist = 0,
986};
987
8c3d4534 988static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK
989 .audio_mclk = 26000000,
990 .vibra = &rx51_vibra_data,
991};
9312fffb 992
9312fffb 993static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL
994 /* platform_data for children goes here */
995 .gpio = &rx51_gpio_data,
996 .keypad = &rx51_kp_data,
9312fffb 997 .power = &rx51_t2scripts_data,
4ae6df5e 998 .audio = &rx51_audio_data,
ffe7f95b
LL
999
1000 .vaux1 = &rx51_vaux1,
1001 .vaux2 = &rx51_vaux2,
ffe7f95b
LL
1002 .vaux4 = &rx51_vaux4,
1003 .vmmc1 = &rx51_vmmc1,
094fc559
KJ
1004 .vpll1 = &rx51_vpll1,
1005 .vpll2 = &rx51_vpll2,
ffe7f95b 1006 .vsim = &rx51_vsim,
094fc559
KJ
1007 .vintana1 = &rx51_vintana1,
1008 .vintana2 = &rx51_vintana2,
1009 .vintdig = &rx51_vintdig,
4cfcaef1 1010 .vio = &rx51_vio,
ffe7f95b
LL
1011};
1012
f0c61d3d 1013static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN
1014 .power_gpio = 98,
1015};
1016
f0fba2ad
LG
1017/* Audio setup data */
1018static struct aic3x_setup_data rx51_aic34_setup = {
1019 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
1020 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
1021};
1022
e4862f2f 1023static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG
1024 .setup = &rx51_aic34_setup,
1025 .gpio_reset = 60,
1026};
1027
caeeb4aa
JN
1028static struct aic3x_pdata rx51_aic3x_data2 = {
1029 .gpio_reset = 60,
1030};
1031
dabe929b
JN
1032static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
1033 {
1034 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 1035 .platform_data = &rx51_aic3x_data,
dabe929b 1036 },
caeeb4aa
JN
1037 {
1038 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1039 .platform_data = &rx51_aic3x_data2,
1040 },
70b5d737
MN
1041#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1042 {
1043 I2C_BOARD_INFO("tsl2563", 0x29),
1044 .platform_data = &rx51_tsl2563_platform_data,
1045 },
eeada9e8
AP
1046#endif
1047#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1048 {
1049 I2C_BOARD_INFO("lp5523", 0x32),
1050 .platform_data = &rx51_lp5523_platform_data,
1051 },
70b5d737 1052#endif
d77711aa
PR
1053 {
1054 I2C_BOARD_INFO("bq27200", 0x55),
1055 },
64d06691
JN
1056 {
1057 I2C_BOARD_INFO("tpa6130a2", 0x60),
1058 .platform_data = &rx51_tpa6130a2_data,
1059 }
dabe929b
JN
1060};
1061
3b511201
AP
1062static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1063#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1064 {
1065 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1066 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP
1067 },
1068#endif
1069};
1070
ffe7f95b
LL
1071static int __init rx51_i2c_init(void)
1072{
f52eeee8 1073 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1074 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1075 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN
1076 /* Only older boards use VMMC2 for internal MMC */
1077 rx51_vmmc2.num_consumer_supplies--;
1078 } else {
f52eeee8 1079 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1080 }
4cfcaef1 1081 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1082 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU
1083 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1084 TWL_COMMON_REGULATOR_VDAC);
1085
1086 rx51_twldata.vdac->constraints.apply_uV = true;
1087 rx51_twldata.vdac->constraints.name = "VDAC";
1088
7d7e1eba 1089 omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
dabe929b
JN
1090 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1091 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL
1092#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1093 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1094 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1095#endif
3b511201
AP
1096 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1097 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL
1098 return 0;
1099}
1100
aa62e90f
JY
1101#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1102 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1103
1104static struct mtd_partition onenand_partitions[] = {
1105 {
1106 .name = "bootloader",
1107 .offset = 0,
1108 .size = 0x20000,
1109 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1110 },
1111 {
1112 .name = "config",
1113 .offset = MTDPART_OFS_APPEND,
1114 .size = 0x60000,
1115 },
1116 {
1117 .name = "log",
1118 .offset = MTDPART_OFS_APPEND,
1119 .size = 0x40000,
1120 },
1121 {
1122 .name = "kernel",
1123 .offset = MTDPART_OFS_APPEND,
1124 .size = 0x200000,
1125 },
1126 {
1127 .name = "initfs",
1128 .offset = MTDPART_OFS_APPEND,
1129 .size = 0x200000,
1130 },
1131 {
1132 .name = "rootfs",
1133 .offset = MTDPART_OFS_APPEND,
1134 .size = MTDPART_SIZ_FULL,
1135 },
1136};
1137
5403187f
AK
1138static struct omap_onenand_platform_data board_onenand_data[] = {
1139 {
1140 .cs = 0,
1141 .gpio_irq = 65,
1142 .parts = onenand_partitions,
1143 .nr_parts = ARRAY_SIZE(onenand_partitions),
1144 .flags = ONENAND_SYNC_READWRITE,
1145 }
aa62e90f 1146};
aa62e90f 1147#endif
ffe7f95b 1148
1a48e157
TL
1149#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1150
1151static struct omap_smc91x_platform_data board_smc91x_data = {
1152 .cs = 1,
1153 .gpio_irq = 54,
1154 .gpio_pwrdwn = 86,
1155 .gpio_reset = 164,
1156 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1157};
1158
1159static void __init board_smc91x_init(void)
1160{
4896e394
TL
1161 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1162 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1163 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL
1164
1165 gpmc_smc91x_init(&board_smc91x_data);
1166}
1167
1168#else
1169
1170static inline void board_smc91x_init(void)
1171{
1172}
1173
1174#endif
1175
a24e61a9
KV
1176static void rx51_wl1251_set_power(bool enable)
1177{
1178 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1179}
1180
bc593f5d
IG
1181static struct gpio rx51_wl1251_gpios[] __initdata = {
1182 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1183 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1184};
1185
a24e61a9
KV
1186static void __init rx51_init_wl1251(void)
1187{
1188 int irq, ret;
1189
bc593f5d
IG
1190 ret = gpio_request_array(rx51_wl1251_gpios,
1191 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV
1192 if (ret < 0)
1193 goto error;
1194
a24e61a9
KV
1195 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1196 if (irq < 0)
1197 goto err_irq;
1198
1199 wl1251_pdata.set_power = rx51_wl1251_set_power;
1200 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1201
1202 return;
1203
1204err_irq:
1205 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1206 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV
1207error:
1208 printk(KERN_ERR "wl1251 board initialisation failed\n");
1209 wl1251_pdata.set_power = NULL;
1210
1211 /*
1212 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1213 * set_power is null, and wl1251_probe() will fail.
1214 */
1215}
1216
3dad5356
AK
1217static struct tsc2005_platform_data tsc2005_pdata = {
1218 .ts_pressure_max = 2048,
1219 .ts_pressure_fudge = 2,
1220 .ts_x_max = 4096,
1221 .ts_x_fudge = 4,
1222 .ts_y_max = 4096,
1223 .ts_y_fudge = 7,
1224 .ts_x_plate_ohm = 280,
1225 .esd_timeout_ms = 8000,
1226};
1227
d4860ebe
VZ
1228static struct gpio rx51_tsc2005_gpios[] __initdata = {
1229 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1230 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1231};
1232
3dad5356
AK
1233static void rx51_tsc2005_set_reset(bool enable)
1234{
1235 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1236}
1237
1238static void __init rx51_init_tsc2005(void)
1239{
1240 int r;
1241
d4860ebe
VZ
1242 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1243 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1244
d4860ebe
VZ
1245 r = gpio_request_array(rx51_tsc2005_gpios,
1246 ARRAY_SIZE(rx51_tsc2005_gpios));
1247 if (r < 0) {
1248 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1249 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1250 return;
3dad5356 1251 }
d4860ebe
VZ
1252
1253 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL
1254 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1255 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK
1256}
1257
322c183c
TK
1258#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
1259static struct lirc_rx51_platform_data rx51_lirc_data = {
1260 .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
1261 .pwm_timer = 9, /* Use GPT 9 for CIR */
1262};
1263
1264static struct platform_device rx51_lirc_device = {
1265 .name = "lirc_rx51",
1266 .id = -1,
1267 .dev = {
1268 .platform_data = &rx51_lirc_data,
1269 },
1270};
1271
1272static void __init rx51_init_lirc(void)
1273{
1274 platform_device_register(&rx51_lirc_device);
1275}
1276#else
1277static void __init rx51_init_lirc(void)
1278{
1279}
1280#endif
1281
749a34b3
PR
1282static struct platform_device madc_hwmon = {
1283 .name = "twl4030_madc_hwmon",
1284 .id = -1,
1285};
1286
1287static void __init rx51_init_twl4030_hwmon(void)
1288{
1289 platform_device_register(&madc_hwmon);
1290}
1291
ffe7f95b
LL
1292void __init rx51_peripherals_init(void)
1293{
ffe7f95b 1294 rx51_i2c_init();
094fc559 1295 regulator_has_full_constraints();
5403187f 1296 gpmc_onenand_init(board_onenand_data);
1a48e157 1297 board_smc91x_init();
f014ee32 1298 rx51_add_gpio_keys();
a24e61a9 1299 rx51_init_wl1251();
3dad5356 1300 rx51_init_tsc2005();
589541c0 1301 rx51_init_si4713();
322c183c 1302 rx51_init_lirc();
a24e61a9
KV
1303 spi_register_board_info(rx51_peripherals_spi_board_info,
1304 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC
1305
1306 partition = omap_mux_get("core");
1307 if (partition)
3b972bf0 1308 omap_hsmmc_init(mmc);
112485e9 1309
10299e2e 1310 rx51_charger_init();
749a34b3 1311 rx51_init_twl4030_hwmon();
ffe7f95b
LL
1312}
1313
This page took 0.478045 seconds and 5 git commands to generate.