Commit | Line | Data |
---|---|---|
ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
c1f9a095 | 17 | #include <linux/wl12xx.h> |
3dad5356 | 18 | #include <linux/spi/tsc2005.h> |
ffe7f95b | 19 | #include <linux/i2c.h> |
ebeb53e1 | 20 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
21 | #include <linux/clk.h> |
22 | #include <linux/delay.h> | |
23 | #include <linux/regulator/machine.h> | |
24 | #include <linux/gpio.h> | |
f014ee32 | 25 | #include <linux/gpio_keys.h> |
68a3c043 | 26 | #include <linux/gpio/machine.h> |
e639cd5b | 27 | #include <linux/omap-gpmc.h> |
5e763d29 | 28 | #include <linux/mmc/host.h> |
10299e2e | 29 | #include <linux/power/isp1704_charger.h> |
2203747c AB |
30 | #include <linux/platform_data/spi-omap2-mcspi.h> |
31 | #include <linux/platform_data/mtd-onenand-omap2.h> | |
32 | ||
9f97da78 | 33 | #include <asm/system_info.h> |
ffe7f95b | 34 | |
4e65331c | 35 | #include "common.h" |
45c3eb7d | 36 | #include <linux/omap-dma.h> |
ffe7f95b | 37 | |
0a6f98c9 | 38 | #include "board-rx51.h" |
04aeae77 | 39 | |
87581fd4 | 40 | #include <sound/tlv320aic3x.h> |
64d06691 | 41 | #include <sound/tpa6130a2-plat.h> |
eb4b0ec7 | 42 | #include <linux/platform_data/media/si4713.h> |
df4094d2 | 43 | #include <linux/platform_data/leds-lp55xx.h> |
87581fd4 | 44 | |
9c2251dd | 45 | #include <linux/platform_data/tsl2563.h> |
3b511201 | 46 | #include <linux/lis3lv02d.h> |
70b5d737 | 47 | |
2320dc6f TV |
48 | #include <video/omap-panel-data.h> |
49 | ||
322c183c | 50 | #if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE) |
eb4b0ec7 | 51 | #include <linux/platform_data/media/ir-rx51.h> |
322c183c TK |
52 | #endif |
53 | ||
4896e394 | 54 | #include "mux.h" |
1d5aef49 | 55 | #include "omap-pm.h" |
d02a900b | 56 | #include "hsmmc.h" |
fbd8071c | 57 | #include "common-board-devices.h" |
d2065e2b PR |
58 | #include "soc.h" |
59 | #include "omap-secure.h" | |
ffe7f95b | 60 | |
f52eeee8 AH |
61 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
62 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
63 | ||
a24e61a9 KV |
64 | #define RX51_WL1251_POWER_GPIO 87 |
65 | #define RX51_WL1251_IRQ_GPIO 42 | |
589541c0 JN |
66 | #define RX51_FMTX_RESET_GPIO 163 |
67 | #define RX51_FMTX_IRQ 53 | |
eeada9e8 | 68 | #define RX51_LP5523_CHIP_EN_GPIO 41 |
a24e61a9 | 69 | |
10299e2e KJ |
70 | #define RX51_USB_TRANSCEIVER_RST_GPIO 67 |
71 | ||
3dad5356 AK |
72 | #define RX51_TSC2005_RESET_GPIO 104 |
73 | #define RX51_TSC2005_IRQ_GPIO 100 | |
74 | ||
3b511201 AP |
75 | #define LIS302_IRQ1_GPIO 181 |
76 | #define LIS302_IRQ2_GPIO 180 /* Not yet in use */ | |
77 | ||
e65f131a | 78 | /* List all SPI devices here. Note that the list/probe order seems to matter! */ |
a24e61a9 KV |
79 | enum { |
80 | RX51_SPI_WL1251, | |
6996e7ff | 81 | RX51_SPI_TSC2005, /* Touch Controller */ |
e65f131a | 82 | RX51_SPI_MIPID, /* LCD panel */ |
a24e61a9 KV |
83 | }; |
84 | ||
946651cb | 85 | static struct wl1251_platform_data wl1251_pdata; |
3dad5356 | 86 | static struct tsc2005_platform_data tsc2005_pdata; |
a24e61a9 | 87 | |
3b511201 AP |
88 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) |
89 | static int lis302_setup(void) | |
90 | { | |
91 | int err; | |
92 | int irq1 = LIS302_IRQ1_GPIO; | |
93 | int irq2 = LIS302_IRQ2_GPIO; | |
94 | ||
95 | /* gpio for interrupt pin 1 */ | |
96 | err = gpio_request(irq1, "lis3lv02dl_irq1"); | |
97 | if (err) { | |
98 | printk(KERN_ERR "lis3lv02dl: gpio request failed\n"); | |
99 | goto out; | |
100 | } | |
101 | ||
102 | /* gpio for interrupt pin 2 */ | |
103 | err = gpio_request(irq2, "lis3lv02dl_irq2"); | |
104 | if (err) { | |
105 | gpio_free(irq1); | |
106 | printk(KERN_ERR "lis3lv02dl: gpio request failed\n"); | |
107 | goto out; | |
108 | } | |
109 | ||
110 | gpio_direction_input(irq1); | |
111 | gpio_direction_input(irq2); | |
112 | ||
113 | out: | |
114 | return err; | |
115 | } | |
116 | ||
117 | static int lis302_release(void) | |
118 | { | |
119 | gpio_free(LIS302_IRQ1_GPIO); | |
120 | gpio_free(LIS302_IRQ2_GPIO); | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
125 | static struct lis3lv02d_platform_data rx51_lis3lv02d_data = { | |
126 | .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y | | |
127 | LIS3_CLICK_SINGLE_Z, | |
128 | /* Limits are 0.5g * value */ | |
129 | .click_thresh_x = 8, | |
130 | .click_thresh_y = 8, | |
131 | .click_thresh_z = 10, | |
132 | /* Click must be longer than time limit */ | |
133 | .click_time_limit = 9, | |
134 | /* Kind of debounce filter */ | |
135 | .click_latency = 50, | |
136 | ||
137 | /* Limits for all axis. millig-value / 18 to get HW values */ | |
138 | .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI, | |
139 | .wakeup_thresh = 800 / 18, | |
140 | .wakeup_flags2 = LIS3_WAKEUP_Z_HI , | |
141 | .wakeup_thresh2 = 900 / 18, | |
142 | ||
143 | .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE, | |
144 | ||
145 | /* Interrupt line 2 for click detection, line 1 for thresholds */ | |
146 | .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12, | |
147 | ||
148 | .axis_x = LIS3_DEV_X, | |
149 | .axis_y = LIS3_INV_DEV_Y, | |
150 | .axis_z = LIS3_INV_DEV_Z, | |
151 | .setup_resources = lis302_setup, | |
152 | .release_resources = lis302_release, | |
153 | .st_min_limits = {-32, 3, 3}, | |
154 | .st_max_limits = {-3, 32, 32}, | |
3b511201 AP |
155 | }; |
156 | #endif | |
157 | ||
70b5d737 MN |
158 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
159 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | |
160 | .cover_comp_gain = 16, | |
161 | }; | |
162 | #endif | |
163 | ||
eeada9e8 | 164 | #if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE) |
df4094d2 | 165 | static struct lp55xx_led_config rx51_lp5523_led_config[] = { |
eeada9e8 | 166 | { |
1e7bf5e3 | 167 | .name = "lp5523:kb1", |
eeada9e8 AP |
168 | .chan_nr = 0, |
169 | .led_current = 50, | |
d1f1ca36 | 170 | .max_current = 100, |
eeada9e8 | 171 | }, { |
1e7bf5e3 | 172 | .name = "lp5523:kb2", |
eeada9e8 AP |
173 | .chan_nr = 1, |
174 | .led_current = 50, | |
d1f1ca36 | 175 | .max_current = 100, |
eeada9e8 | 176 | }, { |
1e7bf5e3 | 177 | .name = "lp5523:kb3", |
eeada9e8 AP |
178 | .chan_nr = 2, |
179 | .led_current = 50, | |
d1f1ca36 | 180 | .max_current = 100, |
eeada9e8 | 181 | }, { |
1e7bf5e3 | 182 | .name = "lp5523:kb4", |
eeada9e8 AP |
183 | .chan_nr = 3, |
184 | .led_current = 50, | |
d1f1ca36 | 185 | .max_current = 100, |
eeada9e8 | 186 | }, { |
1e7bf5e3 | 187 | .name = "lp5523:b", |
eeada9e8 AP |
188 | .chan_nr = 4, |
189 | .led_current = 50, | |
d1f1ca36 | 190 | .max_current = 100, |
eeada9e8 | 191 | }, { |
1e7bf5e3 | 192 | .name = "lp5523:g", |
eeada9e8 AP |
193 | .chan_nr = 5, |
194 | .led_current = 50, | |
d1f1ca36 | 195 | .max_current = 100, |
eeada9e8 | 196 | }, { |
1e7bf5e3 | 197 | .name = "lp5523:r", |
eeada9e8 AP |
198 | .chan_nr = 6, |
199 | .led_current = 50, | |
d1f1ca36 | 200 | .max_current = 100, |
eeada9e8 | 201 | }, { |
1e7bf5e3 | 202 | .name = "lp5523:kb5", |
eeada9e8 AP |
203 | .chan_nr = 7, |
204 | .led_current = 50, | |
d1f1ca36 | 205 | .max_current = 100, |
eeada9e8 | 206 | }, { |
1e7bf5e3 | 207 | .name = "lp5523:kb6", |
eeada9e8 AP |
208 | .chan_nr = 8, |
209 | .led_current = 50, | |
d1f1ca36 | 210 | .max_current = 100, |
eeada9e8 AP |
211 | } |
212 | }; | |
213 | ||
df4094d2 | 214 | static struct lp55xx_platform_data rx51_lp5523_platform_data = { |
eeada9e8 AP |
215 | .led_config = rx51_lp5523_led_config, |
216 | .num_channels = ARRAY_SIZE(rx51_lp5523_led_config), | |
df4094d2 | 217 | .clock_mode = LP55XX_CLOCK_AUTO, |
30dae2f9 | 218 | .enable_gpio = RX51_LP5523_CHIP_EN_GPIO, |
eeada9e8 AP |
219 | }; |
220 | #endif | |
221 | ||
2320dc6f TV |
222 | #define RX51_LCD_RESET_GPIO 90 |
223 | ||
224 | static struct panel_acx565akm_platform_data acx_pdata = { | |
225 | .name = "lcd", | |
226 | .source = "sdi.0", | |
227 | .reset_gpio = RX51_LCD_RESET_GPIO, | |
228 | .datapairs = 2, | |
229 | }; | |
230 | ||
a24e61a9 KV |
231 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
232 | .turbo_mode = 0, | |
a24e61a9 KV |
233 | }; |
234 | ||
03e11104 RQ |
235 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
236 | .turbo_mode = 0, | |
03e11104 RQ |
237 | }; |
238 | ||
6996e7ff RQ |
239 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
240 | .turbo_mode = 0, | |
6996e7ff RQ |
241 | }; |
242 | ||
a24e61a9 KV |
243 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
244 | [RX51_SPI_WL1251] = { | |
245 | .modalias = "wl1251", | |
246 | .bus_num = 4, | |
247 | .chip_select = 0, | |
248 | .max_speed_hz = 48000000, | |
860fc976 | 249 | .mode = SPI_MODE_3, |
a24e61a9 KV |
250 | .controller_data = &wl1251_mcspi_config, |
251 | .platform_data = &wl1251_pdata, | |
252 | }, | |
03e11104 RQ |
253 | [RX51_SPI_MIPID] = { |
254 | .modalias = "acx565akm", | |
255 | .bus_num = 1, | |
256 | .chip_select = 2, | |
257 | .max_speed_hz = 6000000, | |
258 | .controller_data = &mipid_mcspi_config, | |
2320dc6f | 259 | .platform_data = &acx_pdata, |
03e11104 | 260 | }, |
6996e7ff RQ |
261 | [RX51_SPI_TSC2005] = { |
262 | .modalias = "tsc2005", | |
263 | .bus_num = 1, | |
264 | .chip_select = 0, | |
6996e7ff RQ |
265 | .max_speed_hz = 6000000, |
266 | .controller_data = &tsc2005_mcspi_config, | |
3dad5356 | 267 | .platform_data = &tsc2005_pdata, |
6996e7ff | 268 | }, |
a24e61a9 KV |
269 | }; |
270 | ||
7605c0b0 PR |
271 | static struct platform_device rx51_battery_device = { |
272 | .name = "rx51-battery", | |
273 | .id = -1, | |
274 | }; | |
275 | ||
10299e2e KJ |
276 | static void rx51_charger_set_power(bool on) |
277 | { | |
278 | gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on); | |
279 | } | |
280 | ||
281 | static struct isp1704_charger_data rx51_charger_data = { | |
282 | .set_power = rx51_charger_set_power, | |
283 | }; | |
284 | ||
fd0964c5 | 285 | static struct platform_device rx51_charger_device = { |
10299e2e KJ |
286 | .name = "isp1704_charger", |
287 | .dev = { | |
288 | .platform_data = &rx51_charger_data, | |
289 | }, | |
fd0964c5 HK |
290 | }; |
291 | ||
10299e2e KJ |
292 | static void __init rx51_charger_init(void) |
293 | { | |
294 | WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, | |
e5fe29c7 | 295 | GPIOF_OUT_INIT_HIGH, "isp1704_reset")); |
10299e2e | 296 | |
7605c0b0 | 297 | platform_device_register(&rx51_battery_device); |
10299e2e KJ |
298 | platform_device_register(&rx51_charger_device); |
299 | } | |
300 | ||
f014ee32 JN |
301 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
302 | ||
303 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
304 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
305 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
306 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
307 | #define RX51_GPIO_LOCK_BUTTON 113 | |
308 | #define RX51_GPIO_PROXIMITY 89 | |
309 | ||
310 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
311 | ||
312 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
313 | { | |
314 | .desc = "Camera Lens Cover", | |
315 | .type = EV_SW, | |
316 | .code = SW_CAMERA_LENS_COVER, | |
317 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
318 | .active_low = 1, | |
319 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
320 | }, { | |
321 | .desc = "Camera Focus", | |
322 | .type = EV_KEY, | |
323 | .code = KEY_CAMERA_FOCUS, | |
324 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
325 | .active_low = 1, | |
326 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
327 | }, { | |
328 | .desc = "Camera Capture", | |
329 | .type = EV_KEY, | |
330 | .code = KEY_CAMERA, | |
331 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
332 | .active_low = 1, | |
333 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
334 | }, { | |
335 | .desc = "Lock Button", | |
336 | .type = EV_KEY, | |
337 | .code = KEY_SCREENLOCK, | |
338 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
339 | .active_low = 1, | |
340 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
341 | }, { | |
342 | .desc = "Keypad Slide", | |
343 | .type = EV_SW, | |
344 | .code = SW_KEYPAD_SLIDE, | |
345 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
346 | .active_low = 1, | |
347 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
348 | }, { | |
349 | .desc = "Proximity Sensor", | |
350 | .type = EV_SW, | |
351 | .code = SW_FRONT_PROXIMITY, | |
352 | .gpio = RX51_GPIO_PROXIMITY, | |
353 | .active_low = 0, | |
354 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
355 | } | |
356 | }; | |
357 | ||
358 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
359 | .buttons = rx51_gpio_keys, | |
360 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
361 | }; | |
362 | ||
363 | static struct platform_device rx51_gpio_keys_device = { | |
364 | .name = "gpio-keys", | |
365 | .id = -1, | |
366 | .dev = { | |
367 | .platform_data = &rx51_gpio_keys_data, | |
368 | }, | |
369 | }; | |
370 | ||
371 | static void __init rx51_add_gpio_keys(void) | |
372 | { | |
373 | platform_device_register(&rx51_gpio_keys_device); | |
374 | } | |
375 | #else | |
376 | static void __init rx51_add_gpio_keys(void) | |
377 | { | |
378 | } | |
379 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
380 | ||
bead4375 | 381 | static uint32_t board_keymap[] = { |
3fea6026 DT |
382 | /* |
383 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
384 | * connected to the ground" matrix state. | |
385 | */ | |
ffe7f95b | 386 | KEY(0, 0, KEY_Q), |
acf442dc AK |
387 | KEY(0, 1, KEY_O), |
388 | KEY(0, 2, KEY_P), | |
389 | KEY(0, 3, KEY_COMMA), | |
390 | KEY(0, 4, KEY_BACKSPACE), | |
391 | KEY(0, 6, KEY_A), | |
392 | KEY(0, 7, KEY_S), | |
3fea6026 | 393 | |
acf442dc | 394 | KEY(1, 0, KEY_W), |
ffe7f95b | 395 | KEY(1, 1, KEY_D), |
acf442dc AK |
396 | KEY(1, 2, KEY_F), |
397 | KEY(1, 3, KEY_G), | |
398 | KEY(1, 4, KEY_H), | |
399 | KEY(1, 5, KEY_J), | |
400 | KEY(1, 6, KEY_K), | |
401 | KEY(1, 7, KEY_L), | |
3fea6026 | 402 | |
acf442dc AK |
403 | KEY(2, 0, KEY_E), |
404 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 405 | KEY(2, 2, KEY_UP), |
acf442dc AK |
406 | KEY(2, 3, KEY_ENTER), |
407 | KEY(2, 5, KEY_Z), | |
408 | KEY(2, 6, KEY_X), | |
409 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
410 | KEY(2, 8, KEY_F9), |
411 | ||
acf442dc AK |
412 | KEY(3, 0, KEY_R), |
413 | KEY(3, 1, KEY_V), | |
414 | KEY(3, 2, KEY_B), | |
ffe7f95b | 415 | KEY(3, 3, KEY_N), |
acf442dc AK |
416 | KEY(3, 4, KEY_M), |
417 | KEY(3, 5, KEY_SPACE), | |
418 | KEY(3, 6, KEY_SPACE), | |
419 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 420 | |
acf442dc AK |
421 | KEY(4, 0, KEY_T), |
422 | KEY(4, 1, KEY_DOWN), | |
423 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 424 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
425 | KEY(4, 5, KEY_RIGHTALT), |
426 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 427 | KEY(4, 8, KEY_F10), |
3fea6026 | 428 | |
acf442dc | 429 | KEY(5, 0, KEY_Y), |
2e65a207 | 430 | KEY(5, 8, KEY_F11), |
3fea6026 | 431 | |
acf442dc | 432 | KEY(6, 0, KEY_U), |
3fea6026 | 433 | |
acf442dc AK |
434 | KEY(7, 0, KEY_I), |
435 | KEY(7, 1, KEY_F7), | |
436 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
437 | }; |
438 | ||
4f543332 TL |
439 | static struct matrix_keymap_data board_map_data = { |
440 | .keymap = board_keymap, | |
441 | .keymap_size = ARRAY_SIZE(board_keymap), | |
442 | }; | |
443 | ||
ffe7f95b | 444 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 445 | .keymap_data = &board_map_data, |
ffe7f95b LL |
446 | .rows = 8, |
447 | .cols = 8, | |
ffe7f95b LL |
448 | .rep = 1, |
449 | }; | |
450 | ||
ce6f0016 AH |
451 | /* Enable input logic and pull all lines up when eMMC is on. */ |
452 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
453 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
454 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
455 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
456 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
457 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
458 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
459 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
460 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
461 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
462 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
463 | }; | |
464 | ||
465 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
466 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
467 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
468 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
469 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
470 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
471 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
472 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
473 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
474 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
475 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
476 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
477 | }; | |
478 | ||
112485e9 BC |
479 | static struct omap_mux_partition *partition; |
480 | ||
ce6f0016 AH |
481 | /* |
482 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
483 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
484 | */ | |
80412ca8 | 485 | static void rx51_mmc2_remux(struct device *dev, int power_on) |
ce6f0016 AH |
486 | { |
487 | if (power_on) | |
112485e9 | 488 | omap_mux_write_array(partition, rx51_mmc2_on_mux); |
ce6f0016 | 489 | else |
112485e9 | 490 | omap_mux_write_array(partition, rx51_mmc2_off_mux); |
ce6f0016 AH |
491 | } |
492 | ||
68ff0423 | 493 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
494 | { |
495 | .name = "external", | |
496 | .mmc = 1, | |
3a63833e | 497 | .caps = MMC_CAP_4_BIT_DATA, |
ffe7f95b LL |
498 | .cover_only = true, |
499 | .gpio_cd = 160, | |
500 | .gpio_wp = -EINVAL, | |
501 | }, | |
502 | { | |
503 | .name = "internal", | |
504 | .mmc = 2, | |
3a63833e SG |
505 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
506 | /* See also rx51_mmc2_remux */ | |
ffe7f95b LL |
507 | .gpio_cd = -EINVAL, |
508 | .gpio_wp = -EINVAL, | |
5e763d29 | 509 | .nonremovable = true, |
ce6f0016 | 510 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
511 | }, |
512 | {} /* Terminator */ | |
513 | }; | |
514 | ||
786b01a8 OD |
515 | static struct regulator_consumer_supply rx51_vmmc1_supply[] = { |
516 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
517 | }; | |
ffe7f95b | 518 | |
664a41b8 LT |
519 | static struct regulator_consumer_supply rx51_vaux2_supply[] = { |
520 | REGULATOR_SUPPLY("vdds_csib", "omap3isp"), | |
521 | }; | |
75ccf268 | 522 | |
786b01a8 OD |
523 | static struct regulator_consumer_supply rx51_vaux3_supply[] = { |
524 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | |
525 | }; | |
ffe7f95b | 526 | |
786b01a8 OD |
527 | static struct regulator_consumer_supply rx51_vsim_supply[] = { |
528 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | |
529 | }; | |
ffe7f95b | 530 | |
4cfcaef1 JN |
531 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
532 | /* tlv320aic3x analog supplies */ | |
5c7d9bbe JN |
533 | REGULATOR_SUPPLY("AVDD", "2-0018"), |
534 | REGULATOR_SUPPLY("DRVDD", "2-0018"), | |
caeeb4aa JN |
535 | REGULATOR_SUPPLY("AVDD", "2-0019"), |
536 | REGULATOR_SUPPLY("DRVDD", "2-0019"), | |
64d06691 JN |
537 | /* tpa6130a2 */ |
538 | REGULATOR_SUPPLY("Vdd", "2-0060"), | |
4cfcaef1 | 539 | /* Keep vmmc as last item. It is not iterated for newer boards */ |
0005ae73 | 540 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
4cfcaef1 JN |
541 | }; |
542 | ||
543 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
544 | /* tlv320aic3x digital supplies */ | |
5c7d9bbe JN |
545 | REGULATOR_SUPPLY("IOVDD", "2-0018"), |
546 | REGULATOR_SUPPLY("DVDD", "2-0018"), | |
caeeb4aa JN |
547 | REGULATOR_SUPPLY("IOVDD", "2-0019"), |
548 | REGULATOR_SUPPLY("DVDD", "2-0019"), | |
589541c0 JN |
549 | /* Si4713 IO supply */ |
550 | REGULATOR_SUPPLY("vio", "2-0063"), | |
17fd8cdb AK |
551 | /* lis3lv02d */ |
552 | REGULATOR_SUPPLY("Vdd_IO", "3-001d"), | |
4cfcaef1 JN |
553 | }; |
554 | ||
0581b52e | 555 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { |
b5b9945b | 556 | REGULATOR_SUPPLY("vdds_sdi", "omapdss"), |
3d85f548 | 557 | REGULATOR_SUPPLY("vdds_sdi", "omapdss_sdi.0"), |
589541c0 JN |
558 | /* Si4713 supply */ |
559 | REGULATOR_SUPPLY("vdd", "2-0063"), | |
17fd8cdb AK |
560 | /* lis3lv02d */ |
561 | REGULATOR_SUPPLY("Vdd", "3-001d"), | |
0581b52e RQ |
562 | }; |
563 | ||
ffe7f95b LL |
564 | static struct regulator_init_data rx51_vaux1 = { |
565 | .constraints = { | |
566 | .name = "V28", | |
567 | .min_uV = 2800000, | |
568 | .max_uV = 2800000, | |
000d534e | 569 | .always_on = true, /* due battery cover sensor */ |
ffe7f95b LL |
570 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
571 | | REGULATOR_MODE_STANDBY, | |
572 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
573 | | REGULATOR_CHANGE_STATUS, | |
574 | }, | |
0581b52e RQ |
575 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
576 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
577 | }; |
578 | ||
579 | static struct regulator_init_data rx51_vaux2 = { | |
580 | .constraints = { | |
581 | .name = "VCSI", | |
582 | .min_uV = 1800000, | |
583 | .max_uV = 1800000, | |
584 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
585 | | REGULATOR_MODE_STANDBY, | |
586 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
587 | | REGULATOR_CHANGE_STATUS, | |
588 | }, | |
664a41b8 LT |
589 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply), |
590 | .consumer_supplies = rx51_vaux2_supply, | |
ffe7f95b LL |
591 | }; |
592 | ||
593 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 594 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
595 | .constraints = { |
596 | .name = "VCAM_DIG_18", | |
597 | .min_uV = 1800000, | |
598 | .max_uV = 1800000, | |
599 | .apply_uV = true, | |
600 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
601 | | REGULATOR_MODE_STANDBY, | |
602 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
603 | | REGULATOR_CHANGE_STATUS, | |
604 | }, | |
605 | }; | |
606 | ||
f52eeee8 AH |
607 | static struct regulator_init_data rx51_vaux3_mmc = { |
608 | .constraints = { | |
609 | .name = "VMMC2_30", | |
610 | .min_uV = 2800000, | |
611 | .max_uV = 3000000, | |
612 | .apply_uV = true, | |
613 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
614 | | REGULATOR_MODE_STANDBY, | |
615 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
616 | | REGULATOR_CHANGE_MODE | |
617 | | REGULATOR_CHANGE_STATUS, | |
618 | }, | |
786b01a8 OD |
619 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), |
620 | .consumer_supplies = rx51_vaux3_supply, | |
f52eeee8 AH |
621 | }; |
622 | ||
ffe7f95b LL |
623 | static struct regulator_init_data rx51_vaux4 = { |
624 | .constraints = { | |
625 | .name = "VCAM_ANA_28", | |
626 | .min_uV = 2800000, | |
627 | .max_uV = 2800000, | |
628 | .apply_uV = true, | |
629 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
630 | | REGULATOR_MODE_STANDBY, | |
631 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
632 | | REGULATOR_CHANGE_STATUS, | |
633 | }, | |
634 | }; | |
635 | ||
636 | static struct regulator_init_data rx51_vmmc1 = { | |
637 | .constraints = { | |
638 | .min_uV = 1850000, | |
639 | .max_uV = 3150000, | |
640 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
641 | | REGULATOR_MODE_STANDBY, | |
642 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
643 | | REGULATOR_CHANGE_MODE | |
644 | | REGULATOR_CHANGE_STATUS, | |
645 | }, | |
786b01a8 OD |
646 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), |
647 | .consumer_supplies = rx51_vmmc1_supply, | |
ffe7f95b LL |
648 | }; |
649 | ||
650 | static struct regulator_init_data rx51_vmmc2 = { | |
651 | .constraints = { | |
f2add1de JN |
652 | .name = "V28_A", |
653 | .min_uV = 2800000, | |
654 | .max_uV = 3000000, | |
2827411e | 655 | .always_on = true, /* due VIO leak to AIC34 VDDs */ |
ffe7f95b LL |
656 | .apply_uV = true, |
657 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
658 | | REGULATOR_MODE_STANDBY, | |
659 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
660 | | REGULATOR_CHANGE_MODE | |
661 | | REGULATOR_CHANGE_STATUS, | |
662 | }, | |
4cfcaef1 JN |
663 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
664 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
665 | }; |
666 | ||
094fc559 KJ |
667 | static struct regulator_init_data rx51_vpll1 = { |
668 | .constraints = { | |
669 | .name = "VPLL", | |
670 | .min_uV = 1800000, | |
671 | .max_uV = 1800000, | |
672 | .apply_uV = true, | |
673 | .always_on = true, | |
674 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
675 | | REGULATOR_MODE_STANDBY, | |
676 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
677 | }, | |
678 | }; | |
679 | ||
680 | static struct regulator_init_data rx51_vpll2 = { | |
681 | .constraints = { | |
682 | .name = "VSDI_CSI", | |
683 | .min_uV = 1800000, | |
684 | .max_uV = 1800000, | |
685 | .apply_uV = true, | |
686 | .always_on = true, | |
687 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
688 | | REGULATOR_MODE_STANDBY, | |
689 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
690 | }, | |
691 | }; | |
692 | ||
ffe7f95b LL |
693 | static struct regulator_init_data rx51_vsim = { |
694 | .constraints = { | |
695 | .name = "VMMC2_IO_18", | |
696 | .min_uV = 1800000, | |
697 | .max_uV = 1800000, | |
698 | .apply_uV = true, | |
699 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
700 | | REGULATOR_MODE_STANDBY, | |
701 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
702 | | REGULATOR_CHANGE_STATUS, | |
703 | }, | |
786b01a8 OD |
704 | .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), |
705 | .consumer_supplies = rx51_vsim_supply, | |
ffe7f95b LL |
706 | }; |
707 | ||
4cfcaef1 JN |
708 | static struct regulator_init_data rx51_vio = { |
709 | .constraints = { | |
710 | .min_uV = 1800000, | |
711 | .max_uV = 1800000, | |
712 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
713 | | REGULATOR_MODE_STANDBY, | |
714 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
715 | | REGULATOR_CHANGE_MODE | |
716 | | REGULATOR_CHANGE_STATUS, | |
717 | }, | |
718 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
719 | .consumer_supplies = rx51_vio_supplies, | |
720 | }; | |
721 | ||
094fc559 KJ |
722 | static struct regulator_init_data rx51_vintana1 = { |
723 | .constraints = { | |
724 | .name = "VINTANA1", | |
725 | .min_uV = 1500000, | |
726 | .max_uV = 1500000, | |
727 | .always_on = true, | |
728 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
729 | | REGULATOR_MODE_STANDBY, | |
730 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
731 | }, | |
732 | }; | |
733 | ||
734 | static struct regulator_init_data rx51_vintana2 = { | |
735 | .constraints = { | |
736 | .name = "VINTANA2", | |
737 | .min_uV = 2750000, | |
738 | .max_uV = 2750000, | |
739 | .apply_uV = true, | |
740 | .always_on = true, | |
741 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
742 | | REGULATOR_MODE_STANDBY, | |
743 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
744 | }, | |
745 | }; | |
746 | ||
747 | static struct regulator_init_data rx51_vintdig = { | |
748 | .constraints = { | |
749 | .name = "VINTDIG", | |
750 | .min_uV = 1500000, | |
751 | .max_uV = 1500000, | |
752 | .always_on = true, | |
753 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
754 | | REGULATOR_MODE_STANDBY, | |
755 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
756 | }, | |
757 | }; | |
758 | ||
68a3c043 SR |
759 | static struct gpiod_lookup_table rx51_fmtx_gpios_table = { |
760 | .dev_id = "2-0063", | |
761 | .table = { | |
762 | GPIO_LOOKUP("gpio.6", 3, "reset", GPIO_ACTIVE_HIGH), /* 163 */ | |
763 | { }, | |
589541c0 JN |
764 | }, |
765 | }; | |
766 | ||
68a3c043 | 767 | static __init void rx51_gpio_init(void) |
589541c0 | 768 | { |
68a3c043 | 769 | gpiod_add_lookup_table(&rx51_fmtx_gpios_table); |
589541c0 JN |
770 | } |
771 | ||
ffe7f95b LL |
772 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
773 | { | |
774 | /* FIXME this gpio setup is just a placeholder for now */ | |
bc593f5d | 775 | gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm"); |
c0ad4fac | 776 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en"); |
ffe7f95b | 777 | |
ffe7f95b LL |
778 | return 0; |
779 | } | |
780 | ||
781 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
ffe7f95b LL |
782 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) |
783 | | BIT(4) | BIT(5) | |
784 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
785 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
786 | | BIT(16) | BIT(17) , | |
787 | .setup = rx51_twlgpio_setup, | |
788 | }; | |
789 | ||
9312fffb AK |
790 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
791 | /* | |
3c684e84 | 792 | * Turn off everything |
9312fffb | 793 | */ |
3c684e84 | 794 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
795 | }; |
796 | ||
797 | static struct twl4030_script sleep_on_script __initdata = { | |
798 | .script = sleep_on_seq, | |
799 | .size = ARRAY_SIZE(sleep_on_seq), | |
800 | .flags = TWL4030_SLEEP_SCRIPT, | |
801 | }; | |
802 | ||
803 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
804 | /* | |
3c684e84 | 805 | * Reenable everything |
9312fffb | 806 | */ |
3c684e84 | 807 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
808 | }; |
809 | ||
810 | static struct twl4030_script wakeup_script __initdata = { | |
811 | .script = wakeup_seq, | |
812 | .size = ARRAY_SIZE(wakeup_seq), | |
813 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
814 | }; | |
815 | ||
816 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
817 | /* | |
3c684e84 | 818 | * Reenable everything |
9312fffb | 819 | */ |
3c684e84 | 820 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
821 | }; |
822 | ||
823 | static struct twl4030_script wakeup_p3_script __initdata = { | |
824 | .script = wakeup_p3_seq, | |
825 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
826 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
827 | }; | |
828 | ||
829 | static struct twl4030_ins wrst_seq[] __initdata = { | |
830 | /* | |
831 | * Reset twl4030. | |
832 | * Reset VDD1 regulator. | |
833 | * Reset VDD2 regulator. | |
834 | * Reset VPLL1 regulator. | |
835 | * Enable sysclk output. | |
836 | * Reenable twl4030. | |
837 | */ | |
838 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
839 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
840 | 0x13}, | |
9312fffb AK |
841 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
842 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
843 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
844 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 845 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
846 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
847 | }; | |
848 | ||
849 | static struct twl4030_script wrst_script __initdata = { | |
850 | .script = wrst_seq, | |
851 | .size = ARRAY_SIZE(wrst_seq), | |
852 | .flags = TWL4030_WRST_SCRIPT, | |
853 | }; | |
854 | ||
855 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
856 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
857 | board might hit retention before loading of wakeup script is | |
858 | completed. This can cause boot failures depending on timing issues. | |
859 | */ | |
860 | &wakeup_script, | |
861 | &sleep_on_script, | |
862 | &wakeup_p3_script, | |
863 | &wrst_script, | |
864 | }; | |
865 | ||
866 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
867 | { .resource = RES_VDD1, .devgroup = -1, |
868 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
869 | .remap_sleep = RES_STATE_OFF | |
870 | }, | |
871 | { .resource = RES_VDD2, .devgroup = -1, | |
872 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
873 | .remap_sleep = RES_STATE_OFF | |
874 | }, | |
875 | { .resource = RES_VPLL1, .devgroup = -1, | |
876 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
877 | .remap_sleep = RES_STATE_OFF | |
878 | }, | |
879 | { .resource = RES_VPLL2, .devgroup = -1, | |
880 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
881 | }, | |
882 | { .resource = RES_VAUX1, .devgroup = -1, | |
883 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
884 | }, | |
885 | { .resource = RES_VAUX2, .devgroup = -1, | |
886 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
887 | }, | |
888 | { .resource = RES_VAUX3, .devgroup = -1, | |
889 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
890 | }, | |
891 | { .resource = RES_VAUX4, .devgroup = -1, | |
892 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
893 | }, | |
894 | { .resource = RES_VMMC1, .devgroup = -1, | |
895 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
896 | }, | |
897 | { .resource = RES_VMMC2, .devgroup = -1, | |
898 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
899 | }, | |
900 | { .resource = RES_VDAC, .devgroup = -1, | |
901 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
902 | }, | |
903 | { .resource = RES_VSIM, .devgroup = -1, | |
904 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
905 | }, | |
906 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
907 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
908 | }, | |
909 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
910 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
911 | }, | |
912 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
913 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
914 | }, | |
915 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
916 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
917 | }, | |
918 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
919 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
920 | }, | |
921 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
922 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
923 | }, | |
924 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
925 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
926 | }, | |
927 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
928 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
929 | }, | |
930 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
931 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
932 | }, | |
933 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
934 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
935 | }, | |
936 | { .resource = RES_RESET, .devgroup = -1, | |
937 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
938 | }, | |
d7ac829f | 939 | { .resource = RES_MAIN_REF, .devgroup = -1, |
3c684e84 AK |
940 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 |
941 | }, | |
9312fffb AK |
942 | { 0, 0}, |
943 | }; | |
944 | ||
945 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
946 | .scripts = twl4030_scripts, | |
947 | .num = ARRAY_SIZE(twl4030_scripts), | |
948 | .resource_config = twl4030_rconfig, | |
949 | }; | |
950 | ||
8c3d4534 | 951 | static struct twl4030_vibra_data rx51_vibra_data __initdata = { |
b7a834cc IK |
952 | .coexist = 0, |
953 | }; | |
954 | ||
8c3d4534 | 955 | static struct twl4030_audio_data rx51_audio_data __initdata = { |
b7a834cc IK |
956 | .audio_mclk = 26000000, |
957 | .vibra = &rx51_vibra_data, | |
958 | }; | |
9312fffb | 959 | |
9312fffb | 960 | static struct twl4030_platform_data rx51_twldata __initdata = { |
ffe7f95b LL |
961 | /* platform_data for children goes here */ |
962 | .gpio = &rx51_gpio_data, | |
963 | .keypad = &rx51_kp_data, | |
9312fffb | 964 | .power = &rx51_t2scripts_data, |
4ae6df5e | 965 | .audio = &rx51_audio_data, |
ffe7f95b LL |
966 | |
967 | .vaux1 = &rx51_vaux1, | |
968 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
969 | .vaux4 = &rx51_vaux4, |
970 | .vmmc1 = &rx51_vmmc1, | |
094fc559 KJ |
971 | .vpll1 = &rx51_vpll1, |
972 | .vpll2 = &rx51_vpll2, | |
ffe7f95b | 973 | .vsim = &rx51_vsim, |
094fc559 KJ |
974 | .vintana1 = &rx51_vintana1, |
975 | .vintana2 = &rx51_vintana2, | |
976 | .vintdig = &rx51_vintdig, | |
4cfcaef1 | 977 | .vio = &rx51_vio, |
ffe7f95b LL |
978 | }; |
979 | ||
f0c61d3d | 980 | static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = { |
64d06691 JN |
981 | .power_gpio = 98, |
982 | }; | |
983 | ||
f0fba2ad LG |
984 | /* Audio setup data */ |
985 | static struct aic3x_setup_data rx51_aic34_setup = { | |
986 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, | |
987 | .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT, | |
988 | }; | |
989 | ||
e4862f2f | 990 | static struct aic3x_pdata rx51_aic3x_data = { |
f0fba2ad LG |
991 | .setup = &rx51_aic34_setup, |
992 | .gpio_reset = 60, | |
993 | }; | |
994 | ||
caeeb4aa JN |
995 | static struct aic3x_pdata rx51_aic3x_data2 = { |
996 | .gpio_reset = 60, | |
997 | }; | |
998 | ||
99d2fae9 | 999 | #if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713) |
68a3c043 SR |
1000 | static struct si4713_platform_data rx51_si4713_platform_data = { |
1001 | .is_platform_device = true | |
1002 | }; | |
99d2fae9 | 1003 | #endif |
68a3c043 | 1004 | |
dabe929b | 1005 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
68a3c043 SR |
1006 | #if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713) |
1007 | { | |
1008 | I2C_BOARD_INFO("si4713", 0x63), | |
1009 | .platform_data = &rx51_si4713_platform_data, | |
1010 | }, | |
1011 | #endif | |
dabe929b JN |
1012 | { |
1013 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
87581fd4 | 1014 | .platform_data = &rx51_aic3x_data, |
dabe929b | 1015 | }, |
caeeb4aa JN |
1016 | { |
1017 | I2C_BOARD_INFO("tlv320aic3x", 0x19), | |
1018 | .platform_data = &rx51_aic3x_data2, | |
1019 | }, | |
70b5d737 MN |
1020 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
1021 | { | |
1022 | I2C_BOARD_INFO("tsl2563", 0x29), | |
1023 | .platform_data = &rx51_tsl2563_platform_data, | |
1024 | }, | |
eeada9e8 AP |
1025 | #endif |
1026 | #if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE) | |
1027 | { | |
1028 | I2C_BOARD_INFO("lp5523", 0x32), | |
1029 | .platform_data = &rx51_lp5523_platform_data, | |
1030 | }, | |
70b5d737 | 1031 | #endif |
d77711aa PR |
1032 | { |
1033 | I2C_BOARD_INFO("bq27200", 0x55), | |
1034 | }, | |
64d06691 JN |
1035 | { |
1036 | I2C_BOARD_INFO("tpa6130a2", 0x60), | |
1037 | .platform_data = &rx51_tpa6130a2_data, | |
1038 | } | |
dabe929b JN |
1039 | }; |
1040 | ||
3b511201 AP |
1041 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = { |
1042 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) | |
1043 | { | |
1044 | I2C_BOARD_INFO("lis3lv02d", 0x1d), | |
1045 | .platform_data = &rx51_lis3lv02d_data, | |
3b511201 AP |
1046 | }, |
1047 | #endif | |
1048 | }; | |
1049 | ||
ffe7f95b LL |
1050 | static int __init rx51_i2c_init(void) |
1051 | { | |
68a3c043 SR |
1052 | #if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713) |
1053 | int err; | |
1054 | #endif | |
1055 | ||
f52eeee8 | 1056 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 1057 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 1058 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
1059 | /* Only older boards use VMMC2 for internal MMC */ |
1060 | rx51_vmmc2.num_consumer_supplies--; | |
1061 | } else { | |
f52eeee8 | 1062 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 1063 | } |
4cfcaef1 | 1064 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
827ed9ae | 1065 | omap3_pmic_get_config(&rx51_twldata, |
b252b0ef PU |
1066 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, |
1067 | TWL_COMMON_REGULATOR_VDAC); | |
1068 | ||
1069 | rx51_twldata.vdac->constraints.apply_uV = true; | |
1070 | rx51_twldata.vdac->constraints.name = "VDAC"; | |
1071 | ||
7d7e1eba | 1072 | omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata); |
68a3c043 SR |
1073 | #if IS_ENABLED(CONFIG_I2C_SI4713) && IS_ENABLED(CONFIG_PLATFORM_SI4713) |
1074 | err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq"); | |
1075 | if (err) { | |
1076 | printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err); | |
1077 | return err; | |
1078 | } | |
1079 | rx51_peripherals_i2c_board_info_2[0].irq = gpio_to_irq(RX51_FMTX_IRQ); | |
1080 | #endif | |
dabe929b JN |
1081 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, |
1082 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
4d04317f TL |
1083 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) |
1084 | rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO); | |
1085 | rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO); | |
1086 | #endif | |
3b511201 AP |
1087 | omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3, |
1088 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_3)); | |
ffe7f95b LL |
1089 | return 0; |
1090 | } | |
1091 | ||
aa62e90f JY |
1092 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
1093 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
1094 | ||
1095 | static struct mtd_partition onenand_partitions[] = { | |
1096 | { | |
1097 | .name = "bootloader", | |
1098 | .offset = 0, | |
1099 | .size = 0x20000, | |
1100 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
1101 | }, | |
1102 | { | |
1103 | .name = "config", | |
1104 | .offset = MTDPART_OFS_APPEND, | |
1105 | .size = 0x60000, | |
1106 | }, | |
1107 | { | |
1108 | .name = "log", | |
1109 | .offset = MTDPART_OFS_APPEND, | |
1110 | .size = 0x40000, | |
1111 | }, | |
1112 | { | |
1113 | .name = "kernel", | |
1114 | .offset = MTDPART_OFS_APPEND, | |
1115 | .size = 0x200000, | |
1116 | }, | |
1117 | { | |
1118 | .name = "initfs", | |
1119 | .offset = MTDPART_OFS_APPEND, | |
1120 | .size = 0x200000, | |
1121 | }, | |
1122 | { | |
1123 | .name = "rootfs", | |
1124 | .offset = MTDPART_OFS_APPEND, | |
1125 | .size = MTDPART_SIZ_FULL, | |
1126 | }, | |
1127 | }; | |
1128 | ||
5403187f AK |
1129 | static struct omap_onenand_platform_data board_onenand_data[] = { |
1130 | { | |
1131 | .cs = 0, | |
1132 | .gpio_irq = 65, | |
1133 | .parts = onenand_partitions, | |
1134 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
1135 | .flags = ONENAND_SYNC_READWRITE, | |
1136 | } | |
aa62e90f | 1137 | }; |
aa62e90f | 1138 | #endif |
ffe7f95b | 1139 | |
bc593f5d | 1140 | static struct gpio rx51_wl1251_gpios[] __initdata = { |
bc593f5d IG |
1141 | { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" }, |
1142 | }; | |
1143 | ||
a24e61a9 KV |
1144 | static void __init rx51_init_wl1251(void) |
1145 | { | |
1146 | int irq, ret; | |
1147 | ||
bc593f5d IG |
1148 | ret = gpio_request_array(rx51_wl1251_gpios, |
1149 | ARRAY_SIZE(rx51_wl1251_gpios)); | |
a24e61a9 KV |
1150 | if (ret < 0) |
1151 | goto error; | |
1152 | ||
a24e61a9 KV |
1153 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); |
1154 | if (irq < 0) | |
1155 | goto err_irq; | |
1156 | ||
1d207cd3 | 1157 | wl1251_pdata.power_gpio = RX51_WL1251_POWER_GPIO; |
a24e61a9 KV |
1158 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; |
1159 | ||
1160 | return; | |
1161 | ||
1162 | err_irq: | |
1163 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
a24e61a9 KV |
1164 | error: |
1165 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
1d207cd3 | 1166 | wl1251_pdata.power_gpio = -1; |
a24e61a9 KV |
1167 | |
1168 | /* | |
1169 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
1170 | * set_power is null, and wl1251_probe() will fail. | |
1171 | */ | |
1172 | } | |
1173 | ||
3dad5356 AK |
1174 | static struct tsc2005_platform_data tsc2005_pdata = { |
1175 | .ts_pressure_max = 2048, | |
1176 | .ts_pressure_fudge = 2, | |
1177 | .ts_x_max = 4096, | |
1178 | .ts_x_fudge = 4, | |
1179 | .ts_y_max = 4096, | |
1180 | .ts_y_fudge = 7, | |
1181 | .ts_x_plate_ohm = 280, | |
1182 | .esd_timeout_ms = 8000, | |
1183 | }; | |
1184 | ||
d4860ebe VZ |
1185 | static struct gpio rx51_tsc2005_gpios[] __initdata = { |
1186 | { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" }, | |
1187 | { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" }, | |
1188 | }; | |
1189 | ||
3dad5356 AK |
1190 | static void rx51_tsc2005_set_reset(bool enable) |
1191 | { | |
1192 | gpio_set_value(RX51_TSC2005_RESET_GPIO, enable); | |
1193 | } | |
1194 | ||
1195 | static void __init rx51_init_tsc2005(void) | |
1196 | { | |
1197 | int r; | |
1198 | ||
d4860ebe VZ |
1199 | omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT); |
1200 | omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP); | |
3dad5356 | 1201 | |
d4860ebe VZ |
1202 | r = gpio_request_array(rx51_tsc2005_gpios, |
1203 | ARRAY_SIZE(rx51_tsc2005_gpios)); | |
1204 | if (r < 0) { | |
1205 | printk(KERN_ERR "tsc2005 board initialization failed\n"); | |
3dad5356 | 1206 | tsc2005_pdata.esd_timeout_ms = 0; |
d4860ebe | 1207 | return; |
3dad5356 | 1208 | } |
d4860ebe VZ |
1209 | |
1210 | tsc2005_pdata.set_reset = rx51_tsc2005_set_reset; | |
2533c2cf TL |
1211 | rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = |
1212 | gpio_to_irq(RX51_TSC2005_IRQ_GPIO); | |
3dad5356 AK |
1213 | } |
1214 | ||
322c183c TK |
1215 | #if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE) |
1216 | static struct lirc_rx51_platform_data rx51_lirc_data = { | |
1217 | .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat, | |
1218 | .pwm_timer = 9, /* Use GPT 9 for CIR */ | |
1219 | }; | |
1220 | ||
1221 | static struct platform_device rx51_lirc_device = { | |
1222 | .name = "lirc_rx51", | |
1223 | .id = -1, | |
1224 | .dev = { | |
1225 | .platform_data = &rx51_lirc_data, | |
1226 | }, | |
1227 | }; | |
1228 | ||
1229 | static void __init rx51_init_lirc(void) | |
1230 | { | |
1231 | platform_device_register(&rx51_lirc_device); | |
1232 | } | |
1233 | #else | |
1234 | static void __init rx51_init_lirc(void) | |
1235 | { | |
1236 | } | |
1237 | #endif | |
1238 | ||
749a34b3 PR |
1239 | static struct platform_device madc_hwmon = { |
1240 | .name = "twl4030_madc_hwmon", | |
1241 | .id = -1, | |
1242 | }; | |
1243 | ||
1244 | static void __init rx51_init_twl4030_hwmon(void) | |
1245 | { | |
1246 | platform_device_register(&madc_hwmon); | |
1247 | } | |
1248 | ||
d2065e2b PR |
1249 | static struct platform_device omap3_rom_rng_device = { |
1250 | .name = "omap3-rom-rng", | |
1251 | .id = -1, | |
1252 | .dev = { | |
1253 | .platform_data = rx51_secure_rng_call, | |
1254 | }, | |
1255 | }; | |
1256 | ||
1257 | static void __init rx51_init_omap3_rom_rng(void) | |
1258 | { | |
1259 | if (omap_type() == OMAP2_DEVICE_TYPE_SEC) { | |
448f8bc6 | 1260 | pr_info("RX-51: Registering OMAP3 HWRNG device\n"); |
d2065e2b PR |
1261 | platform_device_register(&omap3_rom_rng_device); |
1262 | } | |
1263 | } | |
1264 | ||
ffe7f95b LL |
1265 | void __init rx51_peripherals_init(void) |
1266 | { | |
68a3c043 | 1267 | rx51_gpio_init(); |
ffe7f95b | 1268 | rx51_i2c_init(); |
094fc559 | 1269 | regulator_has_full_constraints(); |
5403187f | 1270 | gpmc_onenand_init(board_onenand_data); |
f014ee32 | 1271 | rx51_add_gpio_keys(); |
a24e61a9 | 1272 | rx51_init_wl1251(); |
3dad5356 | 1273 | rx51_init_tsc2005(); |
322c183c | 1274 | rx51_init_lirc(); |
a24e61a9 KV |
1275 | spi_register_board_info(rx51_peripherals_spi_board_info, |
1276 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
112485e9 BC |
1277 | |
1278 | partition = omap_mux_get("core"); | |
1279 | if (partition) | |
3b972bf0 | 1280 | omap_hsmmc_init(mmc); |
112485e9 | 1281 | |
10299e2e | 1282 | rx51_charger_init(); |
749a34b3 | 1283 | rx51_init_twl4030_hwmon(); |
d2065e2b | 1284 | rx51_init_omap3_rom_rng(); |
ffe7f95b LL |
1285 | } |
1286 |