Commit | Line | Data |
---|---|---|
ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
a24e61a9 | 17 | #include <linux/spi/wl12xx.h> |
ffe7f95b | 18 | #include <linux/i2c.h> |
ebeb53e1 | 19 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
20 | #include <linux/clk.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/gpio.h> | |
f014ee32 | 24 | #include <linux/gpio_keys.h> |
5e763d29 | 25 | #include <linux/mmc/host.h> |
ffe7f95b | 26 | |
ce491cf8 | 27 | #include <plat/mcspi.h> |
ce491cf8 TL |
28 | #include <plat/board.h> |
29 | #include <plat/common.h> | |
30 | #include <plat/dma.h> | |
31 | #include <plat/gpmc.h> | |
ce491cf8 TL |
32 | #include <plat/onenand.h> |
33 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 34 | |
87581fd4 | 35 | #include <sound/tlv320aic3x.h> |
64d06691 | 36 | #include <sound/tpa6130a2-plat.h> |
87581fd4 | 37 | |
70b5d737 MN |
38 | #include <../drivers/staging/iio/light/tsl2563.h> |
39 | ||
4896e394 | 40 | #include "mux.h" |
d02a900b | 41 | #include "hsmmc.h" |
ffe7f95b | 42 | |
f52eeee8 AH |
43 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
44 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
45 | ||
a24e61a9 KV |
46 | #define RX51_WL1251_POWER_GPIO 87 |
47 | #define RX51_WL1251_IRQ_GPIO 42 | |
48 | ||
49 | /* list all spi devices here */ | |
50 | enum { | |
51 | RX51_SPI_WL1251, | |
03e11104 | 52 | RX51_SPI_MIPID, /* LCD panel */ |
6996e7ff | 53 | RX51_SPI_TSC2005, /* Touch Controller */ |
a24e61a9 KV |
54 | }; |
55 | ||
56 | static struct wl12xx_platform_data wl1251_pdata; | |
57 | ||
70b5d737 MN |
58 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
59 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | |
60 | .cover_comp_gain = 16, | |
61 | }; | |
62 | #endif | |
63 | ||
a24e61a9 KV |
64 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
65 | .turbo_mode = 0, | |
66 | .single_channel = 1, | |
67 | }; | |
68 | ||
03e11104 RQ |
69 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
70 | .turbo_mode = 0, | |
71 | .single_channel = 1, | |
72 | }; | |
73 | ||
6996e7ff RQ |
74 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
75 | .turbo_mode = 0, | |
76 | .single_channel = 1, | |
77 | }; | |
78 | ||
a24e61a9 KV |
79 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
80 | [RX51_SPI_WL1251] = { | |
81 | .modalias = "wl1251", | |
82 | .bus_num = 4, | |
83 | .chip_select = 0, | |
84 | .max_speed_hz = 48000000, | |
860fc976 | 85 | .mode = SPI_MODE_3, |
a24e61a9 KV |
86 | .controller_data = &wl1251_mcspi_config, |
87 | .platform_data = &wl1251_pdata, | |
88 | }, | |
03e11104 RQ |
89 | [RX51_SPI_MIPID] = { |
90 | .modalias = "acx565akm", | |
91 | .bus_num = 1, | |
92 | .chip_select = 2, | |
93 | .max_speed_hz = 6000000, | |
94 | .controller_data = &mipid_mcspi_config, | |
95 | }, | |
6996e7ff RQ |
96 | [RX51_SPI_TSC2005] = { |
97 | .modalias = "tsc2005", | |
98 | .bus_num = 1, | |
99 | .chip_select = 0, | |
100 | /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ | |
101 | .max_speed_hz = 6000000, | |
102 | .controller_data = &tsc2005_mcspi_config, | |
103 | /* .platform_data = &tsc2005_config,*/ | |
104 | }, | |
a24e61a9 KV |
105 | }; |
106 | ||
f014ee32 JN |
107 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
108 | ||
109 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
110 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
111 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
112 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
113 | #define RX51_GPIO_LOCK_BUTTON 113 | |
114 | #define RX51_GPIO_PROXIMITY 89 | |
115 | ||
116 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
117 | ||
118 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
119 | { | |
120 | .desc = "Camera Lens Cover", | |
121 | .type = EV_SW, | |
122 | .code = SW_CAMERA_LENS_COVER, | |
123 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
124 | .active_low = 1, | |
125 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
126 | }, { | |
127 | .desc = "Camera Focus", | |
128 | .type = EV_KEY, | |
129 | .code = KEY_CAMERA_FOCUS, | |
130 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
131 | .active_low = 1, | |
132 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
133 | }, { | |
134 | .desc = "Camera Capture", | |
135 | .type = EV_KEY, | |
136 | .code = KEY_CAMERA, | |
137 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
138 | .active_low = 1, | |
139 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
140 | }, { | |
141 | .desc = "Lock Button", | |
142 | .type = EV_KEY, | |
143 | .code = KEY_SCREENLOCK, | |
144 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
145 | .active_low = 1, | |
146 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
147 | }, { | |
148 | .desc = "Keypad Slide", | |
149 | .type = EV_SW, | |
150 | .code = SW_KEYPAD_SLIDE, | |
151 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
152 | .active_low = 1, | |
153 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
154 | }, { | |
155 | .desc = "Proximity Sensor", | |
156 | .type = EV_SW, | |
157 | .code = SW_FRONT_PROXIMITY, | |
158 | .gpio = RX51_GPIO_PROXIMITY, | |
159 | .active_low = 0, | |
160 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
161 | } | |
162 | }; | |
163 | ||
164 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
165 | .buttons = rx51_gpio_keys, | |
166 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
167 | }; | |
168 | ||
169 | static struct platform_device rx51_gpio_keys_device = { | |
170 | .name = "gpio-keys", | |
171 | .id = -1, | |
172 | .dev = { | |
173 | .platform_data = &rx51_gpio_keys_data, | |
174 | }, | |
175 | }; | |
176 | ||
177 | static void __init rx51_add_gpio_keys(void) | |
178 | { | |
179 | platform_device_register(&rx51_gpio_keys_device); | |
180 | } | |
181 | #else | |
182 | static void __init rx51_add_gpio_keys(void) | |
183 | { | |
184 | } | |
185 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
186 | ||
4f543332 | 187 | static int board_keymap[] = { |
3fea6026 DT |
188 | /* |
189 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
190 | * connected to the ground" matrix state. | |
191 | */ | |
ffe7f95b | 192 | KEY(0, 0, KEY_Q), |
acf442dc AK |
193 | KEY(0, 1, KEY_O), |
194 | KEY(0, 2, KEY_P), | |
195 | KEY(0, 3, KEY_COMMA), | |
196 | KEY(0, 4, KEY_BACKSPACE), | |
197 | KEY(0, 6, KEY_A), | |
198 | KEY(0, 7, KEY_S), | |
3fea6026 | 199 | |
acf442dc | 200 | KEY(1, 0, KEY_W), |
ffe7f95b | 201 | KEY(1, 1, KEY_D), |
acf442dc AK |
202 | KEY(1, 2, KEY_F), |
203 | KEY(1, 3, KEY_G), | |
204 | KEY(1, 4, KEY_H), | |
205 | KEY(1, 5, KEY_J), | |
206 | KEY(1, 6, KEY_K), | |
207 | KEY(1, 7, KEY_L), | |
3fea6026 | 208 | |
acf442dc AK |
209 | KEY(2, 0, KEY_E), |
210 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 211 | KEY(2, 2, KEY_UP), |
acf442dc AK |
212 | KEY(2, 3, KEY_ENTER), |
213 | KEY(2, 5, KEY_Z), | |
214 | KEY(2, 6, KEY_X), | |
215 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
216 | KEY(2, 8, KEY_F9), |
217 | ||
acf442dc AK |
218 | KEY(3, 0, KEY_R), |
219 | KEY(3, 1, KEY_V), | |
220 | KEY(3, 2, KEY_B), | |
ffe7f95b | 221 | KEY(3, 3, KEY_N), |
acf442dc AK |
222 | KEY(3, 4, KEY_M), |
223 | KEY(3, 5, KEY_SPACE), | |
224 | KEY(3, 6, KEY_SPACE), | |
225 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 226 | |
acf442dc AK |
227 | KEY(4, 0, KEY_T), |
228 | KEY(4, 1, KEY_DOWN), | |
229 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 230 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
231 | KEY(4, 5, KEY_RIGHTALT), |
232 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 233 | KEY(4, 8, KEY_F10), |
3fea6026 | 234 | |
acf442dc | 235 | KEY(5, 0, KEY_Y), |
2e65a207 | 236 | KEY(5, 8, KEY_F11), |
3fea6026 | 237 | |
acf442dc | 238 | KEY(6, 0, KEY_U), |
3fea6026 | 239 | |
acf442dc AK |
240 | KEY(7, 0, KEY_I), |
241 | KEY(7, 1, KEY_F7), | |
242 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
243 | }; |
244 | ||
4f543332 TL |
245 | static struct matrix_keymap_data board_map_data = { |
246 | .keymap = board_keymap, | |
247 | .keymap_size = ARRAY_SIZE(board_keymap), | |
248 | }; | |
249 | ||
ffe7f95b | 250 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 251 | .keymap_data = &board_map_data, |
ffe7f95b LL |
252 | .rows = 8, |
253 | .cols = 8, | |
ffe7f95b LL |
254 | .rep = 1, |
255 | }; | |
256 | ||
ffe7f95b LL |
257 | static struct twl4030_madc_platform_data rx51_madc_data = { |
258 | .irq_line = 1, | |
259 | }; | |
260 | ||
ce6f0016 AH |
261 | /* Enable input logic and pull all lines up when eMMC is on. */ |
262 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
263 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
264 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
265 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
266 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
267 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
268 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
269 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
270 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
271 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
272 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
273 | }; | |
274 | ||
275 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
276 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
277 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
278 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
279 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
280 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
281 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
282 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
283 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
284 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
285 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
286 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
287 | }; | |
288 | ||
289 | /* | |
290 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
291 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
292 | */ | |
293 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
294 | { | |
295 | if (power_on) | |
296 | omap_mux_write_array(rx51_mmc2_on_mux); | |
297 | else | |
298 | omap_mux_write_array(rx51_mmc2_off_mux); | |
299 | } | |
300 | ||
68ff0423 | 301 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
302 | { |
303 | .name = "external", | |
304 | .mmc = 1, | |
3a63833e | 305 | .caps = MMC_CAP_4_BIT_DATA, |
ffe7f95b LL |
306 | .cover_only = true, |
307 | .gpio_cd = 160, | |
308 | .gpio_wp = -EINVAL, | |
5e763d29 | 309 | .power_saving = true, |
ffe7f95b LL |
310 | }, |
311 | { | |
312 | .name = "internal", | |
313 | .mmc = 2, | |
3a63833e SG |
314 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
315 | /* See also rx51_mmc2_remux */ | |
ffe7f95b LL |
316 | .gpio_cd = -EINVAL, |
317 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
318 | .nonremovable = true, |
319 | .power_saving = true, | |
ce6f0016 | 320 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
321 | }, |
322 | {} /* Terminator */ | |
323 | }; | |
324 | ||
5c7d9bbe JN |
325 | static struct regulator_consumer_supply rx51_vmmc1_supply = |
326 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0"); | |
ffe7f95b | 327 | |
5c7d9bbe JN |
328 | static struct regulator_consumer_supply rx51_vaux3_supply = |
329 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"); | |
ffe7f95b | 330 | |
5c7d9bbe JN |
331 | static struct regulator_consumer_supply rx51_vsim_supply = |
332 | REGULATOR_SUPPLY("vmmc_aux", "mmci-omap-hs.1"); | |
ffe7f95b | 333 | |
4cfcaef1 JN |
334 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
335 | /* tlv320aic3x analog supplies */ | |
5c7d9bbe JN |
336 | REGULATOR_SUPPLY("AVDD", "2-0018"), |
337 | REGULATOR_SUPPLY("DRVDD", "2-0018"), | |
64d06691 JN |
338 | /* tpa6130a2 */ |
339 | REGULATOR_SUPPLY("Vdd", "2-0060"), | |
4cfcaef1 | 340 | /* Keep vmmc as last item. It is not iterated for newer boards */ |
5c7d9bbe | 341 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"), |
4cfcaef1 JN |
342 | }; |
343 | ||
344 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
345 | /* tlv320aic3x digital supplies */ | |
5c7d9bbe JN |
346 | REGULATOR_SUPPLY("IOVDD", "2-0018"), |
347 | REGULATOR_SUPPLY("DVDD", "2-0018"), | |
4cfcaef1 JN |
348 | }; |
349 | ||
0581b52e RQ |
350 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) |
351 | extern struct platform_device rx51_display_device; | |
352 | #endif | |
353 | ||
354 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { | |
355 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) | |
356 | { | |
357 | .supply = "vdds_sdi", | |
358 | .dev = &rx51_display_device.dev, | |
359 | }, | |
360 | #endif | |
361 | }; | |
362 | ||
ffe7f95b LL |
363 | static struct regulator_init_data rx51_vaux1 = { |
364 | .constraints = { | |
365 | .name = "V28", | |
366 | .min_uV = 2800000, | |
367 | .max_uV = 2800000, | |
000d534e | 368 | .always_on = true, /* due battery cover sensor */ |
ffe7f95b LL |
369 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
370 | | REGULATOR_MODE_STANDBY, | |
371 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
372 | | REGULATOR_CHANGE_STATUS, | |
373 | }, | |
0581b52e RQ |
374 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
375 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
376 | }; |
377 | ||
378 | static struct regulator_init_data rx51_vaux2 = { | |
379 | .constraints = { | |
380 | .name = "VCSI", | |
381 | .min_uV = 1800000, | |
382 | .max_uV = 1800000, | |
383 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
384 | | REGULATOR_MODE_STANDBY, | |
385 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
386 | | REGULATOR_CHANGE_STATUS, | |
387 | }, | |
388 | }; | |
389 | ||
390 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 391 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
392 | .constraints = { |
393 | .name = "VCAM_DIG_18", | |
394 | .min_uV = 1800000, | |
395 | .max_uV = 1800000, | |
396 | .apply_uV = true, | |
397 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
398 | | REGULATOR_MODE_STANDBY, | |
399 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
400 | | REGULATOR_CHANGE_STATUS, | |
401 | }, | |
402 | }; | |
403 | ||
f52eeee8 AH |
404 | static struct regulator_init_data rx51_vaux3_mmc = { |
405 | .constraints = { | |
406 | .name = "VMMC2_30", | |
407 | .min_uV = 2800000, | |
408 | .max_uV = 3000000, | |
409 | .apply_uV = true, | |
410 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
411 | | REGULATOR_MODE_STANDBY, | |
412 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
413 | | REGULATOR_CHANGE_MODE | |
414 | | REGULATOR_CHANGE_STATUS, | |
415 | }, | |
416 | .num_consumer_supplies = 1, | |
4cfcaef1 | 417 | .consumer_supplies = &rx51_vaux3_supply, |
f52eeee8 AH |
418 | }; |
419 | ||
ffe7f95b LL |
420 | static struct regulator_init_data rx51_vaux4 = { |
421 | .constraints = { | |
422 | .name = "VCAM_ANA_28", | |
423 | .min_uV = 2800000, | |
424 | .max_uV = 2800000, | |
425 | .apply_uV = true, | |
426 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
427 | | REGULATOR_MODE_STANDBY, | |
428 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
429 | | REGULATOR_CHANGE_STATUS, | |
430 | }, | |
431 | }; | |
432 | ||
433 | static struct regulator_init_data rx51_vmmc1 = { | |
434 | .constraints = { | |
435 | .min_uV = 1850000, | |
436 | .max_uV = 3150000, | |
437 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
438 | | REGULATOR_MODE_STANDBY, | |
439 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
440 | | REGULATOR_CHANGE_MODE | |
441 | | REGULATOR_CHANGE_STATUS, | |
442 | }, | |
443 | .num_consumer_supplies = 1, | |
444 | .consumer_supplies = &rx51_vmmc1_supply, | |
445 | }; | |
446 | ||
447 | static struct regulator_init_data rx51_vmmc2 = { | |
448 | .constraints = { | |
f2add1de JN |
449 | .name = "V28_A", |
450 | .min_uV = 2800000, | |
451 | .max_uV = 3000000, | |
ffe7f95b LL |
452 | .apply_uV = true, |
453 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
454 | | REGULATOR_MODE_STANDBY, | |
455 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
456 | | REGULATOR_CHANGE_MODE | |
457 | | REGULATOR_CHANGE_STATUS, | |
458 | }, | |
4cfcaef1 JN |
459 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
460 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
461 | }; |
462 | ||
463 | static struct regulator_init_data rx51_vsim = { | |
464 | .constraints = { | |
465 | .name = "VMMC2_IO_18", | |
466 | .min_uV = 1800000, | |
467 | .max_uV = 1800000, | |
468 | .apply_uV = true, | |
469 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
470 | | REGULATOR_MODE_STANDBY, | |
471 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
472 | | REGULATOR_CHANGE_STATUS, | |
473 | }, | |
474 | .num_consumer_supplies = 1, | |
475 | .consumer_supplies = &rx51_vsim_supply, | |
476 | }; | |
477 | ||
478 | static struct regulator_init_data rx51_vdac = { | |
479 | .constraints = { | |
480 | .min_uV = 1800000, | |
481 | .max_uV = 1800000, | |
482 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
483 | | REGULATOR_MODE_STANDBY, | |
484 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
485 | | REGULATOR_CHANGE_MODE | |
486 | | REGULATOR_CHANGE_STATUS, | |
487 | }, | |
488 | }; | |
489 | ||
4cfcaef1 JN |
490 | static struct regulator_init_data rx51_vio = { |
491 | .constraints = { | |
492 | .min_uV = 1800000, | |
493 | .max_uV = 1800000, | |
494 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
495 | | REGULATOR_MODE_STANDBY, | |
496 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
497 | | REGULATOR_CHANGE_MODE | |
498 | | REGULATOR_CHANGE_STATUS, | |
499 | }, | |
500 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
501 | .consumer_supplies = rx51_vio_supplies, | |
502 | }; | |
503 | ||
ffe7f95b LL |
504 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
505 | { | |
506 | /* FIXME this gpio setup is just a placeholder for now */ | |
507 | gpio_request(gpio + 6, "backlight_pwm"); | |
508 | gpio_direction_output(gpio + 6, 0); | |
509 | gpio_request(gpio + 7, "speaker_en"); | |
510 | gpio_direction_output(gpio + 7, 1); | |
511 | ||
ffe7f95b LL |
512 | return 0; |
513 | } | |
514 | ||
515 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
516 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
517 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
518 | .irq_end = TWL4030_GPIO_IRQ_END, | |
519 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
520 | | BIT(4) | BIT(5) | |
521 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
522 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
523 | | BIT(16) | BIT(17) , | |
524 | .setup = rx51_twlgpio_setup, | |
525 | }; | |
526 | ||
dfc27b34 RQ |
527 | static struct twl4030_usb_data rx51_usb_data = { |
528 | .usb_mode = T2_USB_MODE_ULPI, | |
529 | }; | |
530 | ||
9312fffb AK |
531 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
532 | /* | |
3c684e84 | 533 | * Turn off everything |
9312fffb | 534 | */ |
3c684e84 | 535 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
536 | }; |
537 | ||
538 | static struct twl4030_script sleep_on_script __initdata = { | |
539 | .script = sleep_on_seq, | |
540 | .size = ARRAY_SIZE(sleep_on_seq), | |
541 | .flags = TWL4030_SLEEP_SCRIPT, | |
542 | }; | |
543 | ||
544 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
545 | /* | |
3c684e84 | 546 | * Reenable everything |
9312fffb | 547 | */ |
3c684e84 | 548 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
549 | }; |
550 | ||
551 | static struct twl4030_script wakeup_script __initdata = { | |
552 | .script = wakeup_seq, | |
553 | .size = ARRAY_SIZE(wakeup_seq), | |
554 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
555 | }; | |
556 | ||
557 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
558 | /* | |
3c684e84 | 559 | * Reenable everything |
9312fffb | 560 | */ |
3c684e84 | 561 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
562 | }; |
563 | ||
564 | static struct twl4030_script wakeup_p3_script __initdata = { | |
565 | .script = wakeup_p3_seq, | |
566 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
567 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
568 | }; | |
569 | ||
570 | static struct twl4030_ins wrst_seq[] __initdata = { | |
571 | /* | |
572 | * Reset twl4030. | |
573 | * Reset VDD1 regulator. | |
574 | * Reset VDD2 regulator. | |
575 | * Reset VPLL1 regulator. | |
576 | * Enable sysclk output. | |
577 | * Reenable twl4030. | |
578 | */ | |
579 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
580 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
581 | 0x13}, | |
9312fffb AK |
582 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
583 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
584 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
585 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 586 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
587 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
588 | }; | |
589 | ||
590 | static struct twl4030_script wrst_script __initdata = { | |
591 | .script = wrst_seq, | |
592 | .size = ARRAY_SIZE(wrst_seq), | |
593 | .flags = TWL4030_WRST_SCRIPT, | |
594 | }; | |
595 | ||
596 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
597 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
598 | board might hit retention before loading of wakeup script is | |
599 | completed. This can cause boot failures depending on timing issues. | |
600 | */ | |
601 | &wakeup_script, | |
602 | &sleep_on_script, | |
603 | &wakeup_p3_script, | |
604 | &wrst_script, | |
605 | }; | |
606 | ||
607 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
608 | { .resource = RES_VDD1, .devgroup = -1, |
609 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
610 | .remap_sleep = RES_STATE_OFF | |
611 | }, | |
612 | { .resource = RES_VDD2, .devgroup = -1, | |
613 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
614 | .remap_sleep = RES_STATE_OFF | |
615 | }, | |
616 | { .resource = RES_VPLL1, .devgroup = -1, | |
617 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
618 | .remap_sleep = RES_STATE_OFF | |
619 | }, | |
620 | { .resource = RES_VPLL2, .devgroup = -1, | |
621 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
622 | }, | |
623 | { .resource = RES_VAUX1, .devgroup = -1, | |
624 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
625 | }, | |
626 | { .resource = RES_VAUX2, .devgroup = -1, | |
627 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
628 | }, | |
629 | { .resource = RES_VAUX3, .devgroup = -1, | |
630 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
631 | }, | |
632 | { .resource = RES_VAUX4, .devgroup = -1, | |
633 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
634 | }, | |
635 | { .resource = RES_VMMC1, .devgroup = -1, | |
636 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
637 | }, | |
638 | { .resource = RES_VMMC2, .devgroup = -1, | |
639 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
640 | }, | |
641 | { .resource = RES_VDAC, .devgroup = -1, | |
642 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
643 | }, | |
644 | { .resource = RES_VSIM, .devgroup = -1, | |
645 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
646 | }, | |
647 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
648 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
649 | }, | |
650 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
651 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
652 | }, | |
653 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
654 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
655 | }, | |
656 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
657 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
658 | }, | |
659 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
660 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
661 | }, | |
662 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
663 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
664 | }, | |
665 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
666 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
667 | }, | |
668 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
669 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
670 | }, | |
671 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
672 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
673 | }, | |
674 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
675 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
676 | }, | |
677 | { .resource = RES_RESET, .devgroup = -1, | |
678 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
679 | }, | |
680 | { .resource = RES_Main_Ref, .devgroup = -1, | |
681 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
682 | }, | |
9312fffb AK |
683 | { 0, 0}, |
684 | }; | |
685 | ||
686 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
687 | .scripts = twl4030_scripts, | |
688 | .num = ARRAY_SIZE(twl4030_scripts), | |
689 | .resource_config = twl4030_rconfig, | |
690 | }; | |
691 | ||
692 | ||
693 | ||
694 | static struct twl4030_platform_data rx51_twldata __initdata = { | |
ffe7f95b LL |
695 | .irq_base = TWL4030_IRQ_BASE, |
696 | .irq_end = TWL4030_IRQ_END, | |
697 | ||
698 | /* platform_data for children goes here */ | |
699 | .gpio = &rx51_gpio_data, | |
700 | .keypad = &rx51_kp_data, | |
701 | .madc = &rx51_madc_data, | |
dfc27b34 | 702 | .usb = &rx51_usb_data, |
9312fffb | 703 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
704 | |
705 | .vaux1 = &rx51_vaux1, | |
706 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
707 | .vaux4 = &rx51_vaux4, |
708 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
709 | .vsim = &rx51_vsim, |
710 | .vdac = &rx51_vdac, | |
4cfcaef1 | 711 | .vio = &rx51_vio, |
ffe7f95b LL |
712 | }; |
713 | ||
87581fd4 JN |
714 | static struct aic3x_pdata rx51_aic3x_data __initdata = { |
715 | .gpio_reset = 60, | |
716 | }; | |
717 | ||
64d06691 JN |
718 | static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata = { |
719 | .id = TPA6130A2, | |
720 | .power_gpio = 98, | |
721 | }; | |
722 | ||
ffe7f95b LL |
723 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { |
724 | { | |
725 | I2C_BOARD_INFO("twl5030", 0x48), | |
726 | .flags = I2C_CLIENT_WAKE, | |
727 | .irq = INT_34XX_SYS_NIRQ, | |
728 | .platform_data = &rx51_twldata, | |
729 | }, | |
730 | }; | |
731 | ||
dabe929b JN |
732 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
733 | { | |
734 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
87581fd4 | 735 | .platform_data = &rx51_aic3x_data, |
dabe929b | 736 | }, |
70b5d737 MN |
737 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
738 | { | |
739 | I2C_BOARD_INFO("tsl2563", 0x29), | |
740 | .platform_data = &rx51_tsl2563_platform_data, | |
741 | }, | |
742 | #endif | |
64d06691 JN |
743 | { |
744 | I2C_BOARD_INFO("tpa6130a2", 0x60), | |
745 | .platform_data = &rx51_tpa6130a2_data, | |
746 | } | |
dabe929b JN |
747 | }; |
748 | ||
ffe7f95b LL |
749 | static int __init rx51_i2c_init(void) |
750 | { | |
f52eeee8 | 751 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 752 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 753 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
754 | /* Only older boards use VMMC2 for internal MMC */ |
755 | rx51_vmmc2.num_consumer_supplies--; | |
756 | } else { | |
f52eeee8 | 757 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 758 | } |
4cfcaef1 | 759 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
cb3cc45a | 760 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
dabe929b JN |
761 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
762 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, | |
763 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
ffe7f95b LL |
764 | omap_register_i2c_bus(3, 400, NULL, 0); |
765 | return 0; | |
766 | } | |
767 | ||
aa62e90f JY |
768 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
769 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
770 | ||
771 | static struct mtd_partition onenand_partitions[] = { | |
772 | { | |
773 | .name = "bootloader", | |
774 | .offset = 0, | |
775 | .size = 0x20000, | |
776 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
777 | }, | |
778 | { | |
779 | .name = "config", | |
780 | .offset = MTDPART_OFS_APPEND, | |
781 | .size = 0x60000, | |
782 | }, | |
783 | { | |
784 | .name = "log", | |
785 | .offset = MTDPART_OFS_APPEND, | |
786 | .size = 0x40000, | |
787 | }, | |
788 | { | |
789 | .name = "kernel", | |
790 | .offset = MTDPART_OFS_APPEND, | |
791 | .size = 0x200000, | |
792 | }, | |
793 | { | |
794 | .name = "initfs", | |
795 | .offset = MTDPART_OFS_APPEND, | |
796 | .size = 0x200000, | |
797 | }, | |
798 | { | |
799 | .name = "rootfs", | |
800 | .offset = MTDPART_OFS_APPEND, | |
801 | .size = MTDPART_SIZ_FULL, | |
802 | }, | |
803 | }; | |
804 | ||
805 | static struct omap_onenand_platform_data board_onenand_data = { | |
806 | .cs = 0, | |
807 | .gpio_irq = 65, | |
808 | .parts = onenand_partitions, | |
809 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
c8e6488f | 810 | .flags = ONENAND_SYNC_READWRITE, |
aa62e90f JY |
811 | }; |
812 | ||
813 | static void __init board_onenand_init(void) | |
814 | { | |
815 | gpmc_onenand_init(&board_onenand_data); | |
816 | } | |
817 | ||
818 | #else | |
819 | ||
820 | static inline void board_onenand_init(void) | |
821 | { | |
822 | } | |
823 | ||
824 | #endif | |
ffe7f95b | 825 | |
1a48e157 TL |
826 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
827 | ||
828 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
829 | .cs = 1, | |
830 | .gpio_irq = 54, | |
831 | .gpio_pwrdwn = 86, | |
832 | .gpio_reset = 164, | |
833 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
834 | }; | |
835 | ||
836 | static void __init board_smc91x_init(void) | |
837 | { | |
4896e394 TL |
838 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
839 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
840 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
841 | |
842 | gpmc_smc91x_init(&board_smc91x_data); | |
843 | } | |
844 | ||
845 | #else | |
846 | ||
847 | static inline void board_smc91x_init(void) | |
848 | { | |
849 | } | |
850 | ||
851 | #endif | |
852 | ||
a24e61a9 KV |
853 | static void rx51_wl1251_set_power(bool enable) |
854 | { | |
855 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
856 | } | |
857 | ||
858 | static void __init rx51_init_wl1251(void) | |
859 | { | |
860 | int irq, ret; | |
861 | ||
862 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | |
863 | if (ret < 0) | |
864 | goto error; | |
865 | ||
866 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | |
867 | if (ret < 0) | |
868 | goto err_power; | |
869 | ||
870 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | |
871 | if (ret < 0) | |
872 | goto err_power; | |
873 | ||
874 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | |
875 | if (ret < 0) | |
876 | goto err_irq; | |
877 | ||
878 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | |
879 | if (irq < 0) | |
880 | goto err_irq; | |
881 | ||
882 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
883 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
884 | ||
885 | return; | |
886 | ||
887 | err_irq: | |
888 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
889 | ||
890 | err_power: | |
891 | gpio_free(RX51_WL1251_POWER_GPIO); | |
892 | ||
893 | error: | |
894 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
895 | wl1251_pdata.set_power = NULL; | |
896 | ||
897 | /* | |
898 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
899 | * set_power is null, and wl1251_probe() will fail. | |
900 | */ | |
901 | } | |
902 | ||
ffe7f95b LL |
903 | void __init rx51_peripherals_init(void) |
904 | { | |
ffe7f95b | 905 | rx51_i2c_init(); |
aa62e90f | 906 | board_onenand_init(); |
1a48e157 | 907 | board_smc91x_init(); |
f014ee32 | 908 | rx51_add_gpio_keys(); |
a24e61a9 KV |
909 | rx51_init_wl1251(); |
910 | spi_register_board_info(rx51_peripherals_spi_board_info, | |
911 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
68ff0423 | 912 | omap2_hsmmc_init(mmc); |
ffe7f95b LL |
913 | } |
914 |